Nvidia’s revenue grew 85% on the strength of AI infrastructure demand, according to a CIO Dive report published May 22, 2026. The figure — the only quantified data point in the report as surfaced — points to enterprises and cloud providers continuing to buy AI compute at a pace few hardware markets have ever sustained.
Executive Summary
An 85% revenue jump at a company already among the world’s largest chipmakers is not a startup doubling off a small base. At Nvidia’s scale, that percentage implies tens of billions of dollars in incremental sales, driven — per the report — by demand for AI infrastructure: the GPUs (graphics processing units repurposed as AI accelerators), networking gear, and integrated systems used to train and run artificial-intelligence models.
The number matters beyond Nvidia’s shareholders because Nvidia sits at the front of the AI build-out pipeline. Every accelerator it ships must eventually land in a rack, draw power, be cooled, and be connected. A growth rate like this is therefore a leading indicator for data center construction, electricity demand, and colocation absorption — the downstream industries that turn chips into working AI capacity.
That said, the source is a headline-level report with a single figure. It does not, as surfaced, disclose absolute revenue, the fiscal period covered, segment mix, margins, or guidance — all of which determine whether this print signals accelerating demand or the tail end of a catch-up cycle. Our analysis works within those limits.
Growth at This Scale Is a Demand Signal, Not a Rounding Error
The law of large numbers says percentage growth should fall as a company gets bigger. Nvidia posting 85% growth despite already dominating the AI accelerator market suggests the pull from AI infrastructure buyers remains intense: cloud providers, model developers, and increasingly mainstream enterprises are still racing to secure training capacity (the compute used to build AI models) and inference capacity (the compute used to run them for users).
What a single growth rate cannot tell you is trajectory. Without the absolute figures or prior-quarter comparisons, an 85% jump could represent acceleration, steady state, or deceleration from even hotter periods earlier in the AI cycle. It also cannot distinguish broad-based enterprise adoption from a handful of hyperscale customers placing enormous orders — a distinction that matters greatly for how durable the demand is. The honest reading of this report is directional: demand remains strong enough to move one of the world’s largest revenue bases by nearly half again.
The Squeeze Moves Downstream: Power, Cooling, and Floor Space
Chips are only the first link in the AI supply chain. Each generation of AI accelerators draws more power per rack than the last, pushing many deployments beyond what traditional air cooling handles and toward liquid cooling. When Nvidia’s revenue grows 85%, the practical consequence is a wave of hardware that needs megawatts of grid capacity, high-density data center space, and dense fiber connectivity — resources that take years, not quarters, to build.
For the infrastructure industry, that makes this print quietly bullish: data center operators, power-infrastructure providers, cooling vendors, and network carriers all sit downstream of Nvidia’s shipments. It also relocates the bottleneck. In the early AI boom the constraint was chip supply; increasingly, the constraint is where to plug the chips in. Buyers evaluating AI deployments should read Nvidia’s growth as a warning that competition for powered, cooled capacity is intensifying alongside competition for the silicon itself.
Concentration Cuts Both Ways
Nvidia’s position rests heavily on its CUDA software ecosystem — the programming platform that most AI frameworks target — which raises switching costs even when rival hardware is competitive on paper. But 85% growth is also the kind of number that motivates alternatives: rival merchant chipmakers, and the custom accelerators that large cloud providers design in-house to reduce dependence on a single supplier. The bigger the prize, the harder others will work to claim a share of it.
Concentration on the buyer side deserves equal scrutiny. Industry-wide, a large share of AI infrastructure spending flows from a small set of hyperscale companies, and order patterns from a few buyers can swing a supplier’s results sharply in either direction. The report offers no customer breakdown, so neither the bullish case (broadening enterprise demand) nor the cautious one (dependence on a few giant purchasers) can be confirmed from this source. Both remain fair questions to hold open.
Background
Nvidia, founded in 1993, spent its first decades known mainly for gaming graphics cards. Its parallel-processing GPUs proved ideal for the deep-learning techniques that took off in the 2010s, and its CUDA software platform became the default foundation for AI development. When generative AI demand exploded after 2022, Nvidia’s data center business became its dominant revenue driver and the company rose into the ranks of the world’s most valuable firms, with successive accelerator generations selling out to cloud providers and AI developers.
The broader market context is a global AI infrastructure build-out in which chip purchases, data center construction, and power procurement have become tightly linked: chip revenue at Nvidia today generally foreshadows demand for space, megawatts, and cooling across the data center industry tomorrow.
Anthropic is in early talks to buy AI inference chips from Fractile, a UK semiconductor startup whose architecture stores model weights in on-chip SRAM rather than external DRAM, according to a report published on 3 May 2026 by Tom’s Hardware. The stated appeal is that a DRAM-less design reduces dependence on high-bandwidth memory (HBM) at a moment of extreme memory pricing and constrained supply.
The report describes talks at an early stage. No purchase volumes, prices, delivery dates, or contractual commitments were disclosed, and neither company is described as having confirmed a deal.
Executive Summary
The substance of the report is narrow but pointed: one of the largest buyers of AI inference capacity is looking at hardware that removes the single most expensive and supply-constrained component in a modern accelerator. HBM — the stacked DRAM that sits beside a GPU and feeds it data — has become both a cost centre and a scheduling risk. Fractile’s pitch, as characterised in the report, is an architecture that keeps model weights in static RAM on the compute die itself, eliminating the trip to external memory that dominates inference latency and power.
Why this matters beyond one startup: inference at scale is not a compute-bound workload in the way training is. Generating tokens one at a time means repeatedly reading a model’s weights out of memory, so throughput tracks memory bandwidth far more closely than it tracks raw arithmetic. Anyone who can supply bandwidth without buying HBM is selling into a genuine bottleneck, not a marketing one.
What the report does not establish is equally important. “Early talks” is the lowest rung of commercial engagement, the account appears to rest on a single publication, and the hardest engineering question for any SRAM-based design — whether on-die memory capacity can hold a frontier-scale model economically — is not addressed. The signal here is about buyer intent and market pressure, not about a validated product.
Inference Is a Memory Problem Wearing a Compute Costume
When a large language model answers a question, it produces one token at a time, and each token requires reading a large fraction of the model’s parameters. That makes the decode phase bandwidth-bound: the arithmetic units on a modern accelerator spend much of their time waiting for data to arrive. High-bandwidth memory exists to narrow that gap, stacking DRAM dies vertically and placing them next to the processor on the same package. It works, and it is expensive — HBM is one of the costliest components in an AI accelerator and among the hardest to secure, because it depends on advanced packaging capacity as well as DRAM fabrication.
Static RAM changes the physics of that trade. SRAM sits on the logic die itself, delivers bandwidth measured in the hundreds of gigabytes to terabytes per second per chip, and consumes far less energy per bit moved than an off-package DRAM access. If a model’s weights fit in SRAM, the memory wall largely disappears for that model. This is not a novel insight — it is the same reasoning behind the wafer-scale and deterministic-dataflow approaches other inference specialists have pursued — but the memory market of 2026 has raised the value of the idea considerably.
For infrastructure buyers, the second-order effect matters as much as the first. Moving data off-package is a meaningful share of accelerator power draw. An architecture that eliminates those transfers changes the energy-per-token calculation, and energy per token is the metric that ultimately determines how much inference a given megawatt of data centre capacity can serve.
The Capacity Tax Nobody Escapes
The counter-argument to SRAM is capacity, and it is a serious one. On-die SRAM is typically measured in tens to hundreds of megabytes per chip, while an HBM-equipped accelerator carries tens of gigabytes. Holding a large model entirely in SRAM therefore means distributing it across many chips and connecting them with an interconnect fast enough that the network does not become the new bottleneck. Silicon area is expensive, SRAM has scaled poorly relative to logic at recent process nodes, and a design that needs many dies to hold one model trades a memory bill for a wafer bill.
Whether that trade is favourable is an empirical question about total cost of ownership, not a matter of architectural principle. It depends on how many chips a target model requires, what each chip costs to fabricate and package, how much power the resulting cluster draws, and how well utilised it stays across real request patterns. It also depends on the key-value cache — the growing scratchpad of intermediate state that long-context conversations generate at run time. KV cache scales with context length and concurrent users rather than with model size, and where it lives in a DRAM-less system is the question that separates a demonstration from a deployable product. The report does not address it.
The honest framing is that SRAM-first designs are strongest where models are compact, batch behaviour is predictable, and latency is the product. They are weakest where a customer wants to run whatever model it likes at whatever context length users demand. Which of those descriptions fits Anthropic’s inference fleet is not something the report tells us.
What a Frontier Lab Gains From Being Seen Shopping
Anthropic already runs inference across multiple silicon platforms, including Google’s TPUs, Amazon’s Trainium, and Nvidia hardware. Adding an early-stage evaluation of a startup’s accelerator is consistent with that pattern rather than a departure from it. Frontier labs have strong incentives to hold options across suppliers: it hedges against shortage, it constrains pricing power, and it gives engineering teams early visibility into architectures that may matter in two or three years.
That same logic should temper how much any single report is read to mean. Early-stage supplier talks are cheap for a buyer and valuable publicity for a young vendor, and the asymmetry in who benefits from disclosure is worth naming plainly. This is not a reason to doubt the reporting — it is a reason to treat “in talks” as evidence of interest in a category, which is well supported by the memory market, rather than evidence about a specific product’s readiness, which is not addressed. Neither party is described as confirming the discussions, and the account appears to originate from one publication.
The category signal is nonetheless real. When the buyers with the deepest inference workloads start evaluating architectures whose main selling point is the absence of HBM, it tells you that the memory crunch has moved from a procurement irritation to an architectural forcing function.
Winners, Losers, and the Data Centre Floor
If DRAM-less inference gains commercial traction, the pressure lands first on HBM suppliers and on the packaging capacity that HBM consumes — though the near-term risk to them is modest, since training and the installed inference base remain firmly HBM-dependent. Nvidia’s position is likewise not threatened by an early-stage evaluation; the more plausible medium-term effect is on price discipline, as credible alternatives give large buyers a bargaining position they currently lack. The clearest beneficiaries of the trend, whether or not Fractile is the vehicle, are inference specialists of any architecture that can offer bandwidth without a DRAM bill of materials.
For data centre operators, the interesting variable is density and power profile rather than chip count. SRAM-heavy, many-die inference systems concentrate compute differently from HBM-equipped GPU racks, and any shift in the mix changes assumptions about rack power, cooling approach, and interconnect topology. Operators planning capacity for 2027 and beyond should treat inference hardware as less settled than the current GPU-centric build-out implies.
For enterprise buyers of inference capacity, the practical near-term takeaway is modest and worth stating without overclaiming: memory scarcity is now shaping the roadmaps of the companies you buy tokens from. That does not change procurement today. It does mean that assumptions about which silicon will serve your workload in three years deserve more scrutiny than they did a year ago.
Background
AI accelerators pair processing logic with memory, and for the current generation of large models that memory is usually HBM — DRAM stacked in vertical layers beside the processor. HBM solved a real problem, because model weights are far too large to fit on a processor die, but it introduced a cost and supply dependency that now shapes the entire AI hardware market. A parallel line of engineering has argued for the opposite trade: keep everything in fast on-chip SRAM and accept that a model must be spread across many chips. Wafer-scale and deterministic-dataflow inference startups have pursued versions of this idea for several years.
Anthropic, the AI company behind the Claude models, is among the largest consumers of inference compute and has deliberately spread its workloads across multiple silicon platforms rather than standardising on one. Fractile is a UK semiconductor startup working on inference hardware that keeps weights in on-chip memory. The reported talks sit at the intersection of those two positions: a buyer with strong incentives to diversify supply, and an architecture whose central claim is that it does not need the component the market is short of.
Goldman Sachs published research titled “Tracking Trillions: The Assumptions Shaping the Scale of the AI Build-Out,” dated May 1, 2026. As the title signals, the piece frames the artificial-intelligence infrastructure boom as a trillion-dollar-scale phenomenon whose ultimate size rests on a set of interlocking assumptions — about capital expenditure, electric power availability, and demand for AI chips — rather than on settled facts.
The item reached us as a syndicated headline via Google News; the full text of the underlying research was not included in the source material, so this article analyzes the framing the title and publication make public, and flags what cannot be verified from the release itself.
Executive Summary
When one of the world’s most influential investment banks organizes its AI-infrastructure research around the word “assumptions,” that word choice is itself the news. It signals that the scale of the build-out — the data centers, the power contracts, the semiconductor orders — is not a fixed trajectory but a forecast stacked on top of other forecasts. If the assumptions hold, the spending is rational; if any load-bearing one slips, the numbers built on it move too.
For the infrastructure industry, this kind of research matters because it shapes how capital markets price the boom. Data-center developers, utilities, and chipmakers are all making decade-scale commitments today against demand projections that mature years from now. A major bank publicly cataloguing the assumptions behind those projections gives lenders, investors, and boards a shared checklist — and a shared vocabulary for asking whether any given project’s premises are conservative or aggressive.
Because the source available to us is a headline-level syndication rather than the full report, we treat the specific figures inside Goldman’s analysis as unverified here, and focus on the three assumption categories the title and editorial framing identify: capex, power, and chip demand.
Why ‘Assumptions’ Is the Load-Bearing Word
Capital expenditure — capex, the money companies spend on long-lived physical assets — is the first pillar of any AI build-out forecast. Hyperscale cloud providers have been directing historically large budgets toward AI-capable data centers, and analysts across Wall Street have converged on aggregate build-out figures measured in the trillions of dollars over the coming years. But an aggregate capex forecast is not a single number; it is a chain of premises: that AI workloads keep growing, that enterprises convert experimentation into paid usage, that model training and inference continue to demand ever more compute, and that the companies writing the checks keep generating the cash flow to fund them.
Framing the build-out as assumption-driven is a quietly disciplined move. It invites readers to ask, for each dollar of projected spending: what has to be true for this to happen? That question separates committed capital — contracts signed, steel ordered, sites permitted — from projected capital, which can be revised down as quickly as it was revised up. Infrastructure operators know the difference intimately: a facility takes years to permit, power, and build, while a forecast can change in a quarter.
Power: The Constraint That Doesn’t Negotiate
The second assumption category is electric power, and it is the one the physical world enforces most strictly. AI data centers are extraordinarily energy-dense — a single large campus can draw as much electricity as a small city — and connecting that load to the grid requires generation, transmission lines, and substation capacity that take far longer to build than the data centers themselves. Any forecast of AI infrastructure scale therefore embeds an assumption that utilities and grid operators can deliver power on the industry’s timeline.
This is where assumption-mapping earns its keep. Capex can be accelerated by writing bigger checks; electrons cannot. Interconnection queues, turbine and transformer lead times, and local permitting fights are already the pacing items for many projects across major data-center markets. If power availability lags the demand curve that capex plans assume, the result is not a smaller boom so much as a rearranged one — capacity migrating to regions with available power, premiums for energized sites, and renewed interest in on-site and behind-the-meter generation.
Chip Demand and the Question of Payback
The third pillar is demand for AI chips — the graphics processing units (GPUs) and custom accelerators that fill these facilities. Chip demand is the assumption that connects the physical build-out back to economics: companies buy accelerators because they expect the AI services running on them to generate revenue that justifies the cost. The durability of that expectation is the central debate of the entire cycle, and it is notable that Goldman Sachs itself has hosted both sides of it — the bank’s own research in earlier phases of the boom publicly questioned whether generative AI’s benefits would arrive fast enough to justify the spending.
Treating chip demand as an assumption rather than a given keeps the analysis honest in both directions. Bulls can point to sustained order backlogs and rising inference workloads; skeptics can point to the gap between infrastructure spending and the AI application revenue reported so far. Neither side’s case is closed, and a framework that tracks the assumptions explicitly lets observers watch which ones are being confirmed by earnings and utilization data — and which are being quietly extended another year.
What Assumption-Mapping Means for the Infrastructure Industry
For data-center operators, connectivity providers, and their customers, research like this shapes the cost and availability of capital. Lenders underwriting a facility, utilities planning generation, and enterprises signing long-term colocation contracts all lean on frameworks from institutions like Goldman Sachs to judge whether the demand behind a project is durable. A well-publicized assumptions checklist tends to reward projects that can show contracted demand, secured power, and credit-worthy tenants — and to raise the bar for speculative builds.
The even-handed reading is this: mapping assumptions is not a bear case, and it is not a bull case. It is the analytical infrastructure for either. The AI build-out may prove to be one of the great capital deployments in industrial history, or parts of it may overshoot demand; in both scenarios, the parties who tracked the underlying assumptions — rather than the headline totals — will have seen the turn first.
Background
Goldman Sachs is one of the world’s largest investment banks, and its research division is a significant force in how capital markets interpret technology cycles. Since the generative-AI surge began, the bank’s analysts have examined the infrastructure boom from multiple angles — including, notably, earlier research that questioned whether AI’s economic benefits would arrive fast enough to justify the unprecedented spending. That history makes the firm a useful barometer: its published frameworks are read by the lenders, utilities, and boards whose decisions collectively determine the build-out’s actual pace.
The build-out itself has become one of the defining capital-investment stories of the decade. Hyperscale cloud providers and data-center developers have committed enormous sums to AI-capable capacity, straining electric grids and semiconductor supply chains in the process, while analysts and policymakers debate how much of the projected spending will ultimately be deployed — and how much of it will pay off.
Market research firm Dell’Oro Group has published analysis describing a growing “memory tax” on AI infrastructure — the rising share of system cost attributable to high-bandwidth memory (HBM) and DRAM in AI servers and accelerators. The note, surfaced April 27, 2026, frames memory as an increasingly material and often under-examined component of AI capital spending.
Executive Summary
Dell’Oro Group, an analyst firm that tracks data center and telecom infrastructure markets, is calling attention to memory — specifically HBM, the stacked memory packaged alongside AI accelerators, and conventional DRAM used in servers — as a fast-growing cost component in AI infrastructure. The “memory tax” framing suggests that as AI models and the clusters that train and serve them grow, memory is consuming a larger slice of every infrastructure dollar.
The framing matters because most public discussion of AI capital expenditure centers on GPUs and, increasingly, on power and data center construction. If memory costs are rising as a share of the bill of materials — the itemized cost of the components inside a server — then budget models built around accelerator pricing alone will understate the true cost of AI capacity. That has implications for cloud providers, enterprises buying AI servers, and the memory suppliers positioned to benefit.
Readers should note what is available here: a headline and thesis from a recognized analyst firm, without the underlying figures, forecast horizon, or methodology visible in the source material. The direction of the claim is consistent with the widely reported tightness in memory supply driven by AI demand, but the magnitude is not substantiated in what we can see.
Why Memory Became a Line Item Worth Naming
AI accelerators are unusual among chips in that their usefulness is bounded as much by memory as by raw compute. Training and serving large models requires moving enormous volumes of data to the processor quickly, which is why modern accelerators are packaged with HBM — DRAM dies stacked vertically and connected to the processor over a very wide, short interface. HBM is expensive to manufacture, supply is concentrated among a small number of suppliers (SK hynix, Samsung, and Micron are the established producers), and each new accelerator generation ships with more of it.
Conventional DRAM matters too: the host servers around the accelerators, plus the storage and networking tiers of an AI cluster, all consume memory. When one demand source — AI — pulls hard on a supply chain with long lead times and few producers, prices tend to rise across the board. Dell’Oro’s “memory tax” label captures the effect from the buyer’s side: a cost that arrives embedded in system prices whether or not the buyer itemizes it.
Who Pays, and Who Collects
If memory’s share of AI system cost is growing, the immediate beneficiaries are the memory manufacturers, for whom HBM commands substantially better margins than commodity DRAM historically has. Accelerator vendors sit in the middle: memory is a cost input to their products, but strong demand has so far allowed system prices to carry it. The buyers — hyperscale cloud providers, AI labs, and enterprises — absorb the tax directly in capital expenditure, and indirectly it flows into the price of cloud GPU capacity and AI services.
There is a second-order effect worth watching. Rising memory prices do not stay confined to AI hardware. General-purpose servers, storage systems, and consumer devices draw on the same DRAM supply base, so a sustained AI-driven squeeze can raise costs for infrastructure buyers who are not purchasing AI systems at all. For data center operators and IT planners, that argues for treating memory pricing as a market variable in refresh budgets, not a constant.
An Analyst Thesis, Not a Dataset — Yet
It is worth being precise about the evidentiary weight of what has surfaced. Dell’Oro is an established infrastructure research firm, and the thesis aligns with observable market conditions. But the material visible here is a headline-level framing: it does not disclose how large the memory share of AI system cost currently is, how fast it is growing, or over what forecast period. “Growing” is directionally plausible and quantitatively unverified in this source.
That distinction matters for anyone using the claim to make decisions. A memory share that rises from, say, a modest slice to a dominant one would reshape supplier negotiations and cloud pricing; a gradual drift would be a planning footnote. Until the underlying figures are public, the responsible reading is that memory costs deserve a named line in AI infrastructure budgets — and that the size of that line needs data the summary does not provide.
Background
The AI infrastructure buildout that accelerated from 2023 onward has been discussed mostly in terms of GPUs, power, and data center construction, but every AI accelerator ships with a large complement of high-bandwidth memory, and every cluster consumes conventional DRAM in its servers and supporting systems. Memory is a historically cyclical market dominated by a small number of manufacturers — SK hynix, Samsung, and Micron — and AI demand has become a defining force in its current cycle.
Dell’Oro Group, founded in the 1990s and based in Silicon Valley, publishes recurring research on data center capex, servers, and network infrastructure. Its analysts’ framing of trends — in this case, memory as a “tax” on AI infrastructure — often shapes how vendors and buyers talk about market economics before detailed figures circulate publicly.
