TL;DR · 30-second read
The Short Version
The chips that run artificial intelligence now draw so much electricity that getting power into them has become an engineering problem in its own right, separate from how much the power company can supply.
On October 6, chipmaker Navitas Semiconductor finished buying Claros, a company that makes tiny power converters that sit right beside or beneath those processors, so less energy is wasted on the final few millimeters.
Navitas says the deal more than doubles the market it can sell into, to over $8 billion by 2030.
Navitas Semiconductor (Nasdaq: NVTS) closed its acquisition of Claros, Inc., on October 6, 2026, according to an 8-K filed the same day. Claros develops integrated voltage regulators (IVRs), compact power converters that sit beneath or within millimeters of a processor. Navitas expects Claros to add at least $3.5 billion to its identified 2030 serviceable available market, lifting the total to more than $8 billion. The company’s closing release says it will host a webinar on October 20 to detail the technology, and CEO Chris Allexandre published a shareholder letter framing the deal as a defining step in its “Navitas 2.0” transformation.
In a parallel move, InfotechLead reported on October 7 that Infineon Technologies has completed its acquisition of Bengaluru-based C2i Semiconductors, a developer of software-defined multiphase controllers and smart power stages for AI data centers.
Executive Summary
Navitas already sold gallium nitride (GaN) and silicon carbide (SiC) power semiconductors, the chips that convert high-voltage electricity efficiently as it moves from the grid into a data center rack. Claros fills in the final stage: converting power down to the very low voltages and very high currents that GPUs and other AI processors consume, at the processor itself. Navitas calls the combined offering “grid-to-xPU,” where xPU is shorthand for any processor type, including GPUs, CPUs and custom AI accelerators.
The strategic claim is that AI’s power problem is not only a question of grid connections and megawatts. In Navitas’s framing, the delivery path inside the rack, and especially the last few millimeters to the chip, has become a limiter on how much compute a rack can deliver. The company’s own market estimate puts a number on that belief: it values the final conversion stage alone at a market at least as large as everything it previously sold into.
What the announcement does not yet show is commercial traction. Navitas names no customers, product ship dates, efficiency figures or purchase price in its closing release or CEO letter, so the $3.5 billion figure is best read as a statement of where Navitas thinks the bottleneck is, rather than as evidence of revenue to come.
Why the Last Millimeter Became a Market
The underlying physics explains why Navitas is paying attention to the final step. A processor’s power draw is voltage multiplied by current. Modern AI chips run on very low core voltages, so as their power rises, the current they draw climbs steeply. Allexandre’s letter describes next-generation xPUs needing “thousands of amps delivered with unprecedented speed and precision.” Resistive losses in a conductor scale with the square of the current, so carrying that current any distance across a circuit board wastes energy as heat and makes it harder to respond when a chip’s demand spikes in microseconds.
Claros’s answer is to move the conversion step closer. Its packaged IVR (pIVR) and embedded IVR (eIVR) products integrate power transistors, digital control, inductors and capacitors into one stack that enables Vertical Power Delivery, where the regulator sits directly beneath the processor, and Embedded Power Delivery, where it is built into the package or board. Navitas’s release says this minimizes “power-delivery losses and impedance” and enables faster transient response. Its modular PowerArray architecture is pitched as a way to scale up as processor current keeps climbing.
That is the operational point behind the $3.5 billion estimate. Navitas is effectively telling server designers, hyperscalers and AI power-platform providers that the conversion stage next to the chip is now a market as large as its entire prior GaN and SiC opportunity. If that view is right, the parts sitting beneath the processor become a design-defining component, with consequences for board layout, cooling and package design, rather than a commodity line item.
Reading the $8 Billion Number Carefully
The arithmetic is laid out in the closing release: an existing $3.5 billion 2030 serviceable available market for GaN and high-voltage and ultra-high-voltage SiC, roughly $1 billion from new JFET technology, and at least $3.5 billion from vertical power delivery and IVR, for a total above $8 billion. Serviceable available market is the slice of total demand a company believes its products can realistically address. It is not a revenue forecast, a backlog or a measure of contracted sales.
The “more than double” claim is measured against the $3.5 billion GaN and SiC base, which is consistent with the stated components. The release and letter use slightly different expansions of SAM (“serviceable addressable” versus “serviceable available”), but the figures are the same in both. Neither document explains how the IVR estimate was built, what share Navitas expects to win, or when Claros products are expected to generate revenue.
A Full-Chain Pitch, Echoed by Infineon
Navitas’s broader argument is that one supplier spanning the full chain, from grid-level SiC through 800-volt DC distribution in the rack to IVRs at the processor, can optimize power conversion as a system. The 800-volt DC architecture refers to distributing higher-voltage direct current inside racks, which reduces current and therefore losses over the longer runs; Navitas says its GaN and SiC portfolio enables it.
Navitas is not alone in that thesis. Infineon’s completed acquisition of C2i Semiconductors, as InfotechLead reported, targets the same AI-server power path from a different angle: system-level control software and smart power stages, to be combined with Infineon’s silicon, SiC and GaN portfolio. Two closings in one week do not establish an industry trend, but they do show at least two power semiconductor suppliers buying capability closer to the processor rather than relying on component sales alone.
What Power Chips Can and Cannot Fix
The editorial question in Navitas 2.0 is whether the AI power wall gets addressed inside the rack before it is addressed at the grid. Better conversion has real value: every stage that wastes less energy means more of a facility’s fixed power allocation reaches compute, and less waste heat has to be removed. In a data center whose grid connection is capped, that translates directly into usable capacity.
But conversion efficiency does not create generation or transmission. A site still needs its utility interconnection, and a rack still needs cooling sized to its total load. Navitas offers no efficiency figures for its IVR products in the closing materials, so the size of the gain remains unquantified. The fair reading is that Navitas is addressing a genuine engineering constraint at the chip, one that sits alongside, rather than replaces, the grid constraint the rest of the industry is working on.
Background
Navitas Semiconductor, headquartered in Torrance, California, and listed on Nasdaq as NVTS, makes power semiconductors: chips that convert and control electricity rather than perform computation. Its GaNFast gallium nitride devices and GeneSiC silicon carbide portfolio target efficient, high-density power conversion, and the company reports more than 450 patents issued or pending. Under CEO Chris Allexandre, its Navitas 2.0 strategy concentrates on high-power markets, with AI data centers, energy and grid systems at the center.
AI accelerators draw far more power per chip than earlier server processors, and racks are moving toward megawatt scale. That has pushed power delivery from a background engineering detail to a constraint on compute density, drawing power semiconductor suppliers such as Navitas and Infineon toward technologies that sit ever closer to the processor. Source: Tech M&A deals: Navitas Semiconductor, Claros, Infineon, C2i Semiconductors, NEOPAY, Noon Payments — InfotechLead roundup covering Navitas’s Claros closing and Infineon’s C2i acquisition. Primary sources: Navitas Semiconductor Form 8-K, filed October 6, 2026; Exhibit 99.1: Navitas Closes Acquisition of Claros, Advancing AI Infrastructure with Grid-to-xPU Power Delivery; Exhibit 99.2: A Letter from Chris Allexandre, President and CEO — Navitas 2.0: Breaking the AI Infrastructure Power Wall.Sources