TL;DR · 30-second read
The Short Version
Computers that train artificial intelligence have to talk to each other constantly, and today most of that traffic still travels over copper wiring that burns electricity and fades over distance.
Marvell has shown chips that move the traffic as light instead, built on the most advanced chipmaking process now available. One demonstration moves data fast enough to copy well over a thousand high-definition movies every second.
The point is not speed. Light uses less power per unit of data, and electricity is the hard limit on how big these computing sites can get.
Marvell Technology has demonstrated optical interconnect silicon built on a 2nm process for AI data centers, including a co-packaged optics engine running at 102.4 terabits per second and supporting 200G and 400G per electrical lane. 24/7 Wall St. reported on September 21 that the company described the work as an industry first and said it is “pushing the envelope of what is possible in optical tech,” with shares trading around $248 in Monday’s first hour, up 1.5% on the session.
The demonstration sits on top of a quarter Marvell has already reported: record fiscal second-quarter revenue of $2.739 billion, up 37% year over year, with data center revenue of $2.17 billion, up 46%, now 79% of the total. Guidance filed August 27 put the current quarter at $3.150 billion plus or minus 5%, and raised the fiscal 2027 and fiscal 2028 outlooks. Management has scheduled an Investor Day for October 6 in New York.
Executive Summary
The headline number is 102.4 Tbps of co-packaged optics, but the operational story is the denominator. Co-packaged optics — CPO — moves the optical engine off the front panel of a switch and onto the same substrate as the switch or accelerator silicon. That shortens the electrical path a signal has to travel before it becomes light, and shortening that path is primarily a way to spend fewer watts per bit, not a way to go faster.
That distinction matters because a rack has a fixed power envelope set by the building, not by the silicon roadmap. Every watt the network consumes inside that envelope is a watt unavailable to the accelerators the network exists to connect. As Marvell steps its lane rates from the 800G generation deployed today, past the 1.6T generation now ramping, toward 3.2T, copper’s usable reach shrinks and more of the interconnect budget migrates to optics — which is exactly where the energy cost concentrates.
The demo also gives silicon substance to forecasts management has already made. On the earnings call, CEO Matt Murphy said “the magnitude of our scale-up optics opportunity next year is much larger than we thought just a quarter ago,” and that Marvell expects scale-across bandwidth requirements to exceed 10 times current front-end data center interconnect networks. What a demonstration does not establish is yield, production timing, field serviceability or a named customer.
Optics Stopped Being a Bandwidth Problem and Became a Power Budget
Here is the mechanism the 102.4 Tbps figure is really about. In a conventional switch, optical modules plug into the faceplate, and the switch chip’s electrical lanes have to drive signals across the package, the circuit board and a connector before they reach the laser. Each of those hops costs energy and frequently requires retiming circuitry to clean the signal up. Co-packaged optics collapses that journey by placing the optical engine on the same substrate as the switch or accelerator die — in Marvell’s framing, shortening data pathways and cutting energy per bit.
The lane rates are what force the issue. By demonstrating 200G and 400G per lane, Marvell is aiming past the 800G optics deployed across hyperscale fleets today and the 1.6T generation now ramping, at the 3.2T generation beyond it. As per-lane signalling rates climb, the distance a passive copper cable can carry a clean signal falls, which is why the release notes copper runs out of reach at the speeds these clusters require. Once copper is out, the interconnect is optical by default — and its power draw becomes a line item in the rack budget rather than a rounding error.
Who this lands on is specific. A facility commits a fixed number of megawatts to a hall; a rack design commits a fixed number of kilowatts to a cabinet. If the network layer connecting tens of thousands of accelerators across multiple racks consumes a smaller share of that envelope, the operator either fits more compute per rack or fewer racks per hall. That arithmetic is the reason a demo with no customer attached still moves the roadmap conversation for switch vendors, optical module suppliers, rack integrators and the people underwriting the power contracts underneath them.
A 79% Data Center Mix Makes the Optical Roadmap the Whole Company
Marvell’s reported quarter explains why an engineering milestone carries this much weight. Revenue of $2.739 billion, up 37% year over year, came with data center revenue of $2.17 billion, up 46% and equal to 79% of the total. Non-GAAP earnings were $0.94 per share, and the company guided the following quarter to $3.150 billion plus or minus 5% with earnings of $1.10 plus or minus $0.05, while raising its fiscal 2027 and fiscal 2028 outlooks in the August 27 filing.
A business that derives roughly four dollars in five from data centers has effectively converted itself into a single-cycle instrument. That is an advantage while hyperscale capital expenditure expands and a concentrated exposure when it does not. It also means the optical and custom silicon roadmaps are not adjacent product lines — they are the earnings model, which is why a 2nm demonstration is treated as corroborating evidence for guidance rather than as a lab result.
The market has priced that trajectory rather than waiting on it. The stock has advanced 192% year to date, carries a market capitalisation near $217.4 billion and a forward price-to-earnings multiple around 58, against an average analyst target of $289 with 39 buy or strong-buy ratings and five holds. A multiple set that far ahead of current earnings is a statement about execution risk: the roadmap has to arrive roughly on the schedule management has sketched, and the October 6 Investor Day is where that schedule gets specified.
What Being First Actually Buys — and What It Costs
The optical push runs alongside a custom silicon business that has been given an unusual structure. Management disclosed an expanded partnership with Google that includes a warrant allowing Google to acquire up to 7% of Marvell’s shares, tied to revenue milestones, and Murphy said custom revenue should more than double in fiscal 2028. Linking a customer’s equity upside to the volume it buys aligns incentives efficiently, but it also converts a commercial relationship into potential dilution for existing holders, on terms whose triggers Marvell has not published. A separate expanded NVLink Fusion arrangement with NVIDIA positions Marvell in scale-up switching, and the earlier Celestial AI photonic fabric acquisition, closed February 2, 2026, and the XConn Technologies chiplet connectivity deal, closed February 10, 2026, supply the building blocks.
Against Broadcom, the incumbent in high-speed networking silicon, first-to-2nm is a claim on the next design cycle rather than on current sockets. Hyperscalers qualify interconnect years ahead of deployment, so the practical value of a demonstration is optionality in roadmap reviews happening now for clusters that power up later. It converts into revenue only if the process yields at volume, the thermal and reliability behaviour survives qualification, and a named platform adopts it.
The demand side of that equation is funding itself in size, if not always for named projects: Amazon’s Form 8-K filed September 14 records the close of £4.242 billion of notes maturing between 2029 and 2045, with net proceeds of roughly £4.235 billion and no specific use of proceeds identified in the filing. Capital of that scale is available to the companies buying interconnect; whether it reaches co-packaged optics specifically is the question Marvell has not yet answered with a customer name.
Background
Marvell Technology designs custom silicon and networking chips for hyperscale data centers. Its portfolio spans custom AI accelerators built to a single customer’s specification, electro-optics, the digital signal processors that drive high-speed optical links, and data center interconnect products that carry traffic between facilities. Over the past two years the company has reweighted itself decisively toward that market, with the data center segment now accounting for 79% of revenue.
Interconnect has become one of the more consequential bottlenecks in AI infrastructure. Training and inference clusters link tens of thousands of accelerators, and the network that connects them has to scale in step with the compute — first inside a rack, then across racks, then between buildings. Marvell has assembled capability for that through acquisition as well as internal development, closing the Celestial AI photonic fabric deal on February 2, 2026 and the XConn Technologies chiplet connectivity deal on February 10, 2026, while expanding partnerships with NVIDIA on scale-up switching and with Google on custom silicon. Its principal competitor in high-speed networking silicon is Broadcom. Source: Marvell Smashes the AI ‘Power Wall’ with Industry-First 2nm Optical Chips — 24/7 Wall St. report on Marvell’s 2nm optical interconnect demonstrations, its fiscal second-quarter results and its custom silicon partnerships. Primary sources: Amazon.com, Inc., Form 8-K filed September 14, 2026 (close of £4.242 billion of notes due 2029 through 2045; net proceeds of approximately £4.235 billion).Sources