TL;DR · 30-second read

The Short Version

Microchip and Navitas, two chip companies, have published a blueprint for a power board that feeds the chips running artificial intelligence. It takes electricity at 800 volts, several times what a home outlet supplies, and steps it down in a single move to the 6 volts those chips use.

The board is about a fifth thinner than a phone. At its best, it aims to lose just 4% of the power along the way.

Artificial intelligence buildings are straining for electricity. This fix is being assembled from more than one company’s parts.

Microchip Technology and Navitas Semiconductor have jointly released an 800V DC-to-6V DC reference design for AI data center rack power, ET Datacenters reported on October 10, 2026. The design pairs Microchip’s dsPIC33AK digital signal controllers and TA100 security chip with 16 of Navitas’ GaNFast gallium nitride transistors. It targets up to 96% peak efficiency at full load and a power density of 2,100 watts per cubic inch, and the companies say it aligns with the Open Compute Project’s 800V DC standard.

The release arrives four days after Navitas, in an 8-K filed October 6, reported closing its acquisition of Claros, Inc., a developer of integrated voltage regulators that handle the final step of delivering power to AI processors.

Executive Summary

A reference design is an engineering blueprint: working hardware, software and documentation that other companies can copy or adapt instead of starting from scratch. This one tackles a specific problem in AI racks: converting high-voltage 800V DC power down to the low voltage that sits near the GPU board. It does so in a single conversion stage, where conventional designs use two.

The design matters for two reasons. First, it puts concrete targets on the 800V transition: 96% peak efficiency, 2,100 W/in³ and a board the companies describe as about 20% thinner than a mobile phone. Second, it divides the work among specialist suppliers. Navitas supplies the power switches. Microchip supplies the controller that times them and the chip that secures the firmware. As hyperscalers and power-system makers move toward 800V racks, that layered structure points to a supply chain with more than one chipmaker in each power board.

The targets are design goals, not field results. The companies have not named customers, production timelines or pricing.

Three Jobs, Two Companies: How the Board Divides the Work

Converting 800 volts down to 6 volts in one step requires three distinct kinds of silicon, and this design takes them from two suppliers. The first job is switching. The power delivery board uses 16 Navitas NV6034 GaN transistors, each rated at 650 volts and 17 milliohms of resistance, in a stacked half-bridge arrangement. That arrangement spreads the high input voltage across devices individually rated below it. Gallium nitride is favored here because it can switch on and off very quickly with little loss, and the design runs at 1 MHz: one million switching cycles a second.

The second job is control. At 1 MHz, each switching cycle lasts one microsecond, and the controller has to decide every cycle how long each transistor stays on. Microchip’s dsPIC33AK256MPS306 family brings a 200 MHz 32-bit core with a double-precision floating-point unit, pulse-width modulators with 78-picosecond resolution, and 12-bit analog-to-digital converters sampling at up to 40 million samples per second. Put plainly, the controller can adjust timing in steps of roughly one twelve-thousandth of a single cycle while measuring voltage and current fast enough to react within it. The third job is trust. Microchip’s TA100 provides a hardware root of trust for secure boot, authenticated firmware updates and key management.

This division is what makes the transition multi-vendor in practice. GaN expertise, real-time digital control and hardware security are separate engineering disciplines. A reference design that pre-validates one combination of them lowers the cost for power-shelf makers and hyperscaler hardware teams to adopt that combination. The companies say the package reduces design risk and shortens development cycles. Because the design aligns with the Open Compute Project’s 800V DC standard, an open specification that rack buyers use to compare and interchange suppliers, it also sits inside a framework built for multiple vendors rather than one. This is a single data point, not proof of an industry pattern. Still, it shows how the parts list for 800V rack power is taking shape.

A Grid-to-xPU Strategy That Still Partners at the Control Layer

The timing is notable. Navitas’ October 6 filing frames its strategy as covering power delivery from the grid to the processor. The company describes its GaN and high-voltage silicon carbide devices as enabling the new 800V DC architecture, and the newly acquired Claros technology as the last step to the chip. Navitas told investors it expects Claros to add at least $3.5 billion to its identified 2030 serviceable available market, more than doubling the total to over $8 billion. That total combines the existing $3.5 billion GaN and silicon carbide opportunity with about $1 billion from new JFET technology.

Yet in this design, the control and security silicon comes from Microchip. That does not contradict Navitas’ strategy. Claros’ integrated voltage regulators, as the filing describes them, address a different stage of the power path. What the pairing does show is that even a supplier assembling an end-to-end portfolio is working with partners where another company has an established controller and security line. For buyers, that is mildly reassuring: the 800V transition is not funneling every component through one chipmaker. For Navitas, the partnership is a channel. A Microchip-backed reference design can put GaNFast devices in front of engineers who already standardize on Microchip controllers.

The serviceable-market figures deserve to be read as what they are: Navitas’ estimate of the opportunity its products could address by 2030. They are not revenue, backlog or contracted demand.

One Stage Instead of Two: The Efficiency Argument

The core technical claim is that converting 800V DC directly to 6V DC folds two conversion stages into one converter, improving end-to-end efficiency. The logic is straightforward. Every conversion stage loses some energy as heat, so removing a stage removes a source of loss. Distributing power at 800 volts helps for a related reason: higher voltage means less current for the same power, which cuts resistive losses and the amount of copper needed in the rack.

The 96% figure is a peak target at full load, and the release discloses no efficiency curve. Converters typically perform differently at partial load, where AI racks may spend much of their time, so operators will want measured data across the operating range. The physical design may matter as much as the efficiency. A board about 20% thinner than a phone can sit close to the GPU board, which the companies say improves transient performance. Transient performance is the converter’s ability to respond when processor demand jumps suddenly. Shorter distances between converter and chip mean less voltage drop and faster response, a growing concern as Navitas’ own CEO letter describes processors needing thousands of amps delivered with high precision.

Security Moves Into the Power Path

Including a dedicated security chip in a DC/DC converter design reflects a quieter shift. Rack power hardware now carries firmware that controls how electricity reaches some of the most expensive processors in a data center, and that firmware can be updated. The TA100’s secure boot and authenticated updates are meant to ensure only trusted code runs on the converter. The dsPIC33AK family’s support for the post-quantum algorithms recommended in the Commercial National Security Algorithm Suite 2.0 extends that protection against future code-breaking methods.

For data center security teams, this places power conversion alongside servers and network gear as equipment with a firmware supply chain to manage. That is a practical consequence of the layered design, and it gives procurement teams one more vendor relationship to qualify.

Background

Navitas Semiconductor, listed on Nasdaq as NVTS, develops power semiconductors based on gallium nitride and high-voltage and ultra-high-voltage silicon carbide. Under its Navitas 2.0 strategy, the company has refocused on AI infrastructure. On October 6, 2026, it closed its acquisition of Claros, whose integrated voltage regulator technology moves power conversion to within millimeters of the processor. Navitas describes the combined portfolio as covering the full path from grid to processor and has scheduled an October 20 webinar to present it.

Microchip Technology is a long-established supplier of microcontrollers and digital signal controllers, the chips that run real-time control loops in power supplies, motors and industrial equipment, along with dedicated security devices. The joint design reflects a broader move in AI data centers toward 800V DC rack power, driven by rack power demands that conventional lower-voltage distribution struggles to serve efficiently.

Sources

Source: Microchip, Navitas partner on 800V DC power for AI data centers, ET Datacenters: the companies’ 800V DC-to-6V DC reference design for AI rack power.

Primary sources: Navitas Semiconductor Form 8-K, filed October 6, 2026; Exhibit 99.1: Navitas Closes Acquisition of Claros, Advancing AI Infrastructure with Grid-to-xPU Power Delivery; Exhibit 99.2: A Letter from Chris Allexandre, President and CEO, Navitas 2.0: Breaking the AI Infrastructure Power Wall.

TL;DR · 30-second read

The Short Version

The chips that run artificial intelligence now draw so much electricity that getting power into them has become an engineering problem in its own right, separate from how much the power company can supply.

On October 6, chipmaker Navitas Semiconductor finished buying Claros, a company that makes tiny power converters that sit right beside or beneath those processors, so less energy is wasted on the final few millimeters.

Navitas says the deal more than doubles the market it can sell into, to over $8 billion by 2030.

Navitas Semiconductor (Nasdaq: NVTS) closed its acquisition of Claros, Inc., on October 6, 2026, according to an 8-K filed the same day. Claros develops integrated voltage regulators (IVRs), compact power converters that sit beneath or within millimeters of a processor. Navitas expects Claros to add at least $3.5 billion to its identified 2030 serviceable available market, lifting the total to more than $8 billion. The company’s closing release says it will host a webinar on October 20 to detail the technology, and CEO Chris Allexandre published a shareholder letter framing the deal as a defining step in its “Navitas 2.0” transformation.

In a parallel move, InfotechLead reported on October 7 that Infineon Technologies has completed its acquisition of Bengaluru-based C2i Semiconductors, a developer of software-defined multiphase controllers and smart power stages for AI data centers.

Executive Summary

Navitas already sold gallium nitride (GaN) and silicon carbide (SiC) power semiconductors, the chips that convert high-voltage electricity efficiently as it moves from the grid into a data center rack. Claros fills in the final stage: converting power down to the very low voltages and very high currents that GPUs and other AI processors consume, at the processor itself. Navitas calls the combined offering “grid-to-xPU,” where xPU is shorthand for any processor type, including GPUs, CPUs and custom AI accelerators.

The strategic claim is that AI’s power problem is not only a question of grid connections and megawatts. In Navitas’s framing, the delivery path inside the rack, and especially the last few millimeters to the chip, has become a limiter on how much compute a rack can deliver. The company’s own market estimate puts a number on that belief: it values the final conversion stage alone at a market at least as large as everything it previously sold into.

What the announcement does not yet show is commercial traction. Navitas names no customers, product ship dates, efficiency figures or purchase price in its closing release or CEO letter, so the $3.5 billion figure is best read as a statement of where Navitas thinks the bottleneck is, rather than as evidence of revenue to come.

Why the Last Millimeter Became a Market

The underlying physics explains why Navitas is paying attention to the final step. A processor’s power draw is voltage multiplied by current. Modern AI chips run on very low core voltages, so as their power rises, the current they draw climbs steeply. Allexandre’s letter describes next-generation xPUs needing “thousands of amps delivered with unprecedented speed and precision.” Resistive losses in a conductor scale with the square of the current, so carrying that current any distance across a circuit board wastes energy as heat and makes it harder to respond when a chip’s demand spikes in microseconds.

Claros’s answer is to move the conversion step closer. Its packaged IVR (pIVR) and embedded IVR (eIVR) products integrate power transistors, digital control, inductors and capacitors into one stack that enables Vertical Power Delivery, where the regulator sits directly beneath the processor, and Embedded Power Delivery, where it is built into the package or board. Navitas’s release says this minimizes “power-delivery losses and impedance” and enables faster transient response. Its modular PowerArray architecture is pitched as a way to scale up as processor current keeps climbing.

That is the operational point behind the $3.5 billion estimate. Navitas is effectively telling server designers, hyperscalers and AI power-platform providers that the conversion stage next to the chip is now a market as large as its entire prior GaN and SiC opportunity. If that view is right, the parts sitting beneath the processor become a design-defining component, with consequences for board layout, cooling and package design, rather than a commodity line item.

Reading the $8 Billion Number Carefully

The arithmetic is laid out in the closing release: an existing $3.5 billion 2030 serviceable available market for GaN and high-voltage and ultra-high-voltage SiC, roughly $1 billion from new JFET technology, and at least $3.5 billion from vertical power delivery and IVR, for a total above $8 billion. Serviceable available market is the slice of total demand a company believes its products can realistically address. It is not a revenue forecast, a backlog or a measure of contracted sales.

The “more than double” claim is measured against the $3.5 billion GaN and SiC base, which is consistent with the stated components. The release and letter use slightly different expansions of SAM (“serviceable addressable” versus “serviceable available”), but the figures are the same in both. Neither document explains how the IVR estimate was built, what share Navitas expects to win, or when Claros products are expected to generate revenue.

A Full-Chain Pitch, Echoed by Infineon

Navitas’s broader argument is that one supplier spanning the full chain, from grid-level SiC through 800-volt DC distribution in the rack to IVRs at the processor, can optimize power conversion as a system. The 800-volt DC architecture refers to distributing higher-voltage direct current inside racks, which reduces current and therefore losses over the longer runs; Navitas says its GaN and SiC portfolio enables it.

Navitas is not alone in that thesis. Infineon’s completed acquisition of C2i Semiconductors, as InfotechLead reported, targets the same AI-server power path from a different angle: system-level control software and smart power stages, to be combined with Infineon’s silicon, SiC and GaN portfolio. Two closings in one week do not establish an industry trend, but they do show at least two power semiconductor suppliers buying capability closer to the processor rather than relying on component sales alone.

What Power Chips Can and Cannot Fix

The editorial question in Navitas 2.0 is whether the AI power wall gets addressed inside the rack before it is addressed at the grid. Better conversion has real value: every stage that wastes less energy means more of a facility’s fixed power allocation reaches compute, and less waste heat has to be removed. In a data center whose grid connection is capped, that translates directly into usable capacity.

But conversion efficiency does not create generation or transmission. A site still needs its utility interconnection, and a rack still needs cooling sized to its total load. Navitas offers no efficiency figures for its IVR products in the closing materials, so the size of the gain remains unquantified. The fair reading is that Navitas is addressing a genuine engineering constraint at the chip, one that sits alongside, rather than replaces, the grid constraint the rest of the industry is working on.

Background

Navitas Semiconductor, headquartered in Torrance, California, and listed on Nasdaq as NVTS, makes power semiconductors: chips that convert and control electricity rather than perform computation. Its GaNFast gallium nitride devices and GeneSiC silicon carbide portfolio target efficient, high-density power conversion, and the company reports more than 450 patents issued or pending. Under CEO Chris Allexandre, its Navitas 2.0 strategy concentrates on high-power markets, with AI data centers, energy and grid systems at the center.

AI accelerators draw far more power per chip than earlier server processors, and racks are moving toward megawatt scale. That has pushed power delivery from a background engineering detail to a constraint on compute density, drawing power semiconductor suppliers such as Navitas and Infineon toward technologies that sit ever closer to the processor.

Sources

Source: Tech M&A deals: Navitas Semiconductor, Claros, Infineon, C2i Semiconductors, NEOPAY, Noon Payments — InfotechLead roundup covering Navitas’s Claros closing and Infineon’s C2i acquisition.

Primary sources: Navitas Semiconductor Form 8-K, filed October 6, 2026; Exhibit 99.1: Navitas Closes Acquisition of Claros, Advancing AI Infrastructure with Grid-to-xPU Power Delivery; Exhibit 99.2: A Letter from Chris Allexandre, President and CEO — Navitas 2.0: Breaking the AI Infrastructure Power Wall.