TL;DR · 30-second read

The Short Version

Intel, the American chipmaker, is expanding its research at a $5 billion lab in Silicon Valley run by Applied Materials, the company that builds the machines used to make computer chips.

The twist: Intel’s biggest rival in making chips for other companies, Taiwan Semiconductor Manufacturing Company, signed on to the same lab earlier this year. Two fierce competitors will be inventing future chips under one roof.

Why it matters: the chips behind artificial intelligence keep getting harder to make, and more of that early invention now happens at the machine maker, not inside any one chip company.

shattered.io reported that Applied Materials and Intel announced on October 6, 2026 an expanded collaboration on next-generation transistors, interconnects and advanced packaging, centered on Applied’s EPIC Center in Silicon Valley and Intel’s research campus in Hillsboro, Oregon. The work explicitly includes Foveros, Intel’s technology for stacking chip components vertically.

The EPIC Center, first pledged in May 2023 as an investment of up to $4 billion, is now described as a $5 billion facility. TSMC was confirmed as a founding partner in May 2026, five months before Intel’s expanded role was announced. No dollar figure, node target or performance goal was attached to the Intel agreement.

Executive Summary

Applied Materials, whose equipment sits inside virtually every leading-edge chip factory, now counts the two most closely watched advanced logic foundries (contract chip manufacturers) as research partners at the same facility. Intel’s expanded role covers the full stack of problems that limit AI processors: the transistors themselves, the microscopic wiring that connects them, and the packaging that joins multiple chip pieces into one product.

Intel CEO Lip-Bu Tan tied the work directly to AI demand, citing the need for gains in performance, power efficiency and packaging, and described Applied as an important partner in moving new technology from the lab into high-volume manufacturing in the United States. Intel Foundry’s chief technology and operations officer, Naga Chandrasekaran, framed faster R&D as critical to keeping pace with AI infrastructure buildout.

The significance lies less in any single deliverable, since none was disclosed, than in where the work is happening. When rival foundries both co-develop processes inside a toolmaker’s lab, the equipment vendor becomes a shared starting point for next-generation AI silicon.

Why the Toolmaker’s Lab Is Becoming the Starting Line

New chip generations do not begin at the factory. They begin with materials and process experiments: which film to deposit, how to etch a structure a few atoms wide, how to bond two pieces of silicon face to face. Those experiments depend on the equipment that will eventually run in production, which is why chipmakers co-develop processes with toolmakers. The EPIC Center, short for Equipment and Process Innovation and Commercialization, was built to formalize that step, with more than 180,000 square feet of cleanroom (ultra-clean manufacturing space) planned and up to 2,000 engineering jobs.

The scope of the Intel work maps onto the three constraints that matter most for AI processors. Front-end-of-line research targets the transistor layer. Back-end-of-line research targets interconnects, the wiring stacked above the transistors, where electrical resistance grows as features shrink and can become a bigger limit on speed and power than the transistors themselves. Packaging research, including Intel’s Foveros 3D stacking of chiplets (smaller dies combined into one package), targets interconnect density, power delivery and heat, all of which limit how much compute can be packed into an AI accelerator.

With TSMC as a founding partner and Intel as an expanded partner, at least part of the early-stage work on both companies’ next-generation AI silicon now passes through the same equipment vendor’s facility. That does not mean the two share designs or results; it means the toolmaker sees, and helps shape, both roadmaps. For AI chip designers who buy foundry capacity, it suggests that the process innovations available to them will increasingly be co-developed with Applied rather than invented in isolation inside one foundry.

Intel’s Math: A $2.1 Billion Loss and a Need for Outside Customers

Intel Foundry, the division that manufactures chips for Intel and outside customers, posted $5.8 billion in revenue and a $2.1 billion operating loss in its most recently reported quarter, a $348 million improvement on the prior period. Intel has raised its 2026 capital spending guidance to more than $20 billion company-wide, citing stronger customer-demand signals.

The division’s path to profitability runs through external customers, and winning them requires showing that Intel’s advanced nodes and packaging can match TSMC on schedule and yield. Intel says its 18A process has been in volume production in Arizona since December. Moving from a node that works to a node that wins outside AI chip business is where materials and packaging co-development pays off, and packaging is one area where Intel has distinctive technology to offer.

Neutral Ground Is Good Business for Applied

For Applied Materials, hosting both foundries reduces dependence on any single customer’s spending cycle. The company reported fiscal third-quarter 2026 revenue of $9.12 billion, with $7.04 billion coming from its Semiconductor Systems segment, which sells the equipment used for leading-edge manufacturing. Every process co-developed at EPIC is, in practice, a process that runs on Applied tools.

The facility’s cost has also grown: from a pledge of up to $4 billion over seven years in 2023 to a project now described as $5 billion. Cost growth is common in cleanroom-heavy construction, and anchor partners help justify it. The open question is how Applied manages confidentiality when two direct competitors work in the same building, a matter the companies have not addressed publicly.

A Shared Lab Does Not Close the Spending Gap

Shared research access can equalize the starting line for process experiments, but not manufacturing scale. TSMC has guided 2026 capital spending to $60 billion to $64 billion, up from roughly $56 billion, roughly three times Intel’s company-wide figure of more than $20 billion. Whoever converts lab results into high-volume production fastest still needs the factories to do it.

Samsung Foundry, the third major advanced-logic contender, has no confirmed role at the EPIC Center, and its foundry results are reported inside Samsung Electronics’ broader semiconductor segment. For buyers of AI silicon, the practical takeaway is that process and packaging advances developed at EPIC may reach both Intel and TSMC customers, while capacity remains the differentiator.

Background

Applied Materials is one of the world’s largest makers of semiconductor manufacturing equipment, the deposition, etching and inspection machines that chip factories use to build transistors and wiring. It unveiled the EPIC Center in May 2023, pledging up to $4 billion in incremental investment over seven years, more than 180,000 square feet of cleanroom space, up to 2,000 engineering jobs and as many as 1,500 construction jobs. The project is now described as a $5 billion facility and is scheduled to be operationally ready in 2026.

Intel Foundry is Intel’s contract-manufacturing division, built to produce chips for outside customers as well as Intel’s own products, in direct competition with TSMC, the world’s largest contract chipmaker. Intel CEO Lip-Bu Tan has positioned AI demand and US-based high-volume manufacturing as central to the foundry strategy.

Sources

Source: Intel Joins TSMC at Applied Materials’ $5B Chip Lab [2026] (shattered.io), covering Intel’s expanded R&D collaboration with Applied Materials at the EPIC Center, where TSMC is a founding partner.