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Case No. 7:26-mc-00323-DC\n\n Petitioner, Principal case pending in Western District\n of Texas, Civil Action No. 7:24-cv-00221-\n v. LS-DTG\n\nCOREWEAVE, INC.,\n\n Respondent.\n\n\n NEURAL AI\u2019S MOTON TO DISMISS\n\n On August 18, 2026, Petitioner Neural AI, LLC filed its Motion to Compel Compliance\n\nwith Subpoena Served on Third-Party CoreWeave, Inc. in Miscellaneous Case No. 7:26-mc-\n\n00323-LS.\n\n The parties have since reached a resolution regarding the discovery sought by the motion.\n\nAccordingly, Neural AI hereby withdraws its Motion to Compel as moot.\n\n Neural AI respectfully requests that the Court terminate the pending Motion to Compel and\n\nclose this miscellaneous action.\n\n\n\nDated September 16, 2026\n\n /s/ Rocco Magni\n Max L. Tribble (TX 20213950)\n Brian D. Melton (TX 24010620)\n Rocco Magni, (TX 24092745)\n SUSMAN GODFREY L.L.P.\n 1000 Louisiana, Suite 5100\n Houston, TX 77002\n Telephone: (713) 651-9366\n Facsimile: (713) 654-6666\n mtribble@susmangodfrey.com\n\n\n 1\n\fCase 7:26-mc-00323-LS Document 7 Filed 09/17/26 Page 2 of 3\n\n\n\n\n bmelton@susmangodfrey.com\n rmagni@susmangodfrey.com\n\n Tamar Lusztig (NY 5125174)\n Emily Portuguese (NY 5920327)\n One Manhattan West, 50th Floor\n New York, NY 10001\n tlusztig@susmangodfrey.com\n eportuguese@susmangodfrey.com\n\n Tanner Laiche (WA 60450)\n 401 Union Street, Suite 3000\n Seattle, WA 98101\n tlaiche@susmangodfrey.com\n\n Attorneys for Petitioner Neural AI, LLC\n\n\n\n\n 2\n\f Case 7:26-mc-00323-LS Document 7 Filed 09/17/26 Page 3 of 3\n\n\n\n\n CERTIFICATE OF SERVICE\n\n I hereby certify that on September 17, 2026, I electronically filed the foregoing document\n\nwith the Clerk of Court using the CM/ECF system, which will send notification of such filing to\n\ncounsel for CoreWeave, Inc.\n\n\n /s/ Rocco Magni\n Rocco Magni\n\n\n\n\n 3\n\f","ocr_status":2,"date_upload":"2026-09-17T10:48:40.847516-07:00","document_number":"7","attachment_number":null,"pacer_doc_id":"181037428594","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":1,"description":"Dismiss","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/494008543/","id":494008543,"tags":[],"absolute_url":"/docket/74666997/7/1/neural-ai-llc-v-coreweave-inc/","date_created":"2026-09-17T10:48:23.043048-07:00","date_modified":"2026-09-29T16:51:53.545381-07:00","sha1":"dd5cd2591ffcad18f850087984885994c0387009","page_count":1,"file_size":211037,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.7.1.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.7.1.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":" Case 7:26-mc-00323-LS Document 7-1 Filed 09/17/26 Page 1 of 1\n\n\n\n\n IN THE UNITED STATES DISTRICT COURT\n FOR THE WESTERN DISTRICT OF TEXAS\n\n NEURAL AI, LLC,\n Misc. Case No. 7:26-mc-00323-DC\n Petitioner,\n Principal case pending in Western District of\n v. Texas, Civil Action No. 7:24-cv-00221-LS-\n DTG\n COREWEAVE, INC,\n\n Respondent.\n\n\n\n [PROPOSED] ORDER DISMISSING CASE\n\n Before the Court is Petitioner Neural AI, LLC Motion to Dismiss Case as moot. Having\n\nconsidered the Motion, the Court finds good cause and GRANTS the dismissal.\n\nSO ORDERED: this _____ day of _____________________, 2026.\n\n\n\n\n United States District Judge\n\n\n\n\n 1\n\f","ocr_status":2,"date_upload":"2026-09-17T10:48:39.448315-07:00","document_number":"7","attachment_number":1,"pacer_doc_id":"181037428595","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Proposed Order","acms_document_guid":""}],"date_created":"2026-09-17T10:05:58.768132-07:00","date_modified":"2026-09-17T10:38:56.826700-07:00","date_filed":"2026-09-17","time_filed":"11:56:22","entry_number":7,"recap_sequence_number":"2026-09-17.001","pacer_sequence_number":23,"description":"MOTION to Dismiss by Neural AI, LLC. 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Pursuant to the Order\nAssigning the Business of the Court, the Clerk shall credit this case to the percentage of business\nof the receiving Judge. All Orders shall remain in effect unless otherwise ordered by Judge Leon\nSchydlower.\n It is so ORDERED.\n SIGNED this 20th day of August, 2026.\n\n\n\n\n DAVID COUNTS\n UNITED STATES DISTRICT JUDGE\n\f","ocr_status":2,"date_upload":"2026-08-20T15:17:37.535647-07:00","document_number":"6","attachment_number":null,"pacer_doc_id":"181037241551","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":1,"description":"Order Reassigning Case","acms_document_guid":""}],"date_created":"2026-08-20T14:15:51.520263-07:00","date_modified":"2026-08-20T15:17:34.002204-07:00","date_filed":"2026-08-20","time_filed":"16:03:40","entry_number":6,"recap_sequence_number":"2026-08-20.001","pacer_sequence_number":20,"description":"ORDER TO TRANSFER. Case reassigned to District Judge Leon Schydlower for all proceedings. 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DEVLIN WESTERN DISTRICT OF TEXAS ANNETTE FRENCH\n CLERK OF COURT 200 E. Wall Street, Suite 222 CHIEF DEPUTY\n Midland, TX 79701\n August 19, 2026\n\n Samuel Drezdzon\n SUSMAN GODFREY L.L.P.\n 1000 Louisiana, Suite 5100\n Houston, TX 77002\n\n Re: 7:26-MC-00323 Neural AI, LLC v. CoreWeave, Inc.\n\n Dear Counsel:\n\n Our records indicate that you are not admitted to practice in the Western District of Texas. Local\n Court Rule AT-1(f)(1) states:\n\n In General: An attorney who is licensed by the highest court of a state or another\n federal district court, but who is not admitted to practice before this court, may\n represent a party in this court pro hac vice only by permission of the judge\n presiding. Unless excused by the judge presiding, an attorney is ordinarily required\n to apply for admission to the bar of this court.\n\n Pursuant to Local Court Rule AT-2, if you are an attorney residing outside the Western District\n of Texas, the court may require you to designate local counsel in this case.\n\n Please submit a Motion to Appear Pro Hac Vice requesting the Court\u2019s permission to appear in\n the above-captioned cause, along with a $100 filing fee. Applications for permanent admission\n to the bar and Local Court Rules for the Western District of Texas are available on our website at\n www.txwd.uscourts.gov.\n\n Please be advised that the Clerk no longer automatically adds non-admitted attorneys to a\n case. Thus, non-admitted attorneys will not receive orders or notices (which may include\n deadlines, hearing dates, etc.) filed in their case. The Clerk will only add said attorneys to\n the case upon the granting of a Motion to Appear pro hac vice.\n\n Sincerely,\n\n KM\n Deputy Clerk\n\n KM\n\f","ocr_status":2,"date_upload":"2026-08-20T10:23:17.020277-07:00","document_number":"3","attachment_number":null,"pacer_doc_id":"181037221725","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":1,"description":"Pro Hac Vice Letter","acms_document_guid":""}],"date_created":"2026-08-19T08:03:35.873700-07:00","date_modified":"2026-08-19T14:30:54.809834-07:00","date_filed":"2026-08-19","time_filed":"09:49:20","entry_number":3,"recap_sequence_number":"2026-08-19.001","pacer_sequence_number":14,"description":"Pro Hac Vice Letter for Attorney Samuel Drezdzon. (ktm) (Entered: 08/19/2026)","tags":[]},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/docket-entries/475021225/","id":475021225,"docket":"https://www.courtlistener.com/api/rest/v4/dockets/74666997/","recap_documents":[{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490540106/","id":490540106,"tags":[],"absolute_url":"/docket/74666997/4/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T08:03:35.018803-07:00","date_modified":"2026-08-23T02:40:38.882682-07:00","sha1":"933997818470a96979fab297cdb5a94f2b5cdc50","page_count":1,"file_size":189645,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.4.0.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.4.0.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":" Case 7:26-mc-00323-DC Document 4 Filed 08/19/26 Page 1 of 1\n\n\n\n\n UNITED STATES DISTRICT COURT\nPHILIP J. DEVLIN WESTERN DISTRICT OF TEXAS ANNETTE FRENCH\n CLERK OF COURT 200 E. Wall Street, Suite 222 CHIEF DEPUTY\n Midland, TX 79701\n August 19, 2026\n\n Tamar Lusztig\n One Manhattan West, 50th Floor\n New Your, NY 10001\n\n Re: 7:26-MC-00323 Neural AI, LLC v. CoreWeave, Inc.\n\n Dear Counsel:\n\n Our records indicate that you are not admitted to practice in the Western District of Texas. Local\n Court Rule AT-1(f)(1) states:\n\n In General: An attorney who is licensed by the highest court of a state or another\n federal district court, but who is not admitted to practice before this court, may\n represent a party in this court pro hac vice only by permission of the judge\n presiding. Unless excused by the judge presiding, an attorney is ordinarily required\n to apply for admission to the bar of this court.\n\n Pursuant to Local Court Rule AT-2, if you are an attorney residing outside the Western District\n of Texas, the court may require you to designate local counsel in this case.\n\n Please submit a Motion to Appear Pro Hac Vice requesting the Court\u2019s permission to appear in\n the above-captioned cause, along with a $100 filing fee. Applications for permanent admission\n to the bar and Local Court Rules for the Western District of Texas are available on our website at\n www.txwd.uscourts.gov.\n\n Please be advised that the Clerk no longer automatically adds non-admitted attorneys to a\n case. Thus, non-admitted attorneys will not receive orders or notices (which may include\n deadlines, hearing dates, etc.) filed in their case. The Clerk will only add said attorneys to\n the case upon the granting of a Motion to Appear pro hac vice.\n\n Sincerely,\n\n KM\n Deputy Clerk\n\n KM\n\f","ocr_status":2,"date_upload":"2026-08-20T10:23:11.975323-07:00","document_number":"4","attachment_number":null,"pacer_doc_id":"181037221743","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":1,"description":"Pro Hac Vice Letter","acms_document_guid":""}],"date_created":"2026-08-19T08:03:34.990617-07:00","date_modified":"2026-08-19T14:30:54.828257-07:00","date_filed":"2026-08-19","time_filed":"09:50:43","entry_number":4,"recap_sequence_number":"2026-08-19.002","pacer_sequence_number":16,"description":"Pro Hac Vice Letter for Attorney Tamar Lusztig. (ktm) (Entered: 08/19/2026)","tags":[]},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/docket-entries/475021213/","id":475021213,"docket":"https://www.courtlistener.com/api/rest/v4/dockets/74666997/","recap_documents":[{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490540094/","id":490540094,"tags":[],"absolute_url":"/docket/74666997/5/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T08:03:33.151675-07:00","date_modified":"2026-08-23T02:40:29.339441-07:00","sha1":"be57f658521c4deda6aa291517a78ffd7105e745","page_count":1,"file_size":189693,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.5.0.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.5.0.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":" Case 7:26-mc-00323-DC Document 5 Filed 08/19/26 Page 1 of 1\n\n\n\n\n UNITED STATES DISTRICT COURT\nPHILIP J. DEVLIN WESTERN DISTRICT OF TEXAS ANNETTE FRENCH\n CLERK OF COURT 200 E. Wall Street, Suite 222 CHIEF DEPUTY\n Midland, TX 79701\n August 19, 2026\n\n Emily Portuguese\n One Manhattan West, 50th Floor\n New Your, NY 10001\n\n Re: 7:26-MC-00323 Neural AI, LLC v. CoreWeave, Inc.\n\n Dear Counsel:\n\n Our records indicate that you are not admitted to practice in the Western District of Texas. Local\n Court Rule AT-1(f)(1) states:\n\n In General: An attorney who is licensed by the highest court of a state or another\n federal district court, but who is not admitted to practice before this court, may\n represent a party in this court pro hac vice only by permission of the judge\n presiding. Unless excused by the judge presiding, an attorney is ordinarily required\n to apply for admission to the bar of this court.\n\n Pursuant to Local Court Rule AT-2, if you are an attorney residing outside the Western District\n of Texas, the court may require you to designate local counsel in this case.\n\n Please submit a Motion to Appear Pro Hac Vice requesting the Court\u2019s permission to appear in\n the above-captioned cause, along with a $100 filing fee. Applications for permanent admission\n to the bar and Local Court Rules for the Western District of Texas are available on our website at\n www.txwd.uscourts.gov.\n\n Please be advised that the Clerk no longer automatically adds non-admitted attorneys to a\n case. Thus, non-admitted attorneys will not receive orders or notices (which may include\n deadlines, hearing dates, etc.) filed in their case. The Clerk will only add said attorneys to\n the case upon the granting of a Motion to Appear pro hac vice.\n\n Sincerely,\n\n KM\n Deputy Clerk\n\n KM\n\f","ocr_status":2,"date_upload":"2026-08-20T10:23:11.521459-07:00","document_number":"5","attachment_number":null,"pacer_doc_id":"181037221775","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":1,"description":"Pro Hac Vice Letter","acms_document_guid":""}],"date_created":"2026-08-19T08:03:33.125313-07:00","date_modified":"2026-08-19T14:30:54.838744-07:00","date_filed":"2026-08-19","time_filed":"09:53:06","entry_number":5,"recap_sequence_number":"2026-08-19.003","pacer_sequence_number":18,"description":"Pro Hac Vice Letter for Attorney Emily Portuguese. (ktm) (Entered: 08/19/2026)","tags":[]},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/docket-entries/474970634/","id":474970634,"docket":"https://www.courtlistener.com/api/rest/v4/dockets/74666997/","recap_documents":[{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490487431/","id":490487431,"tags":[],"absolute_url":"/docket/74666997/1/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-18T17:13:29.096323-07:00","date_modified":"2026-08-23T00:06:30.134107-07:00","sha1":"f1ffed17b4c236ae367de177d86aba6ab7b7f6b4","page_count":16,"file_size":307372,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.0.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.0.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":" Case 7:26-mc-00323-DC Document 1 Filed 08/18/26 Page 1 of 16\n\n\n\n\n IN THE UNITED STATES DISTRICT COURT\n FOR THE WESTERN DISTRICT OF TEXAS\n MIDLAND/ODESSA DIVISION\n\n\nNEURAL AI, LLC,\n\n Petitioner, Misc. Case No. 7:26-mc-323\n\n v. Principal case pending in Western District of\n Texas, Civil Action No. 7:24-cv-00221-LS-\nCOREWEAVE, INC., DTG\n\n Respondent.\n\n\n NEURAL AI\u2019S MOTION TO COMPEL COMPLIANCE WITH\n SUBPOENA SERVED ON THIRD-PARTY COREWEAVE, INC.\n\f Case 7:26-mc-00323-DC Document 1 Filed 08/18/26 Page 2 of 16\n\n\n\n\n TABLE OF CONTENTS\n\nI. FACTUAL BACKGROUND ............................................................................................. 2\n\n A. The Underlying Litigation ...................................................................................... 2\n\n B. The Rule 45 Subpoenas to CoreWeave and CoreWeave\u2019s Continued Non-\n Compliance. ............................................................................................................ 3\n\nII. THE COURT HAS JURISDICTION BECAUSE THE PLACE OF COMPLIANCE IN\n AUSTIN, TX IS PROPER. ................................................................................................. 5\n\nIII. COREWEAVE MUST PRODUCE DOCUMENTS RESPONSIVE TO THE\n SUBPOENA. ...................................................................................................................... 6\n\n A. The Requested Discovery Goes to the Heart of NAI\u2019s Infringement Claims......... 7\n\n B. CoreWeave Has Not Substantiated Burden and NAI Offered Narrower\n Alternatives. ............................................................................................................ 9\n\nIV. CONCLUSION ................................................................................................................. 10\n\n\n\n\n i\n\f Case 7:26-mc-00323-DC Document 1 Filed 08/18/26 Page 3 of 16\n\n\n\n\n TABLE OF AUTHORITIES\n\n Page(s)\n\nCases\n\n611 Carpenter LLC v. Atlantic Casualty Ins. Co.,\n 2024 WL 1977160 (W.D. Tex. April 30, 2024) ....................................................................7, 9\n\nConservation L. Found., Inc. v. Equilon Enters. LLC,\n 2025 WL 2821238 (D.R.I. Oct. 3, 2025) ...................................................................................6\n\nFG SRC LLC v. Xilinx, Inc.,\n 2022 WL 22997130 (D. Del. Apr. 11, 2022) .............................................................................8\n\nFlores v. Lowes Home Centers, L.L.C.,\n 2023 WL 3959399 (W.D. Tex. June 12, 2023) .....................................................................6, 7\n\nKim v. NuVasive, Inc.,\n 2011 WL 3844106 (S.D. Cal. Aug. 29, 2011) ...........................................................................8\n\nLucent Technologies, Inc. v. Gateway, Inc.,\n 580 F.3d 1301 (Fed. Cir. 2009)..................................................................................................8\n\nMeritage Homes, LLC v. AIG Specialty Ins. Co.,\n 2024 WL 221448 (W.D. Tex. Jan. 18, 2024) ............................................................................5\n\nNeural AI, LLC v. NVIDIA Corp.,\n Case No. 7:24-cv-00221-LS-DTG (W.D. Tex.) ................................................................1, 2, 5\n\nTrs. of Bos. Univ. v. Everlight Elecs. Co.,\n 2014 WL 12792496 (D. Mass. Sept. 8, 2014) ...........................................................................6\n\nVelocity Pat. LLC v. FCA US LLC,\n 2017 WL 11893112 (N.D. Ill. Nov. 2, 2017) ............................................................................6\n\nWaller v. Jet Specialty, Inc.,\n 2024 WL 7050192 (W.D. Tex. Nov. 19, 2024) .........................................................................7\n\nRules\n\nFed. R. Civ. P. 26 .............................................................................................................................6\n\nFed. R. Civ. P. 26(b)(1)....................................................................................................................6\n\nFed. R. Civ. P. 45 .................................................................................................................3, 4, 7, 9\n\nFed. R. Civ. P. 45(c)(2)(A) ..........................................................................................................5, 6\n\n\n\n ii\n\f Case 7:26-mc-00323-DC Document 1 Filed 08/18/26 Page 4 of 16\n\n\n\n\nFed. R. Civ. P. 45(d)(2)(B)(i) ..................................................................................................5, 6, 7\n\n\n\n\n iii\n\f Case 7:26-mc-00323-DC Document 1 Filed 08/18/26 Page 5 of 16\n\n\n\n\n This motion arises from Neural AI, LLC v. NVIDIA Corp., Case No. 7:24-cv-00221-LS-\n\nDTG (W.D. Tex.) (the \u201cUnderlying Action\u201d), a patent-infringement action pending in this District.\n\nIn the Underlying Action, Neural AI, LLC (\u201cNAI\u201d) alleges that NVIDIA Corporation (\u201cNVIDIA\u201d)\n\ninfringes through its GPU-accelerated hardware and software: U.S. Patent No. 8,648,867 (the\n\n\u201c\u2019867 Patent\u201d), Reissue Patent No. RE48,438 (the \u201c\u2019438 Patent\u201d), and Reissue Patent No.\n\nRE49,461 (the \u201c\u2019461 Patent\u201d) (collectively, the \u201cAsserted Patents\u201d). See Exhibits 1\u20134.\n\n NVIDIA has made customer deployment central to the Underlying Action, disputing\n\nwhether customers configure and use the accused products as NAI alleges and insisting NAI must\n\nobtain customer evidence to prove indirect infringement. Respondent CoreWeave, Inc.\n\n(\u201cCoreWeave\u201d) is NVIDIA\u2019s formal cloud-services partner, deploying NVIDIA GPU\n\ninfrastructure at scale and giving customers access to NVIDIA-powered systems. See Exhibits 14\u2013\n\n17. CoreWeave holds the customer and deployment evidence NVIDIA says NAI needs, and its\n\nrefusal to produce that evidence leaves NAI without practical means to prove the claims NVIDIA\n\ninsists require such evidence. See Exhibits 13\u201315.\n\n NAI served CoreWeave with a document subpoena on October 15\u201316, 2025, containing\n\ntwenty requests, and a deposition subpoena on June 24, 2026, designating five topics. See Exhibits\n\n5\u20136, 8\u20139. CoreWeave asserted blanket objections to every request and topic. It produced only 55\n\npublicly available webpages\u2014specification sheets, terms-of-service pages, and marketing\n\nmaterials\u2014and no internal deployment records, configurations, usage data, or engineering\n\ndocuments. See, e.g., Exhibit 21; Laiche Decl. \u00b6 26. CoreWeave has produced no witness.\n\n The parties met and conferred beginning July 8, 2026, and NAI identified responsive\n\ncategories, offered a draft declaration in lieu of broader discovery, and invited revisions or equivalent\n\ninformation. See Exhibit 11 at 1, 3; Exhibit 12. CoreWeave acknowledged the offer, promised\n\n\n\n\n 1\n\f Case 7:26-mc-00323-DC Document 1 Filed 08/18/26 Page 6 of 16\n\n\n\n\nproposed edits, and then went silent. It has produced no substantive non-public document, designated\n\nno witness, and offered no meaningful counter-proposal. Laiche Decl. \u00b6 26.\n\n NAI therefore seeks an order compelling rolling production of nonprivileged documents\n\nresponsive to Requests 1\u201320 and a knowledgeable witness on Topics 1\u20135.\n\nI. FACTUAL BACKGROUND\n\n A. The Underlying Litigation\n\n The Underlying Action asserts direct, indirect, and induced infringement of claims 16\u201319\n\nof the \u2019867 Patent; claims 1, 3\u20136, 8\u20139, 12, 14, 17\u201318, 21\u201323, 29\u201330, 32, 40, 43\u201344, 46, 48, 51\u201352,\n\nand 55\u201357 of the \u2019438 Patent; and claims 21\u201325 and 27\u201330 of the \u2019461 Patent (collectively, the\n\n\u201cAsserted Claims\u201d). See Exhibits 1, 18. The Asserted Patents teach GPU-accelerated computing\n\nsystems and methods. See Exhibits 2\u20134.\n\n NAI\u2019s January 20, 2026 Final Infringement Contentions and the Subpoenas identify\n\nintegrated NVIDIA hardware\u2014including GPUs, supercomputers, and servers\u2014and GPU-\n\naccelerated software, including CUDA, cuDNN, TensorRT, and higher-level frameworks, as the\n\nAccused Products. See Exhibit 18 at 2\u20139. NAI alleges that NVIDIA encourages customers to\n\ncombine, configure, and use those products in an infringing manner. See id. at 12\u201313.\n\n NVIDIA disputes that selling the Accused Products establishes customer configuration or\n\ndeployment as NAI alleges, denies infringement, and disclaims knowledge of customer use. See\n\nExhibit 19 \u00b6\u00b6 18, 20\u201323, 87, 131, 171; Laiche Decl. \u00b6 24\u201325. It acknowledges selling the products,\n\npartnering with resellers, managed-service providers, and data-center providers, and supporting\n\ncustomers and partners, but has maintained that NAI must obtain deployment evidence from\n\ncustomers and end users. Laiche Decl. \u00b6 24\u201325.\n\n CoreWeave is NVIDIA\u2019s formal partner and a major cloud-infrastructure deployer. It\n\n\n\n\n 2\n\f Case 7:26-mc-00323-DC Document 1 Filed 08/18/26 Page 7 of 16\n\n\n\n\njoined the Cloud Service Provider Program within the NVIDIA Partner Network as a Preferred\n\nPartner in September 2020, became NVIDIA\u2019s first Elite Cloud Services Provider for compute in\n\nJuly 2021, and in January 2026 announced expanded collaboration to build more than 5 gigawatts\n\nof AI factories by 2030, accompanied by NVIDIA\u2019s reported $2 billion equity investment in\n\nCoreWeave. See Exhibits 13\u201315. NVIDIA described CoreWeave as a cloud platform built on\n\nNVIDIA infrastructure and planned for CoreWeave to develop and operate AI factories using\n\nNVIDIA technology. Exhibit 15 at 1.\n\n CoreWeave\u2019s records concerning configuration, deployment, and use of those products\n\nthus bear directly on infringement and on whether NVIDIA induced or contributed to that use.\n\n B. The Rule 45 Subpoenas to CoreWeave and CoreWeave\u2019s Continued Non-\n Compliance.\n\n NAI served CoreWeave two Rule 45 subpoenas because CoreWeave possesses evidence\n\ndirectly relevant to NAI\u2019s infringement allegations against NVIDIA. The October 15\u201316, 2025\n\ndocument subpoena contains twenty requests concerning CoreWeave\u2019s deployment and use of\n\nNVIDIA GPUs and related software. See Exhibits 5\u20136. The requests seek documents sufficient to\n\nshow CoreWeave\u2019s acquisition, deployment, configuration, and use of NVIDIA hardware and\n\nsoftware, including agreements, configuration files, communications, revenue and usage data, and\n\nengineering documentation bearing on whether and to what extent NVIDIA\u2019s accused products\n\nare configured and used in the manner alleged by NAI in the Underlying Action. See Exhibit 5.\n\n CoreWeave served objections on December 1, 2025 and interposed identical boilerplate\n\nobjections to every request\u2014relevance, proportionality, burden, and availability\u2014without any\n\nrequest-specific analysis or factual support for any claimed burden. See Exhibit 7. It asserted that\n\ninformation was \u201cmore appropriately obtained from NVIDIA,\u201d and also challenged the subpoena\u2019s\n\ndefinitions of \u201cNVIDIA GPU-Acceleration Hardware\u201d and \u201cNVIDIA GPU-Acceleration\n\n\n\n 3\n\f Case 7:26-mc-00323-DC Document 1 Filed 08/18/26 Page 8 of 16\n\n\n\n\nSoftware\u201d as overbroad. See Exhibit 7.\n\n Although CoreWeave agreed to respond to Requests 1\u20135, 7\u20139, 11, and 16, it limited its\n\nproduction to documents sufficient to identify commercial products using NVIDIA hardware or\n\nsoftware, while withholding documents sufficient to show the configuration and scope of that use,\n\nwhich is information necessary to establish infringement and damages. Id. It also flatly refused to\n\nproduce any documents responsive to Requests 6, 12, 13, 15, and 17\u201320. Id.\n\n After CoreWeave\u2019s December 1, 2025 objections, NAI followed up on March 26, 2026,\n\nnoting that CoreWeave had produced nothing despite agreeing to search for several requests. See\n\nExhibit 20 at 3. CoreWeave replied on April 2 that it was conducting a reasonable search and\n\nwould produce nonprivileged responsive materials. Id. at 2. The parties conferred on April 7, and\n\nNAI sent refined definitions and the asserted claims on April 9. Id. at 1.\n\n CoreWeave eventually produced 55 documents, but every document was a publicly\n\navailable webpage from its own website, including instance specifications, shared-responsibility\n\nmaterials, terms of service, and marketing or documentation pages. See, e.g., Exhibit 21; Laiche\n\nDecl. \u00b6 26. That production does not include any internal deployment records, configurations,\n\ncustomer-usage data, engineering documents, or instructions from NVIDIA\u2014precisely the\n\ncategories most probative of infringement. See Exhibit 7; Laiche Decl. \u00b6 26.\n\n On June 24, 2026, NAI served a second Rule 45 subpoena for corporate testimony,\n\ndesignating Austin, Texas as the place of compliance and five topics concerning CoreWeave\u2019s use\n\nand deployment of NVIDIA software. See Exhibits 8\u20139. CoreWeave never served responses and\n\nobjections to the deposition subpoena.\n\n On July 8, CoreWeave proposed information about its business, potentially through a\n\ndeclaration, and asked to move the deposition. Exhibit 10 at 6. NAI agreed to discuss alternatives\n\n\n\n\n 4\n\f Case 7:26-mc-00323-DC Document 1 Filed 08/18/26 Page 9 of 16\n\n\n\n\nand moved the date, and the parties conferred again on July 24. Id. at 5\u20137. On August 3, to reduce\n\nthe burden on CoreWeave, NAI identified questions and categories of records responsive to the\n\nsubpoena. Id. at 4.\n\n NAI went even further. On August 7, NAI offered a draft declaration in lieu of broader\n\ndiscovery and invited CoreWeave to revise it as necessary for accuracy. See Exhibit 12. The\n\ndeclaration sought to establish a narrow set of facts concerning the chain of custody for NVIDIA\n\nproducts, principally that CoreWeave acquires NVIDIA hardware and software and deploys and\n\nconfigures those products in its cloud infrastructure without modifying the NVIDIA hardware or\n\nsoftware in ways material to the accused functionality. Id. CoreWeave acknowledged receipt on\n\nAugust 10 and agreed to provide proposed revisions. See Exhibit 10 at 1. On August 11, NAI\n\nadvised that, absent a resolution, it would seek judicial relief. Id. No response. On August 17,\n\n2026, NAI followed up once more. Id.\n\n As of the filing of this Motion, CoreWeave has not committed to produce additional non-\n\npublic documents, designate a witness, supplement the declaration, or propose a timeline. Laiche\n\nDecl. \u00b6 26. Document discovery in the Underlying Action closed on August 11, 2026, and\n\ndeposition discovery closes on September 16, 2026. NVIDIA stipulated to extend NAI\u2019s third-\n\nparty discovery-motion deadline to August 18, 2026. Laiche Decl. \u00b6 26. Having explained the\n\nrequests, narrowed the issues, offered less burdensome alternatives, and received nothing\n\nsubstantive in return, NAI seeks the Court\u2019s intervention.\n\nII. THE COURT HAS JURISDICTION BECAUSE THE PLACE OF COMPLIANCE\n IN AUSTIN, TX IS PROPER.\n\n Rule 45(d)(2)(B)(i) directs a party seeking to compel compliance to apply to \u201cthe court for\n\nthe district where compliance is required.\u201d Fed. R. Civ. P. 45(d)(2)(B)(i); see also Meritage\n\nHomes, LLC v. AIG Specialty Ins. Co., 2024 WL 221448, at *4 (W.D. Tex. Jan. 18, 2024). Rule\n\n\n\n 5\n\f Case 7:26-mc-00323-DC Document 1 Filed 08/18/26 Page 10 of 16\n\n\n\n\n45(c)(2)(A) permits document production \u201cat a place within 100 miles of where the person resides,\n\nis employed, or regularly transacts business in person.\u201d The issuing party is not limited to selecting\n\na place of compliance within 100 miles of the recipient\u2019s headquarters. See, e.g., Conservation L.\n\nFound., Inc. v. Equilon Enters. LLC, 2025 WL 2821238, at *1 (D.R.I. Oct. 3, 2025); Trs. of Bos.\n\nUniv. v. Everlight Elecs. Co., 2014 WL 12792496, at *3 (D. Mass. Sept. 8, 2014); Velocity Pat.\n\nLLC v. FCA US LLC, 2017 WL 11893112, at *4 (N.D. Ill. Nov. 2, 2017).\n\n The subpoenas designate Lexitas Legal, 100 Congress Ave., Ste. 2000, Austin, Texas 78701,\n\nwithin this District, as the place of compliance. CoreWeave\u2019s Texas nexus is substantial. CoreWeave\n\noperates at least eight data centers in Texas, including multiple facilities within this District: Switch\n\nAUS 4 and EdgeConneX AU02 in the Austin area and the 3301 Hibbetts Road facility in Austin.\n\nSee Exhibit 17. CoreWeave\u2019s careers webpage further shows that it actively employs personnel\n\nthroughout Texas, including Data Center Technicians in Afton, Texas; Fleet Engineering Project\n\nManagers in Dallas, Texas; Supply Chain & Capacity Operations Inventory Control Specialists in\n\nDenton, Texas; and Engineering positions in Plano and Dallas, Texas. See Exhibit 16.\n\n Together, CoreWeave\u2019s extensive data center operations, substantial employee base, and\n\nongoing business activities across Texas\u2014including facilities within this District\u2014establish that it\n\n\u201cregularly transacts business in person\u201d in this District under Rule 45(c)(2)(A). Austin is therefore a\n\nproper place of compliance, and this Court is the proper forum under Rule 45(d)(2)(B)(i).\n\nIII. COREWEAVE MUST PRODUCE DOCUMENTS RESPONSIVE TO THE\n SUBPOENA.\n\n Federal Rule of Civil Procedure 26 permits discovery of any nonprivileged matter relevant\n\nto a claim or defense and proportional to the needs of the case. Fed. R. Civ. P. 26(b)(1). \u201cAt the\n\ndiscovery stage, relevancy is broadly construed.\u201d Flores v. Lowes Home Centers, L.L.C., 2023 WL\n\n3959399, at *2 (W.D. Tex. June 12, 2023). \u201c\u2018[A] request for discovery should be considered\n\n\n\n 6\n\f Case 7:26-mc-00323-DC Document 1 Filed 08/18/26 Page 11 of 16\n\n\n\n\nrelevant if there is any possibility that the information sought may be relevant to the claim or\n\ndefense of any party.\u2019\u201d Id.\n\n Where, as here, a non-party refuses discovery in response to a validly issued subpoena,\n\nFederal Rule of Civil Procedure 45 provides the Court for the district where compliance is required\n\nwith broad discretion to compel the production of documents and information from third parties.\n\nFed. R. Civ. P. 45(d)(2)(B)(i). Once a party moving to compel discovery establishes that the\n\nmaterials are relevant, \u201c[t]he party opposing discovery bears the burden of stating \u2018with specificity\n\nthe grounds for objecting to the request.\u2019\u201d Waller v. Jet Specialty, Inc., 2024 WL 7050192, at *1\n\n(W.D. Tex. Nov. 19, 2024); see also 611 Carpenter LLC v. Atlantic Casualty Ins. Co., 2024 WL\n\n1977160, at *1 (W.D. Tex. April 30, 2024) (granting party\u2019s motion to compel non-party\n\nsubpoena). The non-party \u201cmust state with specificity the objection and how it relates to the\n\nparticular request being opposed, and not merely that it is overly broad and burdensome.\u201d 611\n\nCarpenter, 2024 WL 1977160, at *1.\n\n A. The Requested Discovery Goes to the Heart of NAI\u2019s Infringement Claims.\n\n CoreWeave\u2019s documents and testimony are highly relevant. As an NVIDIA partner,\n\nCoreWeave deploys NVIDIA hardware and software pursuant to NVIDIA\u2019s specifications and\n\ntechnical guidance. Its records therefore show how NVIDIA instructs and expects partners to\n\nconfigure and use the accused products, which is the very third-party evidence NVIDIA says NAI\n\nmust obtain. Laiche Decl. \u00b6\u00b6 24\u201325. CoreWeave\u2019s dual role as NVIDIA partner and cloud provider\n\nalso gives it evidence on both direct infringement and NVIDIA\u2019s knowledge. Its records address\n\ncustomer workloads, NVIDIA software usage, GPU memory allocation, and data movement\n\namong GPU, CPU, host, storage, and network memory. That evidence bears directly on the steps\n\nof the asserted method claims, and NAI\u2019s discovery requests are targeted to those issues.\n\n\n\n\n 7\n\f Case 7:26-mc-00323-DC Document 1 Filed 08/18/26 Page 12 of 16\n\n\n\n\n The twenty document requests are bounded and particular, seeking documents \u201csufficient\n\nto show\u201d an identified technical fact.\n\n \u2022 Requests 1\u20137 identify NVIDIA hardware and software CoreWeave acquires, deploys, and\n uses; CoreWeave products and services dependent on that technology; its agreements with\n NVIDIA; and high-level implementation documentation. They establish the products,\n relationship, and deployment context.\n\n \u2022 Requests 8\u201311 seek source code, configurations, application-layer invocations, derivative\n code, and records concerning NVLink, MIG, and GPU orchestration. They show how\n CoreWeave integrates, customizes, and operates the accused products.\n\n \u2022 Requests 12\u201316 concern NVIDIA communications, performance and business-value\n documents, revenue and usage data, benchmarks, and marketing materials. They bear on\n NVIDIA\u2019s knowledge and inducement, commercial use, and the extent of infringement.\n\n \u2022 Requests 17\u201320 concern third-party software, interactions with other frameworks, and\n engineering documentation. They illuminate the broader software stack and CoreWeave\u2019s\n understanding of the accused technology.\n\nThese requests target whether CoreWeave\u2019s systems and customers\u2019 workloads perform the\n\nasserted method steps and whether NVIDIA\u2019s products and support encourage that use. See Lucent\n\nTechnologies, Inc. v. Gateway, Inc., 580 F.3d 1301, 1321\u201322, 1333-34 (Fed. Cir. 2009) (a patentee\n\nmust show all steps of a claimed method to prove indirect infringement and damages \u201cought to be\n\ncorrelated, in some respect, to the extent the infringing method is used by\u201d directly infringing third\n\nparties); FG SRC LLC v. Xilinx, Inc., 2022 WL 22997130, at *5 (D. Del. Apr. 11, 2022) (\u201c[I]t is\n\nclear that SRC has a need for information from third parties demonstrating that the parties practice\n\nthe asserted claims.\u201d); Kim v. NuVasive, Inc., 2011 WL 3844106, at *3 (S.D. Cal. Aug. 29, 2011)\n\n(\u201cThe Court finds the information sought in the subpoenas is relevant to NuVasive's claim of\n\ninduced infringement and damages therefrom\u201d).\n\n The five deposition topics track the same subjects as the document requests and seek\n\ntestimony on CoreWeave\u2019s use of NVIDIA software, its customizations, and how GPU-\n\ncomputation results move between memory locations.\n\n\n 8\n\f Case 7:26-mc-00323-DC Document 1 Filed 08/18/26 Page 13 of 16\n\n\n\n\n \u2022 Topic 1: the NVIDIA software and libraries CoreWeave uses to perform computations\n on NVIDIA GPUs;\n\n \u2022 Topic 2: NVIDIA sample source code CoreWeave uses, in whole or in part;\n\n \u2022 Topic 3: CoreWeave\u2019s customizations and data inputs that alter how NVIDIA software\n performs computations;\n\n \u2022 Topic 4: identification of CoreWeave software that uses NVIDIA GPUs to perform\n computations; and\n\n \u2022 Topic 5: how output and intermediate GPU computation results are stored, transferred,\n copied, streamed, written back, returned, accumulated, reused, or otherwise made\n available between GPU memory and CPU, host, system, storage, display, network, or\n other memory locations.\n\nThe testimony is proportional. It is limited to five topics, the same defined period and U.S. nexus,\n\nand information NVIDIA says it cannot provide about CoreWeave\u2019s internal configurations.\n\n NAI also offered the draft declaration as a less burdensome alternative and would accept it\n\nin lieu of document production and testimony. See Exhibits 10, 12. CoreWeave never accepted\n\nthat alternative, proposed edits, or provided equivalent discovery. The information is central to the\n\ndispute, within CoreWeave\u2019s possession, and sought through targeted, time-limited requests and\n\ntopics. CoreWeave should be compelled to produce it.\n\n B. CoreWeave Has Not Substantiated Burden and NAI Offered Narrower\n Alternatives.\n\n CoreWeave\u2019s rote, undifferentiated objections fail to identify the actual burden\u2014in time,\n\ncost, or disruption\u2014associated with any single request or topic, as Rule 45 requires. See 611\n\nCarpenter LLC, 2024 WL 1977160, at *1. Repeating the same objections across twenty requests\n\ndoes not establish undue burden or outweigh the discovery\u2019s relevance. See Exhibit 7.\n\n CoreWeave\u2019s principal objection\u2014that the requested information is \u201cavailable from\n\nNVIDIA\u201d or \u201cmore appropriately obtained from NVIDIA\u201d\u2014fails. NVIDIA has repeatedly\n\ndisclaimed knowledge of how its customers, partners, and end users actually deploy and configure\n\n\n\n 9\n\f Case 7:26-mc-00323-DC Document 1 Filed 08/18/26 Page 14 of 16\n\n\n\n\nNVIDIA hardware and software. Laiche Decl. \u00b6\u00b6 24\u201325. Indeed, NVIDIA represented to the Court\n\nin the underlying action that, to determine how the accused products are deployed in real-world\n\nsystems, NAI must obtain that information directly from NVIDIA\u2019s customers, partners, and end\n\nusers. Id. That is precisely what NAI seeks here. CoreWeave\u2019s own deployment records, customer-\n\nusage data, engineering documents, workload specifications, and system configurations are\n\nuniquely within CoreWeave\u2019s possession and are not available from NVIDIA.\n\n CoreWeave\u2019s definitions and time-frame objections also do not justify withholding\n\ndiscovery. The definition tracks the Accused Products identified in NAI\u2019s infringement contentions\n\n(Exhibit 7 at 2\u20139), and the requests seek documents \u201csufficient to show\u201d facts about products\n\nCoreWeave actually deploys. Exhibit 5. The subpoenas are also limited to September 13, 2018 to\n\nthe present and U.S.-based or U.S.-directed activity. Id. at 17. NAI minimized burden by proposing\n\na draft declaration in lieu of broader discovery and inviting CoreWeave to propose modifications.\n\n CoreWeave has offered no concrete search estimate, production timeline, revised\n\ndeclaration, witness, or counter-proposal. See Laiche Decl. \u00b6 26. CoreWeave has had nearly a year\n\nsince the first subpoena and weeks since acknowledging the draft declaration. NAI should not be\n\nrequired to accept an open-ended investigation in place of the discovery NVIDIA says NAI must\n\nobtain.\n\nIV. CONCLUSION\n\n For the foregoing reasons, NAI respectfully requests that this Court (1) compel CoreWeave\n\nto produce nonprivileged documents responsive to Requests 1\u201320 on a rolling basis to be completed\n\nwithin twenty-one (21) days of the Court\u2019s order, and (2) compel CoreWeave to designate and\n\nproduce a knowledgeable witness on Deposition Topics 1\u20135 within thirty (30) days of the Court\u2019s\n\norder.\n\n\n\n\n 10\n\f Case 7:26-mc-00323-DC Document 1 Filed 08/18/26 Page 15 of 16\n\n\n\n\nDated: August 18, 2026\n\n\n Respectfully submitted,\n\n /s/ Rocco Magni\n Max L. Tribble\n Texas State Bar 20213950\n Brian D. Melton\n Texas State Bar 24010620\n Rocco Magni\n Texas State Bar 24092745\n Samuel Drezdzon\n Texas State Bar 24117374\n SUSMAN GODFREY L.L.P.\n 1000 Louisiana\n Suite 5100\n Houston, TX 77002\n Telephone: (713) 651-9366\n Facsimile: (713) 654-6666\n mtribble@susmangodfrey.com\n bmelton@susmangodfrey.com\n rmagni@susmangodfrey.com\n sdrezdzon@susmangodfrey.com\n\n Tamar Lusztig\n NY State Bar 5125174\n Emily Portuguese\n NY State Bar 5920327\n One Manhattan West, 50th Floor\n New York, NY 10001\n tlusztig@susmangodfrey.com\n eportuguese@susmangodfrey.com\n\n Tanner Laiche\n WA State Bar 60450\n 401 Union Street, Suite 3000\n Seattle, WA 98101\n tlaiche@susmangodfrey.com\n\n Attorneys for Petitioner Neural AI, LLC\n\n\n\n\n 11\n\f Case 7:26-mc-00323-DC Document 1 Filed 08/18/26 Page 16 of 16\n\n\n\n\n CERTIFICATE OF SERVICE\n\n The undersigned does hereby certify that on August 18, 2026, a true and correct copy of\n\nthe foregoing document was served on counsel for CoreWeave, Inc. and all counsel of record in\n\nthe underlying action.\n\n\n /s/ Rocco Magni\n Rocco Magni\n\n\n\n CERTIFICATE OF CONFERENCE\n\n The undersigned certifies that counsel for Neural AI, LLC conferred in good faith with\n\ncounsel for non-party CoreWeave, Inc. regarding the issues raised in this Motion, including\n\nthrough a Zoom conference on or about July 24, 2026, and extensive related email correspondence\n\nbetween July 8, 2026 and August 17, 2026. Despite those efforts, the parties were unable to resolve\n\nthe dispute.\n\n /s/ Rocco Magni\n Rocco Magni\n\n\n\n\n 12\n\f","ocr_status":1,"date_upload":"2026-08-19T14:32:32.727499-07:00","document_number":"1","attachment_number":null,"pacer_doc_id":"181037219941","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":1,"description":"Compel","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622532/","id":490622532,"tags":[],"absolute_url":"/docket/74666997/1/1/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.256901-07:00","date_modified":"2026-08-23T07:31:02.131196-07:00","sha1":"b97bd2786b0843be5e144f76c965c312e771dcd2","page_count":5,"file_size":173972,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.1.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.1.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":" Case 7:26-mc-00323-DC Document 1-1 Filed 08/18/26 Page 1 of 5\n\n\n\n\n IN THE UNITED STATES DISTRICT COURT\n FOR THE WESTERN DISTRICT OF TEXAS\n MIDLAND/ODESSA DIVISION\n\n\n NEURAL AI, LLC,\n Misc. Case No. 7:26-mc-323\n Petitioner,\n Principal case pending in Western District of\n v. Texas, Civil Action No. 7:24-cv-00221-LS-\n DTG\n COREWEAVE, INC.,\n\n Respondent.\n\n\n DECLARATION OF TANNER LAICHE IN SUPPORT OF NEURAL AI\u2019S\n MOTION TO COMPEL COMPLIANCE WITH SUBPOENA\n SERVED ON THIRD-PARTY COREWEAVE, INC.\n\n I, Tanner Laiche, declare as follows:\n\n 1. I am an attorney duly licensed to practice in the States of California and Washington\n\nand am admitted to the Western District of Texas. I am an associate at the law firm of Susman\n\nGodfrey LLP, and am a counsel of record for Petitioner Neural AI, LLC (\u201cNAI\u201d) in the above-\n\ncaptioned matter. I make this declaration in support of NAI\u2019s Motion to Compel Compliance with\n\nSubpoena Served on Third-Party Coreweave, Inc. (\u201cCoreWeave\u201d). Unless otherwise stated, I have\n\npersonal knowledge of the facts set forth herein and could competently testify thereto.\n\n 2. Attached hereto as Exhibit 1 is a true and correct copy of NAI\u2019s First Amended\n\nComplaint for Patent Infringement filed in the Underlying Action on December 12, 2024.\n\n 3. Attached hereto as Exhibit 2 is a true and correct copy of U.S. Patent No.\n\n8,648,867, entitled \u201cGraphic Processor Based Accelerator System and Method.\u201d\n\n 4. Attached hereto as Exhibit 3 is a true and correct copy of Reissue Patent No.\n\nRE48,438, entitled \u201cGraphic Processor Based Accelerator System and Method.\u201d\n\n\n\n\n 1\n\f Case 7:26-mc-00323-DC Document 1-1 Filed 08/18/26 Page 2 of 5\n\n\n\n\n 5. Attached hereto as Exhibit 4 is a true and correct copy of Reissue Patent No.\n\nRE49,461, entitled \u201cGraphic Processor Based Accelerator System and Method.\u201d\n\n 6. Attached hereto as Exhibit 5 is a true and correct copy of NAI\u2019s Notice of Service\n\nof Subpoena to CoreWeave, Inc., filed on October 15, 2025, including the subpoena and\n\naccompanying definitions, instructions, and requests for production.\n\n 7. Attached hereto as Exhibit 6 is a true and correct copy of the Affidavit of Service\n\nconfirming service of the subpoena on CoreWeave\u2019s registered agent on October 16, 2025.\n\n 8. Attached hereto as Exhibit 7 is a true and correct copy of Non-Party CoreWeave,\n\nInc.\u2019s Objections and Responses to Plaintiff Neural AI, LLC\u2019s Subpoena, dated December 1, 2025.\n\n 9. Attached hereto as Exhibit 8 is a true and correct copy of NAI\u2019s Notice of Service\n\nof Deposition Subpoena to CoreWeave, Inc., served on June 24, 2026, including the accompanying\n\ndeposition topics.\n\n 10. Attached hereto as Exhibit 9 is a true and correct copy of the Affidavit of Service\n\nconfirming service of the deposition subpoena on CoreWeave\u2019s registered agent on June 26, 2026.\n\n 11. Attached hereto as Exhibit 10 is a true and correct copy of meet-and-confer\n\ncorrespondence between counsel for NAI and counsel for CoreWeave regarding NAI\u2019s subpoenas,\n\ndated July 8, 2026 through August 17, 2026.\n\n 12. Attached hereto as Exhibit 11 is a true and correct copy of additional meet-and-\n\nconfer correspondence between counsel for NAI and counsel for CoreWeave, including NAI\u2019s\n\ndetailed categories of responsive documents provided on August 3, 2026.\n\n 13. Attached hereto as Exhibit 12 is a true and correct copy of NAI\u2019s Draft Third-Party\n\nDeclaration provided to CoreWeave on August 7, 2026.\n\n 14. Attached hereto as Exhibit 13 is a true and correct copy of a CoreWeave blog post\n\n\n\n\n 2\n\f Case 7:26-mc-00323-DC Document 1-1 Filed 08/18/26 Page 3 of 5\n\n\n\n\ntitled \u201cCoreWeave Joins NVIDIA Partner Network as Preferred Cloud Provider,\u201d dated September\n\n2020. I obtained this document from CoreWeave\u2019s publicly accessible website on August 17,\n\n2026.\n\n 15. Attached hereto as Exhibit 14 is a true and correct copy of a CoreWeave blog post\n\ntitled \u201cCoreWeave Becomes NVIDIA\u2019s First Elite Cloud Services Provider for Compute,\u201d dated\n\nJuly 2021. I obtained this document from CoreWeave\u2019s publicly accessible website on August 17,\n\n2026.\n\n 16. Attached hereto as Exhibit 15 is a true and correct copy of an NVIDIA press release\n\ntitled \u201cNVIDIA and CoreWeave Strengthen Collaboration to Accelerate Buildout of AI Factories,\u201d\n\ndated January 26, 2026. I obtained this document from NVIDIA\u2019s publicly accessible website on\n\nAugust 17, 2026.\n\n 17. Attached hereto as Exhibit 16 is a true and correct copy of the CoreWeave Careers\n\nwebpage, printed from CoreWeave\u2019s website. I obtained this document from CoreWeave\u2019s\n\npublicly accessible website on August 17, 2026.\n\n 18. Attached hereto as Exhibit 17 is a true and correct copy of data center records\n\nidentifying CoreWeave\u2019s data center facilities in Texas. I obtained this document from a publicly\n\naccessible website on August 17, 2026.\n\n 19. Attached hereto as Exhibit 18 is a true and correct copy of NAI\u2019s January 20, 2026\n\nFinal Infringement Contentions filed in the Underlying Action.\n\n 20. Attached hereto as Exhibit 19 is a true and correct copy of NVIDIA\u2019s Amended\n\nAnswer to NAI\u2019s Amended Complaint, filed on November 25, 2025, as docketed at Dkt. 130 in\n\nthe Underlying Action (public, redacted version).\n\n 21. Attached hereto as Exhibit 20 is a true and correct copy of additional meet-and-\n\n\n\n\n 3\n\f Case 7:26-mc-00323-DC Document 1-1 Filed 08/18/26 Page 4 of 5\n\n\n\n\nconfer correspondence between counsel for NAI and counsel for CoreWeave from October 2025\n\nthrough April 2026 regarding the initial document subpoena.\n\n 22. Attached hereto as Exhibit 21 is a true and correct copy of a document produced\n\nby CoreWeave bearing Bates number COREWEAVE_0000286, which is a publicly available\n\nwebpage from CoreWeave\u2019s website titled \u201cShared Responsibility Model.\u201d\n\n 23. The Underlying Action\u2014Neural AI, LLC v. NVIDIA Corporation, Case No. 7:24-\n\ncv-00221-LS-DTG (W.D. Tex.)\u2014is a patent infringement action in which NAI alleges that\n\nNVIDIA Corporation\u2019s (\u201cNVIDIA\u201d) GPU-accelerated computing hardware and software infringe\n\nU.S. Patent No. 8,648,867 (the \u201c\u2019867 Patent\u201d), Reissue Patent No. RE48,438 (the \u201c\u2019438 Patent\u201d),\n\nand Reissue Patent No. RE49,461 (the \u201c\u2019461 Patent\u201d) (collectively, the \u201cAsserted Patents\u201d).\n\n 24. Throughout discovery in the Underlying Action, NVIDIA has taken the position\n\nthat NAI must obtain evidence from NVIDIA\u2019s customers, partner, and end users to prove how\n\nthe accused products are actually deployed and configured. During a sealed discovery conference\n\non September 8, 2025, NVIDIA\u2019s counsel represented to the Court that it only provides tools for\n\nend-user companies to build their own AI applications on NVIDIA hardware and that if NAI\n\nwanted to learn how the accused software was deployed in real-world systems, NAI would need\n\nto seek that information directly from NVIDIA\u2019s customers, partners, and end users.\n\n 25. Throughout discovery NVIDIA has also disclaimed knowledge concerning how its\n\ncustomers, partners, and end users ultimately deploy, configure, and operate NVIDIA hardware\n\nand software. NAI accordingly turned to third-party discovery, including subpoenas to\n\nCoreWeave, to obtain the evidence NVIDIA contends NAI must have.\n\n 26. As of the date of this declaration, CoreWeave has not: (a) produced any substantive\n\nnon-public documents responsive to the subpoena; (b) designated a witness for deposition; (c)\n\n\n\n\n 4\n\f Case 7:26-mc-00323-DC Document 1-1 Filed 08/18/26 Page 5 of 5\n\n\n\n\nprovided proposed edits to or executed the draft declaration; or (d) offered any counter-proposal.\n\nDocument discovery in the Underlying Action closed on August 11, 2026. Defendant NVIDIA in\n\nthe Underlying Action stipulated to extend the deadline for third-party motions to compel to\n\nAugust 18, 2026. Deposition discovery closes on September 16, 2026.\n\n I declare under penalty of perjury under the laws of the United States of America that the\n\nforegoing is true and correct.\n\n Executed on August 18, 2026, in Seattle, Washington.\n\n\n\n\n Tanner Laiche\n\n\n\n\n 5\n\f","ocr_status":2,"date_upload":"2026-08-19T15:07:49.337530-07:00","document_number":"1","attachment_number":1,"pacer_doc_id":"181037219942","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Affidavit of Tanner Laiche","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622533/","id":490622533,"tags":[],"absolute_url":"/docket/74666997/1/2/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.285329-07:00","date_modified":"2026-08-23T02:40:32.210833-07:00","sha1":"ffa066b7bdd20a4e0c423fdd87e7899de823a57a","page_count":95,"file_size":2296844,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.2.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.2.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-2 Filed 08/18/26 Page 1 of 95\n\n\n\n\n EXHIBIT\n\n 1\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 2 of1 95\n of 94\n\n\n\n\n UNITED STATES DISTRICT COURT\n FOR THE WESTERN DISTRICT OF TEXAS\n MIDLAND-ODESSA DIVISION\n\nNEURAL AI, LLC )\n )\n )\n Plaintiff, )\nv. ) Civil Action No. 7:24-cv-00221\n )\nNVIDIA CORPORATION )\n ) JURY TRIAL DEMANDED\n )\n Defendant. )\n )\n\n FIRST AMENDED COMPLAINT FOR PATENT INFRINGEMENT\n\n Neural AI, LLC (\u201cNeural AI\u201d or \u201cPlaintiff\u201d) alleges against Defendant Nvidia Corporation\n\n(\u201cNvidia\u201d or \u201cDefendant\u201d) the following:\n\n 1. This case involves patented technologies that revolutionized, and have become\n\nwidely adopted in, the field of graphical processor unit (\u201cGPU\u201d)-accelerated computing for\n\nartificial intelligence, machine learning, and complex numerical simulations. GPU-accelerated\n\ncomputing powers many of the most advanced and powerful forms of artificial intelligence that\n\nhave exploded over the past decade.\n\n 2. Highly complex numerical simulations, such as the prediction of protein chains,\n\ngenetic sequences and cryptographic sequences, and advanced machine learning techniques such\n\nas deep learning neural networks, require hardware capable of a high degree of parallel processing\n\nfor efficient computation. GPUs, which generally have hundreds to thousands more computational\n\nprocessors or \u201ccores\u201d than central processing units (\u201cCPUs\u201d), are the preferred hardware for\n\nexecuting such simulations and machine learning techniques. Indeed, the parallel operation of\n\nthousands of high-performance GPUs have become a basic necessity for the execution and training\n\n\n\n\n 1\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 3 of2 95\n of 94\n\n\n\n\nof complex natural language and image-generation models, such as ChatGPT\u2019s GPT-4 and\n\nSora.AI. (See https://www.fierceelectronics.com/sensors/chatgpt-runs-10k-nvidia-training-gpus-\n\npotential-thousands-more.)\n\n 3. Before Plaintiff\u2019s innovations, the conventional wisdom in the field of GPU-\n\naccelerated computing was that the exchange of intermediate outputs between a GPU and a CPU\n\nwas too computationally expensive. This was so because the GPU, adapted for highly parallel\n\nprocessing tasks (e.g., graphically modeling a physics engine or rendering complex moving\n\nimages), was ill-suited for handling operations better left to the CPU, like interacting with a user\u2019s\n\nmouse and keyboard or sending and receiving simple datasets. Plaintiff\u2019s foundational technology\n\nchanged this by inventing techniques that leveraged the unique advantages of both the CPU and\n\nthe GPU to enable their efficient interplay in hardware-accelerated computing.\n\n 4. Plaintiff\u2019s patented technologies are enshrined in U.S. Patent Nos. 8,648,867 (\u201cthe\n\n\u2019867 Patent\u201d), RE49,461 (\u201cthe \u2019461 Patent\u201d), and RE48,438 (\u201cthe \u2019438 Patent\u201d) (collectively, \u201cthe\n\nAsserted Patents\u201d or \u201cThe GPU-Based Acceleration Patents\u201d).\n\n NATURE OF THE CASE\n\n 5. Plaintiff brings claims under the patent laws of the United States, 35 U.S.C. \u00a7 1, et\n\nseq., for infringement of the Asserted Patents. Defendant has infringed and continues to infringe\n\neach of the Asserted Patents under at least 35 U.S.C. \u00a7\u00a7271(a), 271(b) and 271(c).\n\n THE PARTIES\n\n 6. Plaintiff Neural AI, LLC, is the owner by assignment of each of the Asserted\n\nPatents.\n\n 7. The technology of the Asserted Patents underpins multiple artificial intelligence\n\nand accelerated computing products that incorporate the patented technology, such as Neurala,\n\n\n\n\n 2\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 4 of3 95\n of 94\n\n\n\n\nInc.\u2019s Vision Inspection Automation (VIA), Vision AI software, and Brain Builder platform.\n\n 8. Neural AI is a Texas limited liability company and is a registered business in Texas.\n\nNeural AI maintains its principal office in this District, at 510 Austin Avenue, Suite 2554, Waco,\n\nTX 76701.\n\n 9. Defendant Nvidia Corporation is a Delaware corporation with its headquarters and\n\nprincipal place of business in Santa Clara, California. (See https://investor.nvidia.com/financial-\n\ninfo/sec-filings/sec-filings-details/default.aspx?FilingId=17293267, U.S. Securities and Exchange\n\nCommission Form 10-K for Fiscal Year Ended January 28, 2024;\n\nhttps://nvidianews.nvidia.com/multimedia/santa-clara-headquarters.) Defendant Nvidia\n\nCorporation is registered with the Secretary of State to conduct business in Texas. Nvidia has an\n\noffice in this District located in Austin, Texas. (See https://www.nvidia.com/en-us/contac.)\n\n JURISDICTION & VENUE\n\n 10. This action arises under the Patent Laws of the United States, 35 U.S.C. \u00a7 1, et seq.\n\nThe Court has subject matter jurisdiction pursuant to 28 U.S.C. \u00a7\u00a7 1331 and 1338(a).\n\n 11. This Court has personal jurisdiction over Defendant because it regularly conducts\n\nbusiness in the State of Texas and in this District. This business includes operating systems, using\n\nand/or providing computer hardware, software, firmware, and platforms, and/or providing services\n\nand/or engaging in activities in Texas and in this District that infringe one or more claims of the\n\nAsserted Patents, as well as inducing and contributing to the direct infringement of others through\n\nacts in this District.\n\n 12. Nvidia has also, directly and through its extensive network of partnerships,\n\nincluding with local IT service providers, purposefully and voluntarily placed products and/or\n\nprovided services that practice and/or implement the methods, systems, and apparatuses claimed\n\n\n\n\n 3\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 5 of4 95\n of 94\n\n\n\n\nin the Asserted Patents into the stream of commerce with the intention and expectation that they\n\nwill be purchased and used by customers in this District, as detailed below. (See\n\nhttps://www.nvidia.com/en-us/about-nvidia/partners/.)\n\n 13. Defendant has also acknowledged that this Court has personal jurisdiction over it\n\nin cases filed against it in this District. (See, e.g., Vantage Micro LLC v. NVIDIA Corporation,\n\nCase No. 6:19-cv-00582-RP, ECF 22 (W.D. Tex., Jan. 4, 2020) (admitting to personal\n\njurisdiction); Ocean Semiconductor LLC v. NVIDIA Corporation, Case No. 6:20-cv-01211-ADA,\n\nECF 14 (W.D. Tex., Mar. 12, 2021) (same).) Defendant has admitted \u201cit is subject to this Court\u2019s\n\ngeneral personal jurisdiction.\u201d (Id.)\n\n 14. Venue is proper in this District pursuant to 28 U.S.C. \u00a7\u00a7 1391(b) and (c) and 28\n\nU.S.C. \u00a7 1400(b) because Defendant Nvidia Corporation has regular and systematic contacts\n\nwithin this District and has committed acts of infringement within this District.\n\n 15. Defendant Nvidia Corporation is a registered business in Texas and has regular and\n\nestablished places of business in this District. Nvidia has an office in this District located at 11001\n\nLakeline Blvd, Suite 100 Bldg. 2, Austin, Texas 78717. (See https://craft.co/nvidia.) Nvidia\u2019s\n\nAustin office has \u201c54,000 SF of new shell office and DVS labs\u201d and \u201c35,000 SF of offices, testing\n\nand software labs.\u201d (See https://kiddgrp.com/project/nvidia-corporation/.)\n\n 16. Defendant Nvidia Corporation has hundreds of employees in this District\u2014\n\nincluding positions in engineering, sales, marketing, and finance. LinkedIn lists approximately 792\n\npersons associated with Nvidia and identified as being located in the Austin or Austin metropolitan\n\narea. (See\n\nhttps://www.linkedin.com/company/nvidia/people/?facetGeoRegion=104472865%2C90000064.)\n\nLinkedIn also lists approximately 1,158 persons associated with Nvidia and identified as being\n\n\n\n\n 4\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 6 of5 95\n of 94\n\n\n\n\nlocated in the State of Texas. (See id.)\n\n 17. In addition, Defendant Nvidia Corporation has over 100 jobs posted for the State\n\nof Texas on its affiliated Workday page with approximately 93 of those jobs\u2014the vast majority of\n\nwhich are engineering jobs\u2014listed for Austin, Texas. (See\n\nhttps://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite?locations=91336993fab910\n\naf6d702939a7fcc2d9&locations=91336993fab910af6d702b631b94c2de (approximately 111\n\nNvidia job postings for Texas).) These jobs are particularly relevant to the Asserted Patents and\n\nAccused Products, as defined below, because they pertain to artificial intelligence, machine\n\nlearning, deep learning, data centers, accelerated computing, high performance computing\n\n(\u201cHPC\u201d), and related hardware, software, and/or firmware\u2014including Nvidia\u2019s GPUs, CPUs,\n\nsystems-on-a-chip (\u201cSoCs\u201d), platforms, and application programming interfaces.\n\n 18. Nvidia\u2019s operations in this District include client outreach and sales for each of the\n\nAccused Products and related or supporting services. As detailed above, Nvidia has customer-\n\nfacing personnel and operations in this District. Nvidia also provides technical support to partners\n\nand customers for its products in the District.\n\n 19. Nvidia has committed acts of infringement within this District. Nvidia uses the\n\nAccused Products in this District in manners that practice the Asserted Patents, including by testing\n\nthe Accused Products and by using the Accused Products at its offices and premises in this District.\n\n 20. Defendant makes, uses, advertises, offers for sale, and/or sells hardware for\n\naccelerated computing, including GPUs, CPUs, and SoCs; computers for accelerated computing\n\n(e.g., supercomputers, servers, and data centers for high performance computing); and computer\n\nplatform software-as-a-service (\u201cSaaS\u201d) that implements accelerated computing (including the\n\nAccused Products) in the State of Texas and in this District directly and/or through its partnerships\n\n\n\n\n 5\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 7 of6 95\n of 94\n\n\n\n\nwith businesses in the State of Texas and in this District. Defendant also provides data center and\n\nHPC services that practice the Asserted Patents in the State of Texas and in this District directly\n\nand/or through its partnerships with businesses in the State of Texas and in this District.\n\n 21. Nvidia sells, offers for sale, advertises, makes, installs, and/or otherwise provides\n\nhardware, software, firmware, and/or computer platforms for accelerated computing and data\n\ncenter and HPC services, including the Accused Products, the use of which infringes the Asserted\n\nPatents in this District and the State of Texas. (See https://www.nvidia.com/en-us/data-\n\ncenter/solutions/accelerated-computing/.) Nvidia performs these acts directly and/or through its\n\npartnerships with other entities. (See id. (\u201cNVIDIA has defined a range of accelerated platforms\n\nthat each consist of hardware systems designed according to the needs of the use case as well as\n\nthe software stack that enables the operation and management of the business applications. These\n\nhardware systems and software are available from NVIDIA and our partners.\u201d).)\n\n 22. Nvidia also uses a network of partners, which comprise re-sellers, managed service\n\nproviders, and product and solution experts, to provide the Accused Products and implementation\n\nservices for the Accused Products to customers in this District. Each of these partners sells, offers\n\nfor sale, installs, and/or implements Nvidia\u2019s accelerated computing hardware, software, and/or\n\ncomputer platform services. (See https://www.nvidia.com/en-us/about-nvidia/partners/.)\n\n 23. Nvidia\u2019s partners include \u201cData Center Provider[s].\u201d (See\n\nhttps://www.nvidia.com/en-us/about-nvidia/partners/.) Nvidia\u2019s Data Center Provider partners\n\n\u201coffer colocation services such as high-density data center facilities, interconnected infrastructure,\n\nand state-of-art cooling technologies for hosting NVIDIA DGX\u2122 servers globally.\u201d (See id.)\n\nNvidia\u2019s Data Center Provider partners in the \u201cNVIDIA DGX-Ready Data Center program, built\n\non the NVIDIA DGX\u2122 platform and delivered by NVIDIA partners,\u201d help \u201caccelerate the scaling\n\n\n\n\n 6\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 8 of7 95\n of 94\n\n\n\n\nof AI across [a customer\u2019s] organization.\u201d (See https://www.nvidia.com/en-us/data-\n\ncenter/colocation-partners/#aligned-energy.)\n\n 24. As further detailed below, Nvidia engages in activities that directly infringe the\n\nAsserted Patents within this District. For example, Nvidia\u2019s operation and use of its accelerated\n\ncomputing hardware, software, and/or computer platform services, including its data center-scale\n\naccelerated computing platforms, within this District infringe the Asserted Patents.\n\n 25. Nvidia also infringes (directly or indirectly) the Asserted Patents by providing\n\nservices in connection with the Accused Products including installing, maintaining, supporting,\n\noperating, providing instructions, and/or advertising Nvidia\u2019s computer platform, data center, and\n\nHPC services within this District. For example, under Nvidia\u2019s cloud and data center line of\n\nproducts and services, the Nvidia DGX platform is a \u201ca fully integrated hardware and software AI\n\nplatform\u201d and \u201ccombines the best of NVIDIA software, infrastructure, and expertise in a modern,\n\nunified AI development solution.\u201d (See https://www.nvidia.com/en-us/data-center/dgx-platform/.)\n\nIndeed, \u201cDGX infrastructure is a complete AI solution, and includes NVIDIA AI Enterprise\n\nsoftware to accelerate data science pipelines and streamline development and deployment of\n\nproduction-grade AI applications.\u201d (See id.) Nvidia platform user and partner customers infringe\n\nthe Asserted Patents by installing and operating Nvidia\u2019s computer platform software, which\n\nperforms the claimed methods in the Asserted Patents within this District. (See also, e.g.,\n\nhttps://www.nvidia.com/en-us/data-center/products/ai-enterprise/ (Nvidia AI Enterprise);\n\nhttps://developer.nvidia.com/cuda-zone (Nvidia CUDA Toolkit); https://www.nvidia.com/en-\n\nus/data-center/gpu-cloud-computing/ (GPU Cloud Computing).)\n\n 26. Defendant encourages and induces its customers of the Accused Products to\n\nperform the methods claimed in the Asserted Patents. For example, Nvidia makes its accelerated\n\n\n\n\n 7\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 9 of8 95\n of 94\n\n\n\n\ncomputing platforms and services available on its website, widely advertises those platforms and\n\nservices, provides applications that allow partners and users to access those platforms and services,\n\nprovides instructions for installing, and maintaining those platforms and services and supporting\n\nsoftware and/or firmware, and provides technical support to users. (See\n\nhttps://www.nvidia.com/en-us/data-center/dgx-support/.)\n\n 27. Nvidia further encourages and induces its customers to operate Nvidia\u2019s hardware\n\nand software in an infringing manner, and to use Nvidia\u2019s infringing computer platforms, by\n\nproviding directions for and encouraging customers to install software, such as software for\n\nNVIDIA AI Enterprise and CUDA, (see https://docs.nvidia.com/ai-enterprise/deployment-guide-\n\nvmware/0.1.0/software.html; https://developer.nvidia.com/cuda-downloads), which offers\n\nevaluation, installation, configuration, customization, and development of Nvidia\u2019s infringing\n\nsoftware products and services.\n\n 28. Defendant also contributes to the infringement of its customers and end users of the\n\nAccused Products by offering within the United States or importing into the United States the\n\nAccused Products, which are for use in practicing, and under normal operation practice, one or\n\nmore of the methods claimed in the Asserted Patents, constituting a material part of the inventions\n\nclaimed, and not a staple article or commodity of commerce suitable for substantial non-infringing\n\nuses. Indeed, as shown herein, the Accused Products and the example functionality described\n\nbelow have no substantial non-infringing uses and are specifically designed to practice the methods\n\nclaimed in the Asserted Patents.\n\n 29. On information and belief, Defendant has not disputed that venue is proper in this\n\nDistrict in cases filed against it in this District. (See, e.g., Vantage Micro LLC v. NVIDIA Corp.,\n\nNo. 6:19-cv-00582, ECF 22; Polaris Innovations Ltd. v. Dell Inc. et al., No. 5:16-cv-00451, ECF\n\n\n\n\n 8\n\f Case\n Case7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30Filed\n Filed\n 08/18/26\n 12/12/24Page\n Page\n 10 of\n 9 of\n 9594\n\n\n\n\n19; Cirrus Logic, Inc. v. ATI Techs., et al., No. 1:03-cv-00302, ECF 6.)\n\n 30. Defendant\u2019s infringement adversely impacts Plaintiff in this District.\n\n PLAINTIFF\u2019S PATENTED INNOVATIONS\n\n 31. The Asserted Patents pioneered the adaptation of GPU-acceleration technology to\n\nthe supervised execution of complex artificial intelligence algorithms and numerical simulations,\n\nsuch that it became possible for the first time to dynamically supervise, review, and correct\n\nintermediate \u201csolutions\u201d that were produced by these accelerated algorithms and simulations\n\nwithout performance loss.\n\n The GPU-Based Acceleration Patents\n U.S. Patent Nos. 8,648,867, RE49,461, and RE48,438\n\n 32. The \u2019867, \u2019461, and \u2019438 Patents are part of the same patent family and generally\n\ndisclose and claim systems and methods related to the accelerated execution of numerical\n\nsimulations and neural networks such that the intermediate outputs of a given execution \u201cstep\u201d can\n\nbe dynamically transferred from the GPU to the CPU, reviewed, and corrected within the same\n\ncomputational cycle before being fed as inputs to the next execution step.\n\n 33. The \u2019867 Patent is entitled \u201cGraphic Processor Based Accelerator System and\n\nMethod,\u201d was filed on September 24, 2007, and was duly and legally issued by the United States\n\nPatent and Trademark Office (\u201cUSPTO\u201d) on February 11, 2014. The \u2019867 Patent claims priority\n\nto Provisional Application No. 60/826,892, filed on September 25, 2006. A true and correct copy\n\nof the \u2019867 Patent is attached as Exhibit 1.\n\n 34. The \u2019438 Patent is entitled \u201cGraphic Processor Based Accelerator System and\n\nMethod,\u201d was filed on November 9, 2017, and was duly and legally issued by the USPTO on\n\nFebruary 16, 2021. The \u2019438 Patent is a re-issue of the \u2019867 Patent and claims priority to\n\nProvisional Application No. 60/826,892, filed on September 25, 2006. A true and correct copy of\n\n\n\n 9\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 11 10\n of 95\n of 94\n\n\n\n\nthe \u2019438 Patent is attached as Exhibit 2.\n\n 35. The \u2019461 Patent is also entitled \u201cGraphic Processor Based Accelerator System and\n\nMethod,\u201d was filed on December 29, 2020, and was duly and legally issued by the USPTO on\n\nMarch 14, 2023. The \u2019461 Patent is a re-issue of the \u2019867 Patent and claims priority to Provisional\n\nApplication No. 60/826,892, filed on September 25, 2006. A true and correct copy of the \u2019461\n\nPatent is attached as Exhibit 3.\n\n 36. The \u2019867 Patent improves upon prior GPU acceleration technology by disclosing\n\nand claiming a novel hardware and firmware system for performing a numerical simulation that\n\npermits dynamic editing of the outputs that flow from intermediate \u201csteps\u201d of that simulation,\n\nbefore they become inputs to the next \u201cstep.\u201d In particular, the \u2019867 patent discloses a CPU tethered\n\nto a GPU-based accelerator, each with their own corresponding memories, and an accelerator\n\n\u201ccontroller\u201d that coordinates transfers of data between the CPU and the GPU-based accelerator,\n\nsuch that the intermediate results from one step can be transferred from the GPU-based accelerator\n\nto the CPU, reviewed and corrected by the CPU, and transferred back to the GPU-based accelerator\n\nbefore the next computational cycle begins.\n\n 37. The \u2019867 Patent explains that performing the numerical computation in this\n\nstepwise fashion enables the system to eliminate \u201crace conditions,\u201d i.e., conflicts that occur when\n\ntwo programmatic \u201cthreads\u201d attempt to change the same shared data at the same time, which would\n\notherwise occur when other system elements attempt to access intermediate outputs of the\n\nnumerical computation. (See \u2019867 Patent, 5:60-6:31.) This avoids the computational overhead\n\nprevalent in conventional GPU-based accelerator architectures when transferring data from the\n\naccelerator to the CPU.\n\n\n\n\n 10\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 12 11\n of 95\n of 94\n\n\n\n\n 38. By enabling such \u201ccontroller-driven data exchange\u201d between the GPU-based\n\naccelerator and the CPU, the system described in the \u2019867 Patent allows for an \u201cinput parser\u201d\n\nexecuting on a CPU core to \u201cchange input\u2026on the fly during the simulation,\u201d thus enabling\n\nautomatic review and dynamic error correction of the numerical simulations or neural networks\n\nthat are being executed on the claimed system. (See id., 9:8-17.) Such dynamic, in-execution\n\nreview and error correction of whether each intermediate \u201cstep\u201d of a simulation or neural network\n\nis generating correct results is essential to the performance and reliability of large language models,\n\nimage classification, and image generation models that have become prevalent today. Because of\n\nthe scale to which such simulations and models have grown, it is no longer feasible to \u201crestart\u201d\n\nthem from scratch, only to correct them as they execute.\n\n 39. The \u2019461 and \u2019438 Patents disclose hardware and firmware configurations similar\n\nto those of the \u2019867 Patent, but are directed to using those configurations to process the layers of\n\nan artificial neural network (\u201cANN\u201d). The \u2019461 Patent is directed to further interplay between the\n\nCPU and the GPU-based accelerator: separating the CPU and GPU-based accelerator into separate\n\n\u201cstreams,\u201d whereby the CPU executes a \u201cuser interaction stream\u201d (e.g., enabling the parsing and\n\ndynamic editing of intermediate outputs, or for the ANN to be paused and resumed), while the\n\naccelerator executes a \u201ccomputational stream\u201d that executes the layers of the artificial neural\n\nnetwork. When the ANN is initialized, control over the generation of outputs shifts to the\n\ncomputational stream. However, once a pre-defined layer of the ANN has completed execution,\n\nor is interrupted, control over the generation of outputs and feeding of inputs is shifted back to the\n\nCPU\u2019s user interaction stream.\n\n 40. The Asserted Patents describe this \u201cshift of priorities\u201d as \u201c[t]he crucial feature of\n\nthe interaction between the User Interaction Stream and the Computational Stream.\u201d (\u2019867 Patent,\n\n\n\n\n 11\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 13 12\n of 95\n of 94\n\n\n\n\n7:45-47.) Even though the computational stream is in control during the ANN computation,\n\npriority shifting enables \u201c[t]he user [to] retain[] the ability to interrupt the simulation, change the\n\ninput, or to change the display properties of the framework\u201d because the user\u2019s \u201cinteractions are\n\nqueued to be performed at times determined by the controller-driven data exchange to avoid\n\ncorruption of the data.\u201d (Id., 8:47-57.)\n\n ACCUSED PRODUCTS\n\n 41. Nvidia offers, sells, and uses several products that provide and implement GPU-\n\nacceleration hardware, software, platforms, and services for individuals and enterprises and\n\nincorporate Plaintiff\u2019s patented technologies. (See https://www.nvidia.com/en-\n\nus/solutions/ai/inference/; https://marketplace.nvidia.com/en-us/data-center/?page=4;\n\nhttps://marketplace.nvidia.com/en-us/laptops-workstations/?page=9;\n\nhttps://marketplace.nvidia.com/en-us/software/?page=3.)\n\n 42. The Accused Products include Nvidia\u2019s GPU accelerators and superchips. (See\n\nhttps://resources.nvidia.com/l/en-us-gpu.) Nvidia\u2019s GPU accelerators include Nvidia\u2019s GPUs with\n\nNvidia\u2019s \u201cHopper,\u201d \u201cAda Lovelace,\u201d \u201cAmpere,\u201d \u201cTuring,\u201d \u201cVolta,\u201d \u201cPascal,\u201d and \u201cMaxwell\u201d\n\nGPU architectures. (See https://docs.nvidia.com/deeplearning/cudnn/archives/cudnn-896/support-\n\nmatrix/index.html.) These GPUs are specifically designed to run and implement GPU-based\n\nhardware acceleration using Nvidia\u2019s proprietary CUDA (Compute Unified Device Architecture)\n\nplatform and CUDA libraries for GPU acceleration. (See id. (Nvidia GPU architectures\n\nimplementing Nvidia\u2019s cuDNN (CUDA Deep Neural Network) library for GPU acceleration.);\n\nhttps://developer.nvidia.com/cuda-gpus.)\n\n 43. Nvidia\u2019s Hopper GPUs include the H100 and H200 GPUs. (See\n\nhttps://www.nvidia.com/en-us/data-center/technologies/hopper-architecture/ (Hopper\n\n\n\n\n 12\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 14 13\n of 95\n of 94\n\n\n\n\narchitecture); https://www.nvidia.com/en-us/data-center/h100/ (H100);\n\nhttps://www.nvidia.com/en-us/data-center/h200/ (H200).) In addition, Nvidia\u2019s superchips that\n\nimplement GPU accelerators include the GH200, or Grace Hopper Superchip, which implements\n\nthe Hopper-GPU architecture. (See https://www.nvidia.com/en-us/data-center/grace-hopper-\n\nsuperchip/ (GH200).)\n\n 44. Nvidia\u2019s Ada Lovelace (or Lovelace) GPUs include Nvidia Data Center GPUs,\n\nincluding L40, L40S, and L4 GPUs; Nvidia Workstation and Professional Laptop GPUs, including\n\nRTX Ada Generations series GPUs and Laptop GPUs; and GeForce RTX 40 series GPUs and\n\nLaptop GPUs. (See https://www.nvidia.com/en-us/technologies/ada-architecture/ (Ada Lovelace\n\narchitecture). See https://www.nvidia.com/en-us/data-center/l40/ (L40);\n\nhttps://www.nvidia.com/en-us/data-center/l40s/ (L40S); https://www.nvidia.com/en-us/data-\n\ncenter/l4/ (L4). See https://resources.nvidia.com/en-us-design-viz-stories-ep/l40-linecard (Nvidia\n\nProfessional GPUs); https://www.nvidia.com/en-us/ai-on-rtx/ (RTX GPUs featuring \u201cAccelerated\n\nDevelopment\u201d); https://www.nvidia.com/en-us/design-visualization/desktop-graphics/ (RTX Ada\n\nGeneration GPUs); https://www.nvidia.com/en-us/design-visualization/rtx-professional-\n\nlaptops/compare-table/ (RTX Ada Generation Laptop GPUs). See https://www.nvidia.com/en-\n\nus/geforce/graphics-cards/40-series/ (GeForce RTX 40 GPUs); https://www.nvidia.com/en-\n\nus/geforce/graphics-cards/compare/ (GeForce RTX 40 GPUs); https://www.nvidia.com/en-\n\nus/geforce/laptops/compare/ (GeForce RTX 40 Laptop GPUs).)\n\n 45. Nvidia\u2019s Ampere GPUs include Nvidia Data Center GPUs, including A100, A40,\n\nA30, A16, A10, and A2 GPUs; Nvidia Workstation and Professional Laptop GPUs, including\n\nRTX A series GPUs and Laptop GPUs; GeForce RTX 30 series GPUs and Laptop GPUs; and\n\nGeForce MX570 Laptop GPU. (See https://www.nvidia.com/en-us/data-center/ampere-\n\n\n\n\n 13\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 15 14\n of 95\n of 94\n\n\n\n\narchitecture/ (Ampere architecture). See https://www.nvidia.com/en-us/data-center/a100/ (A100);\n\nhttps://www.nvidia.com/en-us/data-center/a40/ (A40); https://www.nvidia.com/en-us/data-\n\ncenter/a30/ (A30); https://www.nvidia.com/en-us/data-center/a16/ (A16);\n\nhttps://www.nvidia.com/en-us/data-center/a10/ (A10); https://www.nvidia.com/en-us/data-\n\ncenter/a2/ (A2). See https://www.nvidia.com/en-us/design-visualization/desktop-graphics/ (RTX\n\nA GPUs); https://www.nvidia.com/en-us/design-visualization/rtx-professional-laptops/compare-\n\ntable/ (RTX A Laptop GPUs). See https://www.nvidia.com/en-us/geforce/graphics-cards/30-\n\nseries/ (GeForce RTX 30 GPUs); https://www.nvidia.com/en-us/geforce/graphics-cards/compare/\n\n(GeForce RTX 30 GPUs); https://www.nvidia.com/en-us/geforce/laptops/compare/30-series/\n\n(GeForce RTX 30 Laptop GPUs); https://www.nvidia.com/en-us/geforce/gaming-laptops/mx-\n\n570/ (GeForce MX570 Laptop GPU).)\n\n 46. Nvidia\u2019s Turing GPUs include Nvidia Data Center GPUs, including Tesla T4 GPUs\n\nand Quadro RTX 8000 (passive) and Quadro RTX 6000 (passive) GPUs; Nvidia Workstation and\n\nProfessional Laptop GPUs, including T series GPUs and Laptop GPUs, Quadro T series Laptop\n\nGPUs, and Quadro RTX series GPUs and Laptop GPUs; Titan series Titan RTX GPU;\n\nGeForce RTX 20 series and GeForce GTX 16 series GPUs and Laptop GPUs; and GeForce\n\nMX550, MX450, and MX430 Laptop GPUs. (See https://www.nvidia.com/en-us/geforce/turing/\n\n(Turing architecture). See https://www.nvidia.com/en-us/data-center/tesla-t4/ (Tesla T4);\n\nhttps://www.nvidia.com/en-gb/design-visualization/quadro-data-center/ (Quadro RTX 8000\n\n(passive) and Quadro RTX 6000 (passive). See https://www.nvidia.com/en-us/design-\n\nvisualization/quadro/ (T series GPUs/Laptop GPUs, Quadro T series Laptop GPUs, and Quadro\n\nRTX GPUs/Laptop GPUs); https://www.nvidia.com/en-us/design-visualization/desktop-graphics\n\n(T series GPUs/Laptop GPUs); https://www.nvidia.com/content/dam/en-\n\n\n\n\n 14\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 16 15\n of 95\n of 94\n\n\n\n\nzz/Solutions/titan/documents/titan-rtx-for-creators-us-nvidia-1011126-r6-web.pdf (Titan RTX);\n\nhttps://www.nvidia.com/en-us/geforce/20-series/ (GeForce RTX 20 GPUs);\n\nhttps://www.nvidia.com/en-us/geforce/graphics-cards/compare/ (GeForce RTX 20 GPUs and\n\nGeForce GTX 16 GPUs); https://www.nvidia.com/en-us/geforce/gaming-laptops/compare-20-\n\nseries/ (GeForce RTX 20 Laptop GPUs); https://www.nvidia.com/en-us/geforce/gaming-\n\nlaptops/compare-16-series/ (GeForce GTX 16 Laptop GPUs); https://www.nvidia.com/en-\n\nus/geforce/gaming-laptops/mx-550/ (GeForce MX550 Laptop GPU); https://www.nvidia.com/en-\n\nus/geforce/gaming-laptops/mx-450/ (GeForce MX450 Laptop GPU);\n\nhttps://wccftech.com/nvidia-geforce-mx450-turing-discrete-notebook-gpu-gddr6-pcie-4/\n\n(GeForce M Laptop GPUs).)\n\n 47. Nvidia\u2019s Volta GPUs include Nvidia Data Center GPUs, including the Tesla V100\n\nGPU; Nvidia Workstation GPUs, including Quadro GV100; and Titan series Titan V GPU. (See\n\nhttps://www.nvidia.com/en-us/data-center/volta-gpu-architecture/ (Volta architecture);\n\nhttps://www.nvidia.com/en-us/data-center/v100/ (Tesla V100);\n\nhttps://www.nvidia.com/content/dam/en-zz/Solutions/design-\n\nvisualization/productspage/quadro/quadro-desktop/quadro-volta-gv100-data-sheet-us-nvidia-\n\n704619-r3-web.pdf (Quadro GV100); https://nvidianews.nvidia.com/news/nvidia-titan-v-\n\ntransforms-the-pc-into-ai-supercomputer (Titan V).)\n\n 48. Nvidia\u2019s Pascal GPUs include Nvidia Data Center GPUs, including Tesla P100,\n\nP40, and P4 GPUs; Nvidia Workstation and Professional Laptop GPUs, including the\n\nQuadro GP100 GPU and Quadro P series GPUs and Laptop GPUs; Titan series Titan Xp and Titan\n\nX GPUs; GeForce GTX 10 series GPUs and Laptop GPUs; and GeForce MX300 series, MX200\n\nseries, and MX150 Laptop GPUs. (See https://developer.nvidia.com/pascal;\n\n\n\n\n 15\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 17 16\n of 95\n of 94\n\n\n\n\nhttps://www.nvidia.com/en-us/data-center/pascal-gpu-architecture/ (Pascal architecture). See\n\nhttps://www.nvidia.com/en-us/data-center/tesla-p100 (Tesla P100);\n\nhttps://developer.nvidia.com/cuda-gpus (Tesla P40 and P4);\n\nhttps://www.nvidia.com/content/dam/en-zz/Solutions/design-\n\nvisualization/productspage/quadro/quadro-desktop/quadro-pascal-gp100-data-sheet-us-nv-\n\n704562-r1.pdf (Quadro GP100); https://www.nvidia.com/en-us/design-visualization/quadro/\n\n(Quadro P series GPUs/Laptop GPUs). See https://www.nvidia.com/content/geforce-\n\ngtx/NVIDIA_TITAN_X_USER_GUIDE_v02.pdf (Titan X);\n\nhttps://www.nvidia.com/content/geforce-gtx/NVIDIA_TITAN_Xp_USER_GUIDE_v02.pdf\n\n(Titan Xp); https://www.nvidia.com/en-us/geforce/10-series/ (GeForce GTX 10);\n\nhttps://www.nvidia.com/en-us/geforce/graphics-cards/compare/ (GeForce GTX 10 GPUs);\n\nhttps://www.nvidia.com/en-us/geforce/news/gfecnt/nvidia-geforce-gtx-10-series-laptops/\n\n(GeForce GTX 10 Laptop GPUs); https://www.nvidia.com/en-us/geforce/gaming-laptops/mx-\n\n350/ (GeForce MX350 Laptop GPU); https://www.nvidia.com/en-us/geforce/gaming-laptops/mx-\n\n330/ (GeForce MX330 Laptop GPU); https://wccftech.com/nvidia-geforce-mx450-turing-\n\ndiscrete-notebook-gpu-gddr6-pcie-4/ (GeForce M Laptop GPUs).)\n\n 49. Nvidia\u2019s Maxwell GPUs include Nvidia Data Center GPUs, including Tesla M60,\n\nM40, and M10 GPUs; Nvidia Workstation and Professional Laptop GPUs, including Quadro M\n\nseries GPUs and Laptop GPUs, the NVS 810 GPU, and Tesla M6 series Laptop GPUs; Titan series\n\nGTX Titan X GPU; GeForce GTX 900 series and GeForce GTX 700 series GPUs and Laptop\n\nGPUs; and GeForce MX130 series and MX110 Laptop GPUs. (See\n\nhttps://developer.nvidia.com/blog/maxwell-most-advanced-cuda-gpu-ever-made/ (Maxwell\n\narchitecture); https://www.nvidia.com/content/dam/en-zz/Solutions/design-\n\n\n\n\n 16\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 18 17\n of 95\n of 94\n\n\n\n\nvisualization/solutions/resources/documents1/nvidia-m60-datasheet.pdf (M60);\n\nhttps://images.nvidia.com/content/tesla/pdf/78071_Tesla_M40_24GB_Print_Datasheet_LR.PDF\n\n(M40); https://www.nvidia.com/content/dam/en-zz/Solutions/Data-Center/tesla-\n\nm10/pdf/188359-Tesla-M10-DS-NV-Aug19-A4-fnl-Web.pdf (M10);\n\nhttps://www.nvidia.com/en-us/design-visualization/quadro/ (Quadro M GPUs/Laptop GPUs);\n\nhttps://www.nvidia.com/docs/IO/146527/nvs-810-datasheet.pdf (NVS 810);\n\nhttps://images.nvidia.com/content/tesla/pdf/188300-Tesla-M6-DS-Aug19-A4-fnl-Web.pdf (Tesla\n\nM6); https://www.nvidia.com/content/geforce-gtx/GTX_TITAN_X_User_Guide.pdf (GTX Titan\n\nX); https://developer.nvidia.com/maxwell-compute-architecture (GeForce GTX 900 and 700\n\nGPUs/Laptop GPUs); https://wccftech.com/nvidia-geforce-mx450-turing-discrete-notebook-gpu-\n\ngddr6-pcie-4/ (GeForce M Laptop GPUs).)\n\n 50. These GPUs and superchips implement, and are specifically designed for, GPU-\n\nacceleration for artificial intelligence and neural networks. Nvidia\u2019s proprietary CUDA platform\n\nfor parallel computing, which includes GPU-acceleration libraries such as cuDNN (CUDA Deep\n\nNeural Network), is implemented in the Nvidia Hopper, Ada Lovelace, Ampere, Turing, Volta,\n\nPascal, and Maxwell GPU architectures.\n\n\n\n\n 17\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 19 18\n of 95\n of 94\n\n\n\n\n(See https://docs.nvidia.com/deeplearning/cudnn/archives/cudnn-896/support-matrix/index.html\n\n(emphasis added).)\n\n 51. The Accused Products further include Nvidia\u2019s supercomputers and servers that\n\nimplement its GPU accelerators and superchips. These supercomputers and servers include: the\n\nEGX line of servers for data centers and edge devices, the HGX line of supercomputers, the DGX\n\nline of supercomputers, and the OVX line of supercomputers. (See https://www.nvidia.com/en-\n\nus/data-center/solutions/accelerated-computing/.)\n\n 52. Nvidia\u2019s \u201cEGX hardware portfolio\u201d includes \u201caccelerators [that] combine the\n\nperformance of NVIDIA Ampere GPUs.\u201d (See https://www.nvidia.com/en-us/data-\n\ncenter/products/egx/; see https://www.nvidia.com/en-us/design-visualization/egx-graphics/.)\n\nNvidia\u2019s HGX \u201cAI supercomputing platform brings together the full power of NVIDIA GPUs,\n\nNVIDIA NVLink\u2122, NVIDIA networking, and fully optimized AI and high-performance\n\ncomputing (HPC) software stacks.\u201d (See https://www.nvidia.com/en-us/data-center/hgx/;\n\nhttps://nvdam.widen.net/s/5kgbjq2v2t/hpc-hgx-h100-datasheet-nvidia-web.) One example\n\n\n 18\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 20 19\n of 95\n of 94\n\n\n\n\nconfiguration includes \u201cfour or eight H200 or H100 GPUs.\u201d (See id.; see\n\nhttps://nvdam.widen.net/s/5kgbjq2v2t/hpc-hgx-h100-datasheet-nvidia-web.) Nvidia\u2019s DGX\n\nsupercomputers include the DGX H200, DGX BasePOD, and DGX SuperPOD with DGX GB200.\n\n(See https://www.nvidia.com/en-us/data-center/dgx-platform/; see also\n\nhttps://www.nvidia.com/en-us/data-center/base-command/; https://resources.nvidia.com/en-us-\n\ndgx-software/nvidia-base-command (DGX Base Command operating system for DGX data\n\ncenters.) And Nvidia\u2019s OVX supercomputers implement \u201cL40S GPUs . . . for both complex AI\n\nand graphics-intensive workloads.\u201d (See https://www.nvidia.com/en-us/data-center/products/ovx/;\n\nsee https://resources.nvidia.com/en-us-ovx/ovx-datasheet.)\n\n 53. The Accused Products further include Nvidia\u2019s software, platforms, and services\n\nfor accelerated computing. These include CUDA, Nvidia AI Enterprise, the DGX Platform, Nvidia\n\nOmniverse, Nvidia Drive, Nvidia Isaac Sim, and Nvidia NGC.\n\n 54. CUDA is Nvidia\u2019s proprietary \u201cparallel computing platform and programming\n\nmodel.\u201d (See https://developer.nvidia.com/cuda-zone.) CUDA is designed to support Nvidia\u2019s\n\nGPU accelerators and superchips and includes software specifically for GPU-acceleration such as\n\nthe cuDNN \u201cGPU-accelerated library.\u201d (See id.; https://developer.nvidia.com/cudnn.) In addition,\n\nNvidia\u2019s CUDA-X, built on top of CUDA, is a collection of \u201cGPU-accelerated microservices and\n\nlibraries for AI.\u201d (See https://www.nvidia.com/en-us/technologies/cuda-x/.) Nvidia also offers the\n\nCUDA Toolkit and SDK Manager for developing GPU-accelerated applications. (See\n\nhttps://developer.nvidia.com/cuda-toolkit; https://developer.nvidia.com/sdk-manager.)\n\n 55. In addition, Nvidia AI Enterprise is Nvidia\u2019s \u201cend-to-end, cloud-native software\n\nplatform\u201d for \u201caccelerat[ing] data science pipelines . . . and other generative AI applications.\u201d (See\n\nhttps://www.nvidia.com/en-us/data-center/products/ai-enterprise/.) It is Nvidia\u2019s \u201c\u2018operating\n\n\n\n\n 19\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 21 20\n of 95\n of 94\n\n\n\n\nsystem\u2019 for enterprise AI.\u201d (See id.)\n\n 56. In addition, Nvidia\u2019s DGX platform is \u201cis a complete AI solution, and includes\n\nNVIDIA AI Enterprise software.\u201d (See https://www.nvidia.com/en-us/data-center/dgx-platform/.)\n\nNvidia DGX Cloud is \u201can AI-training-as-a-service platform which includes cloud-based\n\ninfrastructure and software for AI, customizable pretrained AI models, and access to NVIDIA\n\nexperts.\u201d (See https://d18rn0p25nwr6d.cloudfront.net/CIK-0001045810/1cbe8fe7-e08a-46e3-\n\n8dcc-b429fc06c1a4.pdf, Nvidia U.S. Securities and Exchange Commission Form 10-K for Fiscal\n\nYear Ended January 28, 2024 at 6.)\n\n 57. In addition, Nvidia Omniverse is \u201ca development platform and operating system\n\nfor building virtual world simulation applications, available as a software subscription.\u201d (See\n\nhttps://d18rn0p25nwr6d.cloudfront.net/CIK-0001045810/1cbe8fe7-e08a-46e3-8dcc-\n\nb429fc06c1a4.pdf, Nvidia U.S. Securities and Exchange Commission Form 10-K for Fiscal Year\n\nEnded January 28, 2024 at 6.) Nvidia Omniverse implements software and services \u201cinto existing\n\nsoftware tools and simulation workflows for building AI systems.\u201d (See\n\nhttps://www.nvidia.com/en-us/omniverse/.)\n\n 58. In addition, Nvidia Drive is a platform that \u201cconsists of both the AI infrastructure\n\nand in-vehicle hardware and software\u201d for autonomous vehicles. (See https://www.nvidia.com/en-\n\nus/self-driving-cars/.) \u201cNVIDIA DRIVE Infrastructure encompasses data center hardware,\n\nsoftware, and workflows\u2014both on premises and in NVIDIA DGX Cloud & Omniverse.\u201d (See id.)\n\n 59. In addition, Nvidia Isaac Sim is a platform that enables \u201cdevelopers to design,\n\nsimulate, test, and train AI-based robots and autonomous machines in a physically-based virtual\n\nenvironment.\u201d (See https://developer.nvidia.com/isaac/sim.) It is built on Nvidia Omniverse. (See\n\nid.)\n\n\n\n\n 20\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 22 21\n of 95\n of 94\n\n\n\n\n 60. In addition, Nvidia NGC is a collection of software services and tools that support\n\n\u201cend-to-end AI and digital twin workflows\u201d that runs on \u201cNVIDIA GPU-accelerated platforms.\u201d\n\n(See https://www.nvidia.com/en-us/gpu-cloud/.) NGC \u201coffers a collection of cloud services . . .\n\nfor generative AI, drug discovery, and speech AI solutions, and the NGC Private Registry for\n\nsecurely sharing proprietary AI software.\u201d (See id.)\n\n FIRST CAUSE OF ACTION\n (INFRINGEMENT OF THE \u2019867 PATENT)\n\n 61. Plaintiff realleges and incorporates by reference the allegations of the preceding\n\nparagraphs of this Complaint.\n\n 62. Defendant has infringed and continues to infringe one or more claims of the \u2019867 Patent\n\nin violation of 35 U.S.C. \u00a7 271 in this District and elsewhere in the United States and will continue to\n\ndo so. The Accused Products, including features of, e.g., the Grace Hopper Superchip (GH200), at least\n\nwhen used for their ordinary and customary purposes, practice each element of at least claim 16 of the\n\n\u2019867 Patent as demonstrated below.\n\n 63. For example, claim 16 of the \u2019867 Patent recites:\n\n 16. A method for performing a numerical simulation on input data\n in a computer system including a central processing unit and an\n accelerator, the method comprising:\n\n receiving, by an accelerator, first input data from the central\n processing unit;\n\n transferring, by an accelerator controller, the first input data into a\n first partition, referenced by first pointer, of an accelerator memory\n before a first computational cycle of the numerical simulation;\n\n performing, by at least one graphics processing unit during the first\n computational cycle, at least one calculation on the first portion of\n the input data as to generate first output data;\n\n\n\n\n 21\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 23 22\n of 95\n of 94\n\n\n\n\n storing, by the accelerator controller, the first output data into a\n second partition, referenced by a second pointer, of the accelerator\n memory; and\n\n swapping the first pointer with the second pointer at the end of the\n first computational cycle, such that the first output data becomes an\n input for a second computational cycle of the numerical simulation.\n\n 64. The Accused Products perform each step of the method of claim 16 of the \u2019867\n\nPatent. To the extent the preamble is construed to be limiting, the Accused Products perform a\n\nmethod for performing a numerical simulation on input data in a computer system including a\n\ncentral processing unit and an accelerator, as further explained below. For instance, the Grace\n\nHopper Superchip (GH200) \u201cbrings together the groundbreaking performance of the NVIDIA\n\nHopper GPU with the versatility of the NVIDIA Grace\u2122 CPU . . . in a single Superchip.\u201d\n\n\n\n\n 22\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 24 23\n of 95\n of 94\n\n\n\n\n(See https://resources.nvidia.com/en-us-grace-cpu/nvidia-grace-hopper (emphasis added).)\n\n 65. The \u201cGrace Hopper Superchip is the first true heterogeneous accelerated platform\n\nfor high-performance computing (HPC) and AI workloads. It accelerates applications with the\n\nstrengths of both GPUs and CPUs while providing the simplest and most productive heterogeneous\n\nprogramming model to date.\u201d\n\n\n\n\n(See https://resources.nvidia.com/en-us-grace-cpu/nvidia-grace-hopper (emphasis added).)\n\n 66. In addition, the Accused Products, including the Grace Hopper Superchip,\n\nimplement CUDA, Nvidia\u2019s proprietary \u201cparallel computing platform and programming model.\u201d\n\nCUDA enables NVIDIA GPUs to be used for general purpose computing tasks. CUDA further\n\nincludes the CUDA Toolkit, which \u201cincludes GPU-accelerated libraries, a compiler, development\n\ntools and the CUDA runtime.\u201d As an example, the \u201cCUDA\u00ae Deep Neural Network library\n\n(cuDNN) is a GPU-acceleration library of primitives for deep neural networks.\u201d It \u201cprovides\n\nhighly tuned implementations for standard routines\u201d for GPU-based acceleration.\n\n\n\n\n 23\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 25 24\n of 95\n of 94\n\n\n\n\n(See https://developer.nvidia.com/cuda-zone (emphasis added).)\n\n\n\n\n(See https://developer.nvidia.com/cudnn (emphasis added).)\n\n 67. Nvidia GPU architectures that implement CUDA and cuDNN include the Hopper\n\n(e.g., Grace Hopper Superchip (GH200), H100), Ada Lovelace, Ampere, Turing, Volta, Pascal,\n\nand Maxwell GPU architectures of the Accused Products.\n\n\n\n\n 24\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 26 25\n of 95\n of 94\n\n\n\n\n(See https://docs.nvidia.com/deeplearning/cudnn/archives/cudnn-896/support-matrix/index.html\n\n(emphasis added).)\n\n 68. The Accused Products perform a method that includes receiving, by an accelerator,\n\nfirst input data from the central processing unit. For instance, the \u201cCUDA programming model\u201d\n\nimplements programming functions and instructions for CPUs and GPUs. \u201cThe host is the CPU\n\navailable in the system\u201d and \u201csystem memory associated with the CPU is called host memory.\u201d\n\n\u201cThe GPU is called a device and GPU memory likewise called device memory.\u201d As an example,\n\nthe first main CUDA program execution step is \u201c[c]opy[ing] the input data from host [CPU]\n\nmemory to device [GPU] memory, also known as host-to-device transfer.\u201d\n\n\n\n\n 25\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 27 26\n of 95\n of 94\n\n\n\n\n(See https://developer.nvidia.com/blog/cuda-refresher-cuda-programming-model/ (emphasis\n\nadded).)\n\n 69. The Accused Products practice a method that includes transferring, by an\n\naccelerator controller, the first input data into a first partition, referenced by first pointer, of an\n\naccelerator memory before a first computational cycle of the numerical simulation. For instance,\n\nthe GPU architecture of the Accused Products implements a controller. As an example, the\n\nHopper-GPU architecture implements \u201cHBM3 memory controllers\u201d including \u201c12 512-bit\n\nmemory controllers\u201d coupled GPU memory including \u201c6 HBM3 or HBM2e stacks,\u201d \u201c80 GB\n\nHBM3, 5 HBM3 stacks,\u201d and \u201c80 GB HBM2e, 5 HBM2e stacks.\u201d\n\n\n\n\n 26\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 28 27\n of 95\n of 94\n\n\n\n\n(See https://developer.nvidia.com/blog/nvidia-hopper-architecture-in-depth/ (emphasis added).)\n\n 70. The Accused Products implement CUDA, Nvidia\u2019s parallel computing platform.\n\nCUDA enables NVIDIA GPUs to be used for general purpose computing tasks and includes\n\nspecialized GPU-acceleration libraries such as cuDNN. Examples of parameters used in CUDA\n\ninclude pointers \u201cdst\u201d (\u201cDestination memory address\u201d) and \u201csrc\u201d (\u201cSource memory address\u201d). For\n\ninstance, exemplary CUDA function \u201ccudaMemcpy\u201d copies \u201cbytes [data] from the memory area\n\npointed to by src [source memory address pointer] to the memory area pointed to by dst\n\n\n\n 27\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 29 28\n of 95\n of 94\n\n\n\n\n[destination memory address pointer], where kind [type of transfer] specifies the direction of the\n\ncopy.\u201d One of the destinations is \u201ccudaMemcpyHostToDevice,\u201d or host (CPU) to device (GPU).\n\n\n\n\n(See https://docs.nvidia.com/cuda/cuda-runtime-api/group__CUDART__MEMORY.html\n\n(emphasis added).)\n\n 71. The Accused Products practice a method that includes performing, by at least one\n\ngraphics processing unit during the first computational cycle, at least one calculation on the first\n\nportion of the input data as to generate first output data. For instance, CUDA uses \u201cstreams\u201d to\n\nexecute a sequence of commands in order. As shown below, an exemplary CUDA function\n\n\u201ccudaMemcpyAsync\u201d is used to copy data between a host (CPU) and a device (GPU). \u201cEach\n\nstream copies its portion of input array hostPtr [pointer for CPU] to array inputDevPtr in device\n\n[GPU] memory.\u201d The stream then \u201cprocesses inputDevPtr on the device [GPU] by calling\n\nMyKernel(), and copies the result outputDevPtr back to the same portion of hostPtr.\u201d\n\n\n\n\n 28\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 30 29\n of 95\n of 94\n\n\n\n\n(See https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#creation-and-\n\ndestruction-of-streams (emphasis added).)\n\n 72. The Accused Products practice a method that includes storing, by the accelerator\n\ncontroller, the first output data into a second partition, referenced by a second pointer, of the\n\naccelerator memory. For instance, exemplary excerpts of CUDA code shown below demonstrate\n\nCUDA being used to calculate a square sub-matrix Csub of matrix C using the function MatMul.\n\nAn exemplary CUDA stream \u201callocate[s] [matrix] C in device memory.\u201d After Matrices A and B\n\nare synchronized and multiplied, the exemplary CUDA stream \u201c[w]rite[s] Csub to device [GPU]\n\nmemory.\u201d\n\n\n\n\n 29\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 31 30\n of 95\n of 94\n\n\n\n\n *****\n\n\n\n\n(See https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#shared-memory\n\n(emphasis added).)\n\n 73. In addition, exemplary CUDA function \u201ccudaMalloc\u201d is used to \u201callocate weight,\n\nwork, and reserve space buffer sizes in the GPU memory.\u201d \u201cThe work-space buffer is used for\n\ntemporary storage\u201d and the \u201c content can be discarded or modified after all GPU kernels launched\n\nby the corresponding API complete.\u201d The \u201creserve-space buffer\u201d used to transfer intermediate\n\nresults is used for transferring \u201cintermediate results\u201d as used in the cuDNN GPU-acceleration\n\nlibrary for CUDA.\n\n\n 30\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 32 31\n of 95\n of 94\n\n\n\n\n(See https://docs.nvidia.com/deeplearning/cudnn/archives/cudnn-\n\n893/api/index.html#cudnnGetMultiHeadAttnBuffers (emphasis added).)\n\n 74. The Accused Products practice a method that includes swapping the first pointer\n\nwith the second pointer at the end of the first computational cycle, such that the first output data\n\nbecomes an input for a second computational cycle of the numerical simulation. For example, the\n\ncuDNN GPU-acceleration library of the Accused Products implement operations that \u201ctake tensors\n\nas input and produce tensors as output.\u201d\n\n\n\n\n(See https://docs.nvidia.com/deeplearning/cudnn/archives/cudnn-881/developer-\n\nguide/index.html#tensors-layouts (emphasis added).)\n\n\n\n\n 31\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 33 32\n of 95\n of 94\n\n\n\n\n 75. Nvidia confirms that CUDA implements pointer swapping for device (GPU) pointers.\n\n\n\n\n *****\n\n\n\n\n(See https://forums.developer.nvidia.com/t/swap-device-pointers/38964 (emphasis added).)\n\n\n\n\n 32\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 34 33\n of 95\n of 94\n\n\n\n\n(See https://docs.nvidia.com/cuda/cuda-c-programming-guide/#creation-and-destruction-of-\n\nstreams (emphasis added).)\n\n 76. Each claim in the \u2019867 Patent recites an independent invention. Neither claim 16,\n\ndescribed above, nor any other individual claim is representative of all claims in the \u2019867 Patent.\n\n 77. Defendant has been aware of the technology patented by the \u2019867 Patent since at\n\nleast 2007, when the inventors of the Asserted Patents first discussed their patented technologies\n\n\n\n 33\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 35 34\n of 95\n of 94\n\n\n\n\nwith Mr. Sanford Russell, then the CTO of Nvidia. At the time, the inventors asked Defendant to\n\ncollaborate with them on training neural networks using Nvidia\u2019s GPUs. Defendant informed the\n\ninventors, through Mr. Russell, that it was not interested in the collaboration. Defendant has also\n\ncited the application for the \u2019867 Patent in its own patent portfolio since at least June 28, 2010.\n\n\n\n\n *****\n\n\n\n\n(See https://patents.google.com/patent/US8648867B2/en?oq=8648867#citedBy (emphasis\n\nadded).)\n\n\n\n\n *****\n\n\n\n\n 34\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 36 35\n of 95\n of 94\n\n\n\n\n(See https://patentimages.storage.googleapis.com/ee/13/e9/61df149c3fddc7/US8922566.pdf\n\n(Nvidia U.S. Patent No. 8,922,566) (emphasis added).)\n\n\n\n\n(See\n\nhttps://patentcenter.uspto.gov/applications/13335850/displayReferences/referenceForms?applicat\n\nion= (Nvidia U.S. Appl. No. 13/335,850 August 12, 2014, List of References Cited by Examiner)\n\n(emphasis added).)\n\n 78. Starting in or around 2016, the inventors of the Asserted Patents held multiple\n\ndiscussions with Nvidia to invest in or purchase their AI company, Neurala, Inc., and all its assets,\n\nincluding the \u2019867 Patent and its related patents and applications. These discussions included at\n\nleast Mr. Alvin Lin, an Nvidia Senior Director of Business Development, and Mr. Jeff Herbst, then\n\nan Nvidia Vice President of Business Development and head of Nvidia\u2019s Inception GPU Ventures,\n\nin or around September 6, 2016. In or around October 2016, Nvidia, through its representatives,\n\n\n 35\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 37 36\n of 95\n of 94\n\n\n\n\ninitiated discussions with the inventors to invest in Neurala, Inc. for approximately $10 million.\n\n 79. The inventors also discussed their patented technology, in addition to the \u2019867\n\nPatent and its family, with Defendant\u2019s representatives at Nvidia\u2019s artificial intelligence\n\nconference in or around June 2017. On or about June 26, 2017, Defendant received materials from\n\nthe inventors, in lieu of a meeting on or about June 29, that identified the \u2019867 Patent and its family\n\nand described the technology in detail. Defendant had previously stated it was interested in the\n\ninventors\u2019 solutions. Defendant also featured the inventors on its website as members of\n\nDefendant\u2019s start-up incubator on or about September 25, 2019.\n\n\n\n\n *****\n\n\n\n\n(See https://developer.nvidia.com/blog/inception-spotlight-ai-startup-neurala-sees-7x-speedup-\n\nwith-ngc/ (September 25, 2019); see also https://www.youtube.com/watch?v=-WBtxGLoQNs\n\n(\u201cNeurala Accelerating AI Video Annotation with NGC Containers\u201d posted by Defendant\u2019s\n\nYouTube account).)\n\n 80. Neural AI and/or its predecessors-in-interest have satisfied all statutory obligations\n\nrequired to collect pre-filing damages for the full period allowed by law for infringement of the\n\n\n 36\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 38 37\n of 95\n of 94\n\n\n\n\n\u2019867 Patent.\n\n 81. Defendant directly infringes at least claim 16 of the \u2019867 Patent, either literally or\n\nunder the doctrine of equivalents, by performing the steps described above. For example,\n\nDefendant performs the claimed method in an infringing manner as described above by\n\nimplementing the Accused Products as part of its accelerated computing operations and running\n\ncorresponding software that implements the infringing performance. Defendant also performs the\n\nclaimed method in an infringing manner when testing the operation of the Accused Products and\n\ncorresponding systems. As another example, Defendant performs the claimed method when\n\nproviding or administering services to third parties, customers, and partners using the Accused\n\nProducts.\n\n 82. Defendant\u2019s partners, customers, and users of its Accused Products and\n\ncorresponding systems and services directly infringe at least claim 16 of the \u2019867 Patent, literally\n\nor under the doctrine of equivalents, at least by using the Accused Products and corresponding\n\nsystems and services, as described above.\n\n 83. Defendant has actively induced and is actively inducing infringement of at least\n\nclaim 16 of the \u2019867 Patent with specific intent to induce infringement, and/or willful blindness to\n\nthe possibility that its acts induce infringement, in violation of 35 U.S.C. \u00a7 271(b). For example,\n\nDefendant encourages and induces customers to use Nvidia\u2019s CUDA platform in a manner that\n\ninfringes claim 16 of the \u2019867 Patent at least by offering and providing software that performs a\n\nmethod that infringes claim 16 when installed and operated by the customer using the Accused\n\nProducts, and by engaging in activities relating to selling, marketing, advertising, promotion,\n\ninstallation, support, and distribution of the Accused Products.\n\n 84. Defendant encourages, instructs, directs, and/or requires third parties\u2014including\n\n\n\n\n 37\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 39 38\n of 95\n of 94\n\n\n\n\nits certified partners and/or customers\u2014to perform the claimed method using the software,\n\nplatform, services, and systems in infringing ways, as described above.\n\n 85. Defendant further encourages and induces its customers to infringe claim 16 of the\n\n\u2019867 Patent: 1) by making its accelerated computing and data center services available on its\n\nwebsite, providing applications that allow users to access those services, widely advertising those\n\nservices, and providing technical support and instructions to users (see\n\nhttps://www.nvidia.com/en-us/data-center/data-center-gpus/gpu-test-drive/); and 2) through\n\nactivities relating to marketing, advertising, promotion, installation, support, and distribution of\n\nthe Accused Products, including its CUDA platform, and services in the United States. (See\n\nhttps://www.nvidia.com/en-us/; see https://www.nvidia.com/en-us/about-nvidia/partners/;\n\nhttps://www.nvidia.com/en-us/data-center/where-to-buy/; https://www.nvidia.com/en-us/data-\n\ncenter/where-to-buy-tesla/.)\n\n 86. For example, Defendant shares instructions, guides, and manuals, which advertise\n\nand instruct third parties on how to use its hardware and platform as described above, including at\n\nleast customers and partners. (See https://docs.nvidia.com/cuda/cuda-c-programming-guide/.)\n\nDefendant also provides customer service and technical support to purchasers of the Accused\n\nProducts and corresponding systems and services, which directs and encourages customers to\n\nperform certain actions that use the Accused Products in an infringing manner. (See\n\nhttps://www.nvidia.com/en-us/support/; https://www.nvidia.com/en-\n\nus/support/enterprise/services/.)\n\n 87. Defendant and/or Defendant\u2019s partners recommend and sell the Accused Products\n\nand provide technical support for the installation, implementation, integration, and ongoing\n\noperation of the Accused Products for each individual customer. On information and belief, each\n\n\n\n\n 38\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 40 39\n of 95\n of 94\n\n\n\n\ncustomer enters into a contractual relationship with Defendant and/or one of Defendant\u2019s partners,\n\nwhich obligates each customer to perform certain actions in order to use the Accused Products.\n\n(See https://www.nvidia.com/en-us/agreements/; https://www.nvidia.com/en-\n\nus/agreements/cloud-services/nvidia-cloud-agreement/; https://www.nvidia.com/en-\n\nus/agreements/cloud-services/service-specific-terms-for-nvidia-dgx-cloud/.) Further, in order to\n\nreceive the benefit of Defendant\u2019s and/or its partner\u2019s continued technical support and their\n\nspecialized knowledge and guidance of the operability of the Accused Products, each customer\n\nmust continue to use the Accused Products in a way that infringes the \u2019867 Patent. (See\n\nhttps://www.nvidia.com/en-us/support/.)\n\n 88. Further, as the entity that provides installation, implementation, and integration of\n\nthe Accused Products in addition to ensuring the Accused Product remains operational for each\n\ncustomer through ongoing technical support, on information and belief, Defendant and/or\n\nDefendant\u2019s partners affirmatively aid and abet each customer\u2019s use of the Accused Products in a\n\nmanner that performs the claimed method of, and infringes, the \u2019867 Patent.\n\n 89. Defendant also contributes to the infringement of its partners, customers, and users\n\nof the Accused Products by providing within the United States or importing into the United States\n\nthe Accused Products, which are for use in practicing, and under normal operation practice, the\n\nmethods, systems, and devices claimed in the Asserted Patents, constituting a material part of the\n\ninventions claimed, and not a staple article or commodity of commerce suitable for substantial\n\nnon-infringing uses. Indeed, as shown above, the Accused Products and the example functionality\n\nhave no substantial non-infringing uses but are specifically designed to practice the \u2019867 Patent.\n\n 90. On information and belief, the infringing actions of each partner, customer, and/or\n\nuser of the Accused Products are attributable to Defendant. For example, on information and belief,\n\n\n\n\n 39\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 41 40\n of 95\n of 94\n\n\n\n\nDefendant directs and controls the activities or actions of its partners or others in connection with\n\nthe Accused Products by contractual agreement or otherwise requiring partners or others to provide\n\ninformation and instructions to customers who acquire the Accused Products which, when\n\nfollowed, results in infringement. Defendant further directs and controls the operation of devices\n\nexecuting the Accused Products by programming the software which, when executed by a\n\ncustomer or user, performs the claimed method of at least claim 16 of the \u2019867 Patent.\n\n 91. Plaintiff has suffered and continue to suffer damages as a result of Defendant\u2019s\n\ninfringement of the \u2019867 Patent. Defendant is therefore liable to Plaintiff under 35 U.S.C. \u00a7 284\n\nfor damages in an amount that adequately compensates Plaintiff for Defendant\u2019s infringement, but\n\nno less than a reasonable royalty.\n\n 92. Defendant\u2019s infringement of the \u2019867 Patent is knowing and willful. Defendant had\n\nactual knowledge of the \u2019867 Patent application since at least 2010 and actual knowledge of the\n\n\u2019867 Patent, and its family, since at least 2017.\n\n 93. On information and belief, despite Defendant\u2019s knowledge of the Asserted Patents\n\nand Plaintiff\u2019s patented technology, Defendant made the deliberate decision to sell products and\n\nservices that it knew infringe these patents. Defendant\u2019s continued infringement of the \u2019867 Patent\n\nwith knowledge of the \u2019867 Patent constitutes willful infringement.\n\n SECOND CAUSE OF ACTION\n (INFRINGEMENT OF THE \u2019438 PATENT)\n\n 94. Plaintiff realleges and incorporates by reference the allegations of the preceding\n\nparagraphs of this Complaint.\n\n 95. Defendant has infringed and continues to infringe one or more claims of the \u2019438 Patent\n\nin violation of 35 U.S.C. \u00a7 271 in this District and elsewhere in the United States and will continue to\n\ndo so. The Accused Products, including features of, e.g., the Grace Hopper Superchip (GH200), at least\n\n\n\n 40\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 42 41\n of 95\n of 94\n\n\n\n\nwhen used for their ordinary and customary purposes, practice each element of at least claim 21 of the\n\n\u2019438 Patent as demonstrated below.\n\n 96. For example, claim 21 of the \u2019438 Patent recites:\n\n 21. A method of performing a sequence of computations\n representing an artificial neural network, the method comprising:\n\n receiving, at a central processing unit (CPU), first input data\n acquired from an external system in real time;\n\n initializing, by a controller operably coupled to a graphics\n processing unit (GPU), textures and shaders in a memory operably\n coupled to the GPU;\n\n transferring the first input data received by the CPU to the memory\n operably coupled to the GPU;\n\n performing, by the graphics processing unit (GPU), a first\n computation in the sequence of computations on the first input data\n based on the textures and shaders to generate first output data,\n computations in the sequence of computations representing\n respective layers of neurons in the artificial neural network, an\n output of the first computation in the sequence of computations\n representing an output of a first neuron in a first layer in the artificial\n neural network;\n\n storing, in the memory operably coupled to the GPU, the first input\n data and the first output data; and\n\n transferring second input data acquired from the external system in\n real time into the memory operably coupled to the GPU after the\n GPU starts the first computation and before the GPU starts a second\n computation of the sequence of computations, an output of the\n second computation in the sequence of computations representing\n an output of a second neuron in a second layer in the artificial neural\n network.\n\n 97. The Accused Products perform each step of the method of claim 21 of the \u2019438\n\nPatent. To the extent the preamble is construed to be limiting, the Accused Products perform a\n\nmethod of performing a sequence of computations representing an artificial neural network, as\n\nfurther explained below. For instance, the Grace Hopper Superchip (GH200) \u201cbrings together the\n\n\n\n 41\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 43 42\n of 95\n of 94\n\n\n\n\ngroundbreaking performance of the NVIDIA Hopper GPU with the versatility of the NVIDIA\n\nGrace\u2122 CPU . . . in a single Superchip.\u201d It includes the cuDNN (CUDA Deep Neural Network)\n\nlibrary for \u201c[d]eep neural networks.\u201d\n\n\n\n\n *****\n\n\n\n\n 42\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 44 43\n of 95\n of 94\n\n\n\n\n(See https://resources.nvidia.com/en-us-grace-cpu/nvidia-grace-hopper (emphasis added).)\n\n 98. The \u201cGrace Hopper Superchip is the first true heterogeneous accelerated platform\n\nfor high-performance computing (HPC) and AI workloads. It accelerates applications with the\n\nstrengths of both GPUs and CPUs while providing the simplest and most productive heterogeneous\n\nprogramming model to date.\u201d\n\n\n\n\n(See https://resources.nvidia.com/en-us-grace-cpu/nvidia-grace-hopper (emphasis added).)\n\n 99. In addition, the Accused Products, including the Grace Hopper Superchip,\n\nimplement CUDA, Nvidia\u2019s proprietary \u201cparallel computing platform and programming model.\u201d\n\nCUDA further includes the CUDA Toolkit, which \u201cincludes GPU-accelerated libraries, a\n\ncompiler, development tools and the CUDA runtime.\u201d As an example, the \u201cCUDA\u00ae Deep Neural\n\nNetwork library (cuDNN) is a GPU-acceleration library of primitives for deep neural networks.\u201d\n\n\n\n 43\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 45 44\n of 95\n of 94\n\n\n\n\nIt \u201cprovides highly tuned implementations for standard routines\u201d for GPU-based acceleration.\n\n\n\n\n(See https://developer.nvidia.com/cuda-zone (emphasis added).)\n\n\n\n\n(See https://developer.nvidia.com/cudnn (emphasis added).)\n\n 100. Nvidia GPU architectures that implement CUDA and cuDNN include the Hopper\n\n(e.g., Grace Hopper Superchip (GH200), H100), Ada Lovelace, Ampere, Turing, Volta, Pascal,\n\nand Maxwell GPU architectures of the Accused Products.\n\n\n\n\n 44\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 46 45\n of 95\n of 94\n\n\n\n\n(See https://docs.nvidia.com/deeplearning/cudnn/archives/cudnn-896/support-matrix/index.html\n\n(emphasis added).)\n\n 101. The Accused Products perform a method that includes receiving, at a central\n\nprocessing unit (CPU), first input data acquired from an external system in real time. For instance,\n\nas illustrated below, a diagram describing the architecture of the Grace Hopper Superchip depicts\n\na CPU (\u201cGrace CPU\u201d) with \u201c[u]p to 72 cores\u201d that receives and sends input and output data via\n\n\u201cHigh-Speed IO\u201d (\u201cPCIe-5\u201d). The Grace CPU is further depicted as being coupled to memory\n\n\u201cCPU LPDDR5X\u201d up to 480GB via a link up to \u201c500 GB/s.\u201d\n\n\n\n\n 45\n\fCase\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 47 46\n of 95\n of 94\n\n\n\n\n *****\n\n\n\n\n 46\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 48 47\n of 95\n of 94\n\n\n\n\n(See https://resources.nvidia.com/en-us-grace-cpu/nvidia-grace-hopper (emphasis added).)\n\n 102. In a related diagram example, \u201cCPU PHYSICAL MEMORY\u201d (LPDDR5X) is\n\nillustrated as being accessed by a CPU (\u201cCPU-resident access\u201d).\n\n\n\n\n(See https://resources.nvidia.com/en-us-grace-cpu/nvidia-grace-hopper (emphasis added).)\n\n 103. As previously stated, the Accused Products implement CUDA and specialized\n\nGPU-acceleration libraries such as cuDNN. \u201cCUDA\u00ae is a parallel computing platform and\n\n\n\n 47\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 49 48\n of 95\n of 94\n\n\n\n\nprogramming model developed by NVIDIA for general computing on graphical processing units\n\n(GPUs)\u201d including \u201cGPU-accelerated applications.\u201d In GPU-accelerated applications, \u201cthe\n\nsequential part of the workload runs on the CPU \u2013 which is optimized for single-threaded\n\nperformance \u2013 while the compute intensive portion of the application runs on thousands of GPU\n\ncores in parallel.\u201d\n\n\n\n\n(See https://developer.nvidia. com/cuda-zone (emphasis added).)\n\n 104. The \u201cCUDA programming model\u201d implements programming functions and\n\ninstructions for CPUs and GPUs. \u201cThe host is the CPU available in the system\u201d and \u201csystem\n\nmemory associated with the CPU is called host memory.\u201d As an example, the first main CUDA\n\nprogram execution step is \u201c[c]opy[ing] the input data from host [CPU] memory.\u201d\n\n\n\n\n 48\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 50 49\n of 95\n of 94\n\n\n\n\n(See https://developer.nvidia.com/blog/cuda-refresher-cuda-programming-model/ (emphasis\n\nadded).)\n\n 105. The Accused Products perform a method that includes initializing, by a controller\n\noperably coupled to a graphics processing unit (GPU), textures and shaders in a memory operably\n\ncoupled to the GPU. For instance, as illustrated below, a GPU (\u201cHopper GPU\u201d) for the Grace\n\nHopper Superchip is depicted as accessing both CPU and GPU memory using \u201cNVLINK\u201d for both\n\naccessing and storing data. Indeed, \u201cNVIDIA GH200 is designed to accelerate applications with\n\nexceptionally large memory footprints.\u201d As illustrated, the Hopper GPUs are illustrated coupled\n\nto \u201cGPU HBM3\u201d high bandwidth memory or \u201cGPU HBM3e\u201d high bandwidth memory.\n\n\n\n\n(See https://resources.nvidia.com/en-us-grace-cpu/nvidia-grace-hopper (emphasis added).)\n\n 106. The GPU architecture of the Accused Products implements a controller. As an\n\nexample, the Hopper-GPU architecture includes \u201cGPU processing clusters\u201d and \u201ctexture\n\nprocessing clusters\u201d and implements \u201cHBM3 memory controllers\u201d including \u201c12 512-bit memory\n\ncontrollers\u201d coupled GPU memory including \u201c6 HBM3 or HBM2e stacks,\u201d \u201c80 GB HBM3, 5\n\nHBM3 stacks,\u201d and \u201c80 GB HBM2e, 5 HBM2e stacks.\u201d\n\n\n\n\n 49\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 51 50\n of 95\n of 94\n\n\n\n\n(See https://developer.nvidia.com/blog/nvidia-hopper-architecture-in-depth/ (emphasis added).)\n\n 107. In addition, CUDA includes the exemplary NPP (Nvidia Performance Primitives)\n\nlibrary \u201cfor performing CUDA accelerated processing\u201d and \u201cperforming CUDA accelerated\n\nprocessing for 2D image and signal processing.\u201d\n\n\n\n\n 50\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 52 51\n of 95\n of 94\n\n\n\n\n *****\n\n\n\n\n(See https://docs.nvidia.com/cuda/index.html (emphasis added).)\n\n\n\n\n(See https://docs.nvidia.com/cuda/npp/introduction.html (emphasis added).)\n\n 108. As an example, the exemplary CUDA NPP library passes image data using \u201c[a]\n\npointer to the image\u2019s underlying data type\u201d and \u201c[a] line step in bytes.\u201d In this example, the\n\npointer is passed \u201cto the underlying pixel data type\u201d and the pointer and line step are passed\n\nindividually for processing involving \u201cimage data.\u201d\n\n\n\n\n 51\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 53 52\n of 95\n of 94\n\n\n\n\n(See\n\nhttps://docs.nvidia.com/cuda/npp/introduction.html#nppi_conventions_lb_1passing_image_data\n\n(emphasis added).)\n\n 109. As another example, the exemplary CUDA NPP library implements function for\n\nimage color conversion. These functions \u201cmanipulat[e] an image\u2019s color model and sampling\n\nformat\u201d and \u201ccan be found in the nppicc [NVIDIA Performance Primitives Image Color\n\nConversion] library.\u201d As shown, these functions save \u201capplication load time\u201d and \u201cCUDA\n\nruntime.\u201d\n\n\n\n\n(See https://docs.nvidia.com/cuda/npp/image_color_conversion.html#image-color-model-\n\nconversion-functions (emphasis added).)\n\n 110. The Accused Products perform a method that includes transferring the first input\n\n\n 52\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 54 53\n of 95\n of 94\n\n\n\n\ndata received by the CPU to the memory operably coupled to the GPU. For instance, the \u201cCUDA\n\nprogramming model\u201d implements programming functions and instructions for CPUs and GPUs.\n\n\u201cThe host is the CPU available in the system\u201d and \u201csystem memory associated with the CPU is\n\ncalled host memory.\u201d \u201cThe GPU is called a device and GPU memory likewise called device\n\nmemory.\u201d As an example, the first main CUDA program execution step is \u201c[c]opy[ing] the input\n\ndata from host [CPU] memory to device [GPU] memory, also known as host-to-device transfer.\u201d\n\n\n\n\n(See https://developer.nvidia.com/blog/cuda-refresher-cuda-programming-model/ (emphasis\n\nadded).)\n\n 111. The Accused Products perform a method that includes performing, by the graphics\n\nprocessing unit (GPU), a first computation in the sequence of computations on the first input data\n\nbased on the textures and shaders to generate first output data, computations in the sequence of\n\ncomputations representing respective layers of neurons in the artificial neural network, an output\n\nof the first computation in the sequence of computations representing an output of a first neuron\n\nin a first layer in the artificial neural network. For instance, the CUDA platform programming\n\nimplemented in the Accused Products utilizes the GPU and GPU memory. As an example, after\n\nthe \u201chost-to-device transfer\u201d (host (CPU) memory to device (GPU) memory), the second main\n\n\n 53\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 55 54\n of 95\n of 94\n\n\n\n\nstep is \u201c[l]oad the GPU program and execute, caching data on-chip for performance.\u201d\n\n\n\n\n(See https://developer.nvidia.com/blog/cuda-refresher-cuda-programming-model/ (emphasis\n\nadded).)\n\n 112. In addition, as previously stated, cuDNN is a CUDA \u201cGPU-acceleration library of\n\nprimitives for deep neural networks.\u201d (See https://developer.nvidia.com/cudnn.) The exemplary\n\ncuDNN release notes below demonstrate computations implemented for RNNs and related data\n\nbeing transferred to GPU memory. As shown, users do \u201cnot need to transfer [an] array [from RNN\n\ndata descriptors] to device memory; the operation will be performed automatically by RNN APIs.\u201d\n\n\n\n\n *****\n\n\n\n\n 54\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 56 55\n of 95\n of 94\n\n\n\n\n *****\n\n\n\n\n(See https://docs.nvidia.com/deeplearning/cudnn/archives/cudnn-893/release-\n\nnotes/index.html#abstract (emphasis added).)\n\n 113. Relatedly, cuDNN operations below exemplify tensors being used as inputs and\n\noutputs (e.g., Tmp0). Exemplary \u201ccuDNN operations take tensors as input and produce tensors as\n\noutput.\u201d As part of CUDA, these cuDNN operations implement computer tasks performed by a\n\nGPU.\n\n\n\n\n 55\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 57 56\n of 95\n of 94\n\n\n\n\n *****\n\n\n\n\n(See https://docs.nvidia.com/deeplearning/cudnn/archives/cudnn-881/developer-\n\nguide/index.html#tensors-layouts (emphasis added).)\n\n 114. The Accused Products perform a method that includes storing, in the memory\n\noperably coupled to the GPU, the first input data and the first output data. For instance, as\n\nillustrated below, a diagram describing the architecture of the Grace Hopper Superchip depicts a\n\nGPU (\u201cHopper GPU\u201d) in communication with GPU memory (\u201cGPUHBM3 or HBm3e\u201d high\n\nbandwidth memory).\n\n\n\n\n 56\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 58 57\n of 95\n of 94\n\n\n\n\n(See https://resources.nvidia.com/en-us-grace-cpu/nvidia-grace-hopper (emphasis added).)\n\n 115. As previously stated, the \u201cCUDA programming model\u201d implements programming\n\nfunctions and instructions for CPUs (host) and GPUs (device). For example, after the \u201chost-to-\n\ndevice transfer\u201d (CPU to GPU) first main step and \u201c[l]oad[ing] the GPU program and execut[ing]\u201d\n\n\n 57\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 59 58\n of 95\n of 94\n\n\n\n\nand \u201ccaching data on-chip for performance\u201d for the second main step, the \u201cresults\u201d are stored on\n\nGPU \u201cdevice memory.\u201d\n\n\n\n\n(See https://developer.nvidia.com/blog/cuda-refresher-cuda-programming-model/ (emphasis\n\nadded.)\n\n 116. The Accused Products perform a method that includes transferring second input\n\ndata acquired from the external system in real time into the memory operably coupled to the GPU\n\nafter the GPU starts the first computation and before the GPU starts a second computation of the\n\nsequence of computations, an output of the second computation in the sequence of computations\n\nrepresenting an output of a second neuron in a second layer in the artificial neural network. For\n\ninstance, as illustrated below, a diagram describing the architecture of the Grace Hopper Superchip\n\ndepicts a CPU (\u201cGrace CPU\u201d) in communication with a GPU (\u201cHopper GPU\u201d) via \u201cNVLink-C2C\u201d\n\n(chip-to-chip). \u201cHigh-Speed IO\u201d input and output data is received by the CPU via \u201cPCIe-5.\u201d\n\n\n\n\n 58\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 60 59\n of 95\n of 94\n\n\n\n\n(See https://resources.nvidia.com/en-us-grace-cpu/nvidia-grace-hopper (emphasis added).)\n\n 117. Furthermore, the Accused Products, including the Grace Hopper Superchip,\n\nimplement libraries and SDKs designed for neural networks that \u201care created from large numbers\n\nof identical neurons [that] are highly parallel by nature.\u201d The Accused Products implement\n\n\n 59\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 61 60\n of 95\n of 94\n\n\n\n\ncuDNN, a library \u201cmakes it easy to obtain state-of-the-art performance with Deep Neural\n\nNetworks,\u201d and TensorRT, a platform accelerator and runtime for optimizing, validating, and\n\ndeploying neural networks for inference (e.g., applying knowledge from a trained neural network\n\nmodel and inferring a result).\n\n\n\n\n(See https://developer.nvidia.com/discover/artificial-neural-network (emphasis added).)\n\n 118. An example below illustrates an exemplary neural network the Accused Products\n\nare designed to accelerate using parallel computations. \u201cInput\u201d (four) and \u201cOutput\u201d (eight) neurons\n\nare depicted below in a full-connected or linear layer structure in which all of the input neurons\n\ndepicted in a first layer are connected to all of the output neurons depicted in a second layer.\n\nComputations for the neural network are performed using, for example, \u201cNVIDIA Matrix\n\nMultiplication.\u201d Examples of inputs and outputs for forward propagation, activation gradient\n\ncomputation, and weight gradient computation (as matrix by matrix multiplications) are shown\n\nbelow.\n\n\n\n\n 60\n\fCase\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 62 61\n of 95\n of 94\n\n\n\n\n 61\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 63 62\n of 95\n of 94\n\n\n\n\n *****\n\n\n\n\n(See https://docs.nvidia.com/deeplearning/performance/dl-performance-fully-\n\nconnected/index.html#performance (annotations added).)\n\n\n 62\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 64 63\n of 95\n of 94\n\n\n\n\n 119. Indeed, the cuDNN GPU-acceleration library of the Accused Products implement\n\noperations that \u201ctake tensors as input and produce tensors as output.\u201d\n\n\n\n\n(See https://docs.nvidia.com/deeplearning/cudnn/archives/cudnn-881/developer-\n\nguide/index.html#tensors-layouts (emphasis added).)\n\n 120. Each claim in the \u2019438 Patent recites an independent invention. Neither claim 21,\n\ndescribed above, nor any other individual claim is representative of all claims in the \u2019438 Patent.\n\n 121. Defendant has been aware of the \u2019438 Patent since at least the filing of the original\n\nComplaint. Defendant has been aware of the technology patented by the \u2019438 Patent since at least\n\n2007, when the inventors of the Asserted Patents first discussed their patented technologies with\n\nMr. Sanford Russell, then the CTO of Nvidia. At the time, the inventors asked Defendant to\n\ncollaborate with them on training neural networks using Nvidia\u2019s GPUs. Defendant informed the\n\ninventors, through Mr. Russell, that it was not interested in the collaboration. Defendant has also\n\ncited an ancestor of the \u2019438 Patent in its own patent portfolio since at least June 28, 2010 (See\n\nhttps://patents.google.com/patent/US8648867B2/en?oq=8648867#citedBy;\n\nhttps://patentimages.storage.googleapis.com/ee/13/e9/61df149c3fddc7/US8922566.pdf;\n\nhttps://patentcenter.uspto.gov/applications/13335850/displayReferences/referenceForms?applicat\n\nion= (Nvidia U.S. Appl. No. 13/335,850 August 12, 2014, List of References Cited by Examiner).)\n\n 122. Starting in or around 2016, the inventors of the Asserted Patents held multiple\n\ndiscussions with Nvidia to invest in or purchase their AI company, Neurala, Inc., and all its assets,\n\nincluding the \u2019438 Patent family. These discussions included at least Mr. Alvin Lin, an Nvidia\n\nSenior Director of Business Development, and Mr. Jeff Herbst, then an Nvidia Vice President of\n\nBusiness Development and head of Nvidia\u2019s Inception GPU Ventures, in or around September 6,\n\n\n 63\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 65 64\n of 95\n of 94\n\n\n\n\n2016. In or around October 2016, Nvidia, through its representatives, initiated discussions with\n\nthe inventors to invest in Neurala, Inc. for approximately $10 million.\n\n 123. The inventors also discussed their patented technology, including the underlying\n\ntechnology and family to the \u2019438 Patent (including U.S. Patent No. 9,189,828, the patent the \u2019438\n\nPatent reissued from), with Defendant\u2019s representatives at Nvidia\u2019s artificial intelligence\n\nconference in or around June 2017. On or about June 26, 2017, Defendant received materials from\n\nthe inventors, in lieu of a meeting on or about June 29, that identified patents related to the \u2019438\n\nPatent and described the technology in detail. Defendant had previously stated it was interested in\n\nthe inventors\u2019 solutions. Defendant also featured the inventors on its website as members of\n\nDefendant\u2019s start-up incubator on or about September 25, 2019.\n\n\n\n\n *****\n\n\n\n\n(See https://developer.nvidia.com/blog/inception-spotlight-ai-startup-neurala-sees-7x-speedup-\n\nwith-ngc/ (September 25, 2019); see also https://www.youtube.com/watch?v=-WBtxGLoQNs\n\n(\u201cNeurala Accelerating AI Video Annotation with NGC Containers\u201d posted by Defendant\u2019s\n\nYouTube account).)\n\n\n 64\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 66 65\n of 95\n of 94\n\n\n\n\n 124. Neural AI and/or its predecessors-in-interest have satisfied all statutory obligations\n\nrequired to collect pre-filing damages for the full period allowed by law for infringement of the\n\n\u2019438 Patent.\n\n 125. Defendant directly infringes at least claim 21 of the \u2019438 Patent, either literally or\n\nunder the doctrine of equivalents, by performing the steps described above. For example,\n\nDefendant performs the claimed method in an infringing manner as described above by\n\nimplementing the Accused Products as part of its accelerated computing operations and running\n\ncorresponding software that implements the infringing performance. Defendant also performs the\n\nclaimed method in an infringing manner when testing the operation of the Accused Products and\n\ncorresponding systems. As another example, Defendant performs the claimed method when\n\nproviding or administering services to third parties, customers, and partners using the Accused\n\nProducts.\n\n 126. Defendant\u2019s partners, customers, and users of its Accused Products and\n\ncorresponding systems and services directly infringe at least claim 21 of the \u2019438 Patent, literally\n\nor under the doctrine of equivalents, at least by using the Accused Products and corresponding\n\nsystems and services, as described above.\n\n 127. Defendant has actively induced and is actively inducing infringement of at least\n\nclaim 21 of the \u2019438 Patent with specific intent to induce infringement, and/or willful blindness to\n\nthe possibility that its acts induce infringement, in violation of 35 U.S.C. \u00a7 271(b). For example,\n\nDefendant encourages and induces customers to use Nvidia\u2019s CUDA platform in a manner that\n\ninfringes claim 21 of the \u2019438 Patent at least by offering and providing software that performs a\n\nmethod that infringes claim 21 when installed and operated by the customer using the Accused\n\nProducts, and by engaging in activities relating to selling, marketing, advertising, promotion,\n\n\n\n\n 65\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 67 66\n of 95\n of 94\n\n\n\n\ninstallation, support, and distribution of the Accused Products.\n\n 128. Defendant encourages, instructs, directs, and/or requires third parties\u2014including\n\nits certified partners and/or customers\u2014to perform the claimed method using the software,\n\nplatform, services, and systems in infringing ways, as described above.\n\n 129. Defendant further encourages and induces its customers to infringe claim 21 of the\n\n\u2019438 Patent: 1) by making its accelerated computing and data center services available on its\n\nwebsite, providing applications that allow users to access those services, widely advertising those\n\nservices, and providing technical support and instructions to users (see\n\nhttps://www.nvidia.com/en-us/data-center/data-center-gpus/gpu-test-drive/); and 2) through\n\nactivities relating to marketing, advertising, promotion, installation, support, and distribution of\n\nthe Accused Products, including its CUDA platform, and services in the United States. (See\n\nhttps://www.nvidia.com/en-us/; see https://www.nvidia.com/en-us/about-nvidia/partners/;\n\nhttps://www.nvidia.com/en-us/data-center/where-to-buy/; https://www.nvidia.com/en-us/data-\n\ncenter/where-to-buy-tesla/.)\n\n 130. For example, Defendant shares instructions, guides, and manuals, which advertise\n\nand instruct third parties on how to use its hardware and platform as described above, including at\n\nleast customers and partners. (See https://docs.nvidia.com/cuda/cuda-c-programming-guide/.)\n\nDefendant also provides customer service and technical support to purchasers of the Accused\n\nProducts and corresponding systems and services, which directs and encourages customers to\n\nperform certain actions that use the Accused Products in an infringing manner. (See\n\nhttps://www.nvidia.com/en-us/support/; https://www.nvidia.com/en-\n\nus/support/enterprise/services/.)\n\n 131. Defendant and/or Defendant\u2019s partners recommend and sell the Accused Products\n\n\n\n\n 66\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 68 67\n of 95\n of 94\n\n\n\n\nand provide technical support for the installation, implementation, integration, and ongoing\n\noperation of the Accused Products for each individual customer. On information and belief, each\n\ncustomer enters into a contractual relationship with Defendant and/or one of Defendant\u2019s partners,\n\nwhich obligates each customer to perform certain actions in order to use the Accused Products.\n\n(See https://www.nvidia.com/en-us/agreements/; https://www.nvidia.com/en-\n\nus/agreements/cloud-services/nvidia-cloud-agreement/; https://www.nvidia.com/en-\n\nus/agreements/cloud-services/service-specific-terms-for-nvidia-dgx-cloud/.) Further, in order to\n\nreceive the benefit of Defendant\u2019s and/or its partner\u2019s continued technical support and their\n\nspecialized knowledge and guidance of the operability of the Accused Products, each customer\n\nmust continue to use the Accused Products in a way that infringes the \u2019438 Patent. (See\n\nhttps://www.nvidia.com/en-us/support/.)\n\n 132. Further, as the entity that provides installation, implementation, and integration of\n\nthe Accused Products in addition to ensuring the Accused Product remains operational for each\n\ncustomer through ongoing technical support, on information and belief, Defendant and/or\n\nDefendant\u2019s partners affirmatively aid and abet each customer\u2019s use of the Accused Products in a\n\nmanner that performs the claimed method of, and infringes, the \u2019438 Patent.\n\n 133. Defendant also contributes to the infringement of its partners, customers, and users\n\nof the Accused Products by providing within the United States or importing into the United States\n\nthe Accused Products, which are for use in practicing, and under normal operation practice, the\n\nmethods, systems, and devices claimed in the Asserted Patents, constituting a material part of the\n\ninventions claimed, and not a staple article or commodity of commerce suitable for substantial\n\nnon-infringing uses. Indeed, as shown above, the Accused Products and the example functionality\n\nhave no substantial non-infringing uses but are specifically designed to practice the \u2019438 Patent.\n\n\n\n\n 67\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 69 68\n of 95\n of 94\n\n\n\n\n 134. On information and belief, the infringing actions of each partner, customer, and/or\n\nuser of the Accused Products are attributable to Defendant. For example, on information and belief,\n\nDefendant directs and controls the activities or actions of its partners or others in connection with\n\nthe Accused Products by contractual agreement or otherwise requiring partners or others to provide\n\ninformation and instructions to customers who acquire the Accused Products which, when\n\nfollowed, results in infringement. Defendant further directs and controls the operation of devices\n\nexecuting the Accused Products by programming the software which, when executed by a\n\ncustomer or user, performs the claimed method of at least claim 21 of the \u2019438 Patent.\n\n 135. Plaintiff has suffered and continues to suffer damages as a result of Defendant\u2019s\n\ninfringement of the \u2019438 Patent. Defendant is therefore liable to Plaintiff under 35 U.S.C. \u00a7 284\n\nfor damages in an amount that adequately compensates Plaintiff for Defendant\u2019s infringement, but\n\nno less than a reasonable royalty.\n\n 136. Defendant\u2019s infringement of the \u2019438 Patent is knowing and willful. Defendant\n\nacquired actual knowledge of the patent that the \u2019438 Patent reissued from, and its family, since at\n\nleast 2017 and has acquired additional knowledge of the \u2019438 Patent since at least the filing of this\n\nlawsuit.\n\n 137. On information and belief, despite Defendant\u2019s knowledge of the Asserted Patents and\n\nPlaintiff\u2019s patented technology, Defendant made the deliberate decision to sell products and services\n\nthat it knew infringe these patents. Defendant\u2019s continued infringement of the \u2019438 Patent with\n\nknowledge of the \u2019438 Patent constitutes willful infringement.\n\n THIRD CAUSE OF ACTION\n (INFRINGEMENT OF THE \u2019461 PATENT)\n\n 138. Plaintiff realleges and incorporates by reference the allegations of the preceding\n\nparagraphs of this Complaint.\n\n\n\n 68\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 70 69\n of 95\n of 94\n\n\n\n\n 139. Defendant has infringed and continues to infringe one or more claims of the \u2019461\n\nPatent in violation of 35 U.S.C. \u00a7 271 in this District and elsewhere in the United States and will\n\ncontinue to do so. The Accused Products, including features of, e.g., the Grace Hopper Superchip\n\n(GH200), at least when used for their ordinary and customary purposes, practice each element of\n\nat least claim 21 of the \u2019461 Patent as demonstrated below.\n\n 140. For example, claim 21 of the \u2019461 Patent recites:\n\n 21. A method of executing computations representing an artificial\n neural network on a computer system comprising at least one central\n processing unit (CPU), a processing unit, a first memory partition,\n and a second memory partition, the method comprising:\n\n executing, by the at least one CPU, a user interaction stream, the\n user interaction stream controlling transfer of inputs to the artificial\n neural network to the first memory partition and the second memory\n partition;\n\n executing, by the processing unit, a computational stream, the\n computational stream controlling data exchange between the user\n interaction stream and the computational stream during execution of\n the computations representing the artificial neural network;\n\n shifting control of a data exchange between the user interaction\n stream and the computational stream to the computational stream in\n response to starting execution of the computations representing the\n artificial neural network;\n\n shifting control of the data exchange between the user interaction\n stream and the computational stream to the user interaction stream\n in response to completion or interruption of the computations\n representing the artificial neural network;\n\n queueing a user command received by the user interaction stream\n during execution of the computations representing the artificial\n neural network; and\n\n executing the user command during execution of the computations\n representing the artificial neural network at times determined by the\n computational stream.\n\n 141. The Accused Products perform each step of the method of claim 21 of the \u2019461\n\n\n\n 69\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 71 70\n of 95\n of 94\n\n\n\n\nPatent. To the extent the preamble is construed to be limiting, the Accused Products perform a\n\nmethod of executing computations representing an artificial neural network on a computer system\n\ncomprising at least one central processing unit (CPU), a processing unit, a first memory partition,\n\nand a second memory partition, as further explained below. For instance, the Grace Hopper\n\nSuperchip (GH200) \u201cbrings together the groundbreaking performance of the NVIDIA Hopper\n\nGPU with the versatility of the NVIDIA Grace\u2122 CPU . . . in a single Superchip.\u201d It includes the\n\ncuDNN (CUDA Deep Neural Network) library for \u201c[d]eep neural networks.\u201d\n\n\n\n\n *****\n\n\n\n\n 70\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 72 71\n of 95\n of 94\n\n\n\n\n(See https://resources.nvidia.com/en-us-grace-cpu/nvidia-grace-hopper (emphasis added).)\n\n 142. As illustrated below, a diagram describing the architecture of the Grace Hopper\n\nSuperchip depicts a CPU (\u201cGrace CPU\u201d) with \u201c[u]p to 72 cores\u201d and CPU memory (\u201cCPU\n\nLPDDR5X\u201d) and a GPU (\u201cHopper GPU\u201d) and GPU memory (\u201cGPUHBM3 or HBm3e\u201d).\n\n\n\n\n 71\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 73 72\n of 95\n of 94\n\n\n\n\n(See https://resources.nvidia.com/en-us-grace-cpu/nvidia-grace-hopper (emphasis added).)\n\n 143. The \u201cGrace Hopper Superchip is the first true heterogeneous accelerated platform\n\nfor high-performance computing (HPC) and AI workloads. It accelerates applications with the\n\nstrengths of both GPUs and CPUs while providing the simplest and most productive heterogeneous\n\nprogramming model to date.\u201d\n\n\n\n\n(See https://resources.nvidia.com/en-us-grace-cpu/nvidia-grace-hopper (emphasis added).)\n\n 144. In addition, the Accused Products, including the Grace Hopper Superchip,\n\nimplement CUDA, Nvidia\u2019s proprietary \u201cparallel computing platform and programming model.\u201d\n\nCUDA further includes the CUDA Toolkit, which \u201cincludes GPU-accelerated libraries, a\n\ncompiler, development tools and the CUDA runtime.\u201d As an example, the \u201cCUDA\u00ae Deep Neural\n\n\n\n 72\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 74 73\n of 95\n of 94\n\n\n\n\nNetwork library (cuDNN) is a GPU-acceleration library of primitives for deep neural networks.\u201d\n\nIt \u201cprovides highly tuned implementations for standard routines\u201d for GPU-based acceleration.\n\n\n\n\n(See https://developer.nvidia.com/cuda-zone (emphasis added).)\n\n\n\n\n(See https://developer.nvidia.com/cudnn (emphasis added).)\n\n 145. Nvidia GPU architectures that implement CUDA and cuDNN include the Hopper\n\n(e.g., Grace Hopper Superchip (GH200), H100), Ada Lovelace, Ampere, Turing, Volta, Pascal,\n\nand Maxwell GPU architectures of the Accused Products.\n\n\n\n\n 73\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 75 74\n of 95\n of 94\n\n\n\n\n(See https://docs.nvidia.com/deeplearning/cudnn/archives/cudnn-896/support-matrix/index.html\n\n(emphasis added).)\n\n 146. The Accused Products perform a method that includes executing, by the at least\n\none CPU, a user interaction stream, the user interaction stream controlling transfer of inputs to\n\nthe artificial neural network to the first memory partition and the second memory partition. For\n\ninstance, as shown in the Grace Hopper Superchip architecture diagram below, the Grace Hopper\n\nSuperchip is illustrated below with a CPU (\u201cGRACE CPU\u201d). The CPU \u201cshare[s] a single per-\n\nprocess page table\u201d with a GPU (\u201cHopper GPU\u201d), \u201cenabling all CPU and GPU threads to access\n\nall system-allocated memory.\u201d The CPU is depicted as coupled to the GPU via \u201cNVLINK C2C\n\n[chip-to-chip],\u201d and can access the \u201cSystem Page Table\u201d and \u201cCPU PHYSICAL MEMORY\u201d via\n\n\u201cCPU-resident access\u201d and \u201cGPU PHYSICAL MEMORY\u201d via \u201c[r]emote access\u201d and \u201cPTE [page\n\ntable entry] B.\u201d The GPU can also access the System Page Table, and it can access \u201cGPU\n\nPHYSICAL MEMORY\u201d via \u201cGPU-resident access\u201d and \u201cCPU PHYSICAL MEMORY\u201d via\n\n\u201c[r]emote access\u201d and \u201cPTE A.\u201d Moreover, the \u201cSystem Page Table\u201d \u201c[t]ranslates CPU malloc()\n\n\n 74\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 76 75\n of 95\n of 94\n\n\n\n\n[memory allocation] to CPU or GPU.\u201d \u201cThe CPU heap, CPU thread stack, global variables\n\nmemory-mapped files, and inter-process memory are accessible to all CPU and GPU threads.\u201d\n\n\n\n\n(See https://resources.nvidia.com/en-us-grace-cpu/nvidia-grace-hopper (emphasis added).)\n\n 147. The \u201cCUDA programming model\u201d implements programming functions and\n\ninstructions for CPUs and GPUs. \u201cThe host is the CPU available in the system\u201d and \u201csystem\n\nmemory associated with the CPU is called host memory.\u201d \u201cThe GPU is called a device and GPU\n\nmemory likewise called device memory.\u201d As an example, the first main CUDA program execution\n\nstep is \u201c[c]opy[ing] the input data from host [CPU] memory to device [GPU] memory, also known\n\nas host-to-device transfer.\u201d\n\n\n\n\n 75\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 77 76\n of 95\n of 94\n\n\n\n\n(See https://developer.nvidia.com/blog/cuda-refresher-cuda-programming-model/ (emphasis\n\nadded).)\n\n 148. The Accused Products perform a method that includes executing, by the processing\n\nunit, a computational stream, the computational stream controlling data exchange between the\n\nuser interaction stream and the computational stream during execution of the computations\n\nrepresenting the artificial neural network. For instance, the \u201cCUDA programming model\u201d\n\nimplements programming functions and instructions for CPUs and GPUs. As previously stated,\n\nthe host is the CPU and the device is the GPU. After \u201c[c]opy[ing] the input data from host [CPU]\n\nmemory to device [GPU] memory,\u201d the second main CUDA program execution step is\n\n\u201c[l]oad[ing] the GPU program and execut[ing].\u201d\n\n\n\n\n 76\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 78 77\n of 95\n of 94\n\n\n\n\n(See https://developer.nvidia.com/blog/cuda-refresher-cuda-programming-model/ (emphasis\n\nadded).)\n\n 149. Indeed, the Grace Hopper Superchip \u201cis designed to accelerate applications\u201d using\n\n\u201cExtended GPU Memory.\u201d As depicted in the gram of the Grace Hopper architecture below, a\n\nGPU (\u201cHOPPER GPU\u201d) can access \u201cLocal CPU,\u201d \u201cPeer CPU,\u201d and \u201cPeer GPU\u201d memory via\n\n\u201cNVLink.\u201d\n\n\n\n\n 77\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 79 78\n of 95\n of 94\n\n\n\n\n(See https://resources.nvidia.com/en-us-grace-cpu/nvidia-grace-hopper (emphasis added).)\n\n 150. For instance, exemplary CUDA library cuDNN function\n\n\u201ccudnnSetRNNDescriptor_v8\u201d \u201cinitializes a previously created RNN [recurrent neural network]\n\ndescriptor object.\u201d This function \u201cstore[s] all information needed to compute the total number of\n\nadjustable weights/biases in the RNN model.\u201d In addition, the parameters \u201cdirMode,\u201d\n\n\u201cinputMode,\u201d and \u201cdatatype\u201d confirm the exchange of calculations and values between the hidden\n\nlayers of an RNN.\n\n\n\n\n *****\n\n\n\n\n 78\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 80 79\n of 95\n of 94\n\n\n\n\n(See https://docs.nvidia.com/deeplearning/cudnn/archives/cudnn-891/pdf/cuDNN-API.pdf\n\n(emphasis added).)\n\n 151. The Accused Products perform a method that includes shifting control of a data\n\nexchange between the user interaction stream and the computational stream to the computational\n\nstream in response to starting execution of the computations representing the artificial neural\n\nnetwork. For instance, the \u201cCUDA programming model\u201d implements programming functions and\n\ninstructions for CPUs (host) and GPUs (device). As an example, the \u201chost-to-device transfer\u201d\n\n(CPU to GPU) first main step, the second main step is \u201c[l]oad the GPU program and execute\u201d and\n\nthe third main step is \u201c[c]opy the results from device [GPU] memory to host [CPU] memory, also\n\nknown as device-to-host transfer\u201d (GPU to CPU).\n\n\n\n\n 79\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 81 80\n of 95\n of 94\n\n\n\n\n(See https://developer.nvidia.com/blog/cuda-refresher-cuda-programming-model/ (emphasis\n\nadded.)\n\n 152. As previously stated, the Grace Hopper Superchip \u201cis designed to accelerate\n\napplications\u201d using \u201cExtended GPU Memory\u201d and the GPU can access local/peer CPU and peer\n\nGPU memory via \u201cNVLink.\u201d The Grace Hopper Superchip\u2019s Extended GPU Memory feature\n\n\u201cenables GPUs to access all the system memory efficiently\u201d and \u201cphysical memory in the system\n\ncan be allocated to be accessible from any GPU thread.\u201d\n\n\n\n\n 80\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 82 81\n of 95\n of 94\n\n\n\n\n(See https://resources.nvidia.com/en-us-grace-cpu/nvidia-grace-hopper (emphasis added).)\n\n 153. The Accused Products perform a method that includes shifting control of the data\n\nexchange between the user interaction stream and the computational stream to the user interaction\n\nstream in response to completion or interruption of the computations representing the artificial\n\nneural network. For instance, after the \u201cCUDA programming model\u201d \u201chost-to-device transfer\u201d\n\n(CPU to GPU) and GPU program load and execution steps, the third main step is \u201c[c]opy the\n\nresults from device [GPU] memory to host [CPU] memory, also known as device-to-host transfer\u201d\n\n(GPU to CPU). The \u201chost-to-device transfer\u201d (CPU to GPU) first main step can be reintroduced\n\nfor additional computations.\n\n\n\n\n(See https://developer.nvidia.com/blog/cuda-refresher-cuda-programming-model/ (emphasis\n\n\n 81\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 83 82\n of 95\n of 94\n\n\n\n\nadded.)\n\n 154. In addition, as shown in the Grace Hopper Superchip architecture diagram below,\n\nthe CPU (\u201cGRACE CPU\u201d) \u201cshare[s] a single per-process page table\u201d with a GPU (\u201cHopper\n\nGPU\u201d), \u201cenabling all CPU and GPU threads to access all system-allocated memory.\u201d \u201cThe CPU\n\nheap, CPU thread stack, global variables memory-mapped files, and inter-process memory are\n\naccessible to all CPU and GPU threads.\u201d\n\n\n\n\n(See https://resources.nvidia.com/en-us-grace-cpu/nvidia-grace-hopper (emphasis added).)\n\n 155. The Accused Products perform a method that includes queueing a user command\n\nreceived by the user interaction stream during execution of the computations representing the\n\nartificial neural network. For instance, as shown by publicly available CUDA toolkit\n\n\n\n 82\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 84 83\n of 95\n of 94\n\n\n\n\ndocumentation, CUDA implements exemplary \u201cmemory management functions\u201d that \u201c[c]op[y]\n\ndata between host [CPU] and device [GPU].\u201d This includes CUDA functions \u201ccudaMemcpy\u201d and\n\n\u201ccudaMemcpyAsync.\u201d\n\n\n\n\n *****\n\n\n\n\n *****\n\n\n\n\n(See https://docs.nvidia.com/cuda/cuda-runtime-api/group__CUDART__MEMORY.html\n\n(emphasis added).)\n\n 156. As an example, exemplary CUDA memory management function\n\n\u201ccudaMemcpyAsync\u201d \u201c[c]opies count bytes [data] from the memory area pointed to by src [source\n\nmemory address pointer] to the memory area pointed to by dst [destination memory address\n\npointer], where kind [type of transfer] specifies the direction of the copy.\u201d Destinations includes\n\n\u201ccudaMemcpyHostToDevice [CPU to device GPU], cudaMemcpyDeviceToHost [GPU to CPU],\n\ncudaMemcpyDeviceToDevice [GPU to GPU]. Because the function \u201ccudaMemcpyAsync() is\n\nasynchronous with respect to the host, [] the call may return before the copy is complete. The copy\n\ncan optionally be associated to a stream [identified stream] by passing a non-zero stream\n\nargument.\u201d\n\n\n\n\n 83\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 85 84\n of 95\n of 94\n\n\n\n\n(See https://docs.nvidia.com/cuda/cuda-runtime-api/group__CUDART__MEMORY.html\n\n(emphasis added).)\n\n 157. The Accused Products perform a method that includes executing the user command\n\nduring execution of the computations representing the artificial neural network at times\n\ndetermined by the computational stream. For instance, as shown by exemplary and publicly\n\navailable CUDA toolkit documentation, CUDA implements \u201cmemory management functions\u201d that\n\n\u201c[c]op[y] data between host [CPU] and device [GPU].\u201d\n\n\n\n\n 84\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 86 85\n of 95\n of 94\n\n\n\n\n *****\n\n\n\n\n *****\n\n\n\n\n(See https://docs.nvidia.com/cuda/cuda-runtime-api/group__CUDART__MEMORY.html\n\n(emphasis added).)\n\n 158. As an example, exemplary CUDA memory management function\n\n\u201ccudaMemcpyAsync\u201d \u201c[c]opies count bytes [data] from the memory area pointed to by src [source\n\nmemory address pointer] to the memory area pointed to by dst [destination memory address\n\npointer], where kind [type of transfer] specifies the direction of the copy.\u201d Because the function\n\n\u201ccudaMemcpyAsync() is asynchronous with respect to the host, [] the call may return before the\n\ncopy is complete. The copy can optionally be associated to a stream [identified stream].\u201d\n\n\n\n\n 85\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 87 86\n of 95\n of 94\n\n\n\n\n(See https://docs.nvidia.com/cuda/cuda-runtime-api/group__CUDART__MEMORY.html\n\n(emphasis added).)\n\n 159. In another example, CUDA implements \u201cCUDA-specific memory APIs [that]\n\nprovide users with guarantees about where the memory resides, which threads can access it,\n\nwhether it is migratable, and many other features that enable users to extract all the performance\n\nthe hardware has to offer.\u201d\n\n\n\n\n(See https://resources.nvidia.com/en-us-grace-cpu/nvidia-grace-hopper (emphasis added).)\n\n\n 86\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 88 87\n of 95\n of 94\n\n\n\n\n 160. Each claim in the \u2019461 Patent recites an independent invention. Neither claim 21,\n\ndescribed above, nor any other individual claim is representative of all claims in the \u2019461 Patent.\n\n 161. Defendant has been aware of the \u2019461 Patent since at least the filing of the original\n\nComplaint. Defendant has been aware of the technology patented by the \u2019461 Patent since at least\n\n2007, when the inventors of the Asserted Patents first discussed their patented technologies with\n\nMr. Sanford Russell, then the CTO of Nvidia. At the time, the inventors asked Defendant to\n\ncollaborate with them on training neural networks using Nvidia\u2019s GPUs. Defendant informed the\n\ninventors, through Mr. Russell, that it was not interested in the collaboration. Defendant has also\n\ncited an ancestor of the \u2019461 Patent in its own patent portfolio since at least June 28, 2010 (See\n\nhttps://patents.google.com/patent/US8648867B2/en?oq=8648867#citedBy;\n\nhttps://patentimages.storage.googleapis.com/ee/13/e9/61df149c3fddc7/US8922566.pdf;\n\nhttps://patentcenter.uspto.gov/applications/13335850/displayReferences/referenceForms?applicat\n\nion= (Nvidia U.S. Appl. No. 13/335,850 August 12, 2014, List of References Cited by Examiner).)\n\n 162. Starting in or around 2016, the inventors of the Asserted Patents held multiple\n\ndiscussions with Nvidia to invest in or purchase their AI company, Neurala, Inc., and all its assets,\n\nincluding the \u2019461 Patent family. These discussions included at least Mr. Alvin Lin, an Nvidia\n\nSenior Director of Business Development, and Mr. Jeff Herbst, then an Nvidia Vice President of\n\nBusiness Development and head of Nvidia\u2019s Inception GPU Ventures, in or around September 6,\n\n2016. In or around October 2016, Nvidia, through its representatives, initiated discussions with\n\nthe inventors to invest in Neurala, Inc. for approximately $10 million.\n\n 163. The inventors also discussed their patented technology, including the underlying\n\ntechnology and family to the \u2019461 Patent, with Defendant\u2019s representatives at Nvidia\u2019s artificial\n\nintelligence conference in or around June 2017. On or about June 26, 2017, Defendant received\n\n\n\n\n 87\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 89 88\n of 95\n of 94\n\n\n\n\nmaterials from the inventors, in lieu of a meeting on or about June 29, that identified patents related\n\nto the \u2019461 Patent and described the technology in detail. Defendant had previously stated it was\n\ninterested in the inventors\u2019 solutions. Defendant also featured the inventors on its website as\n\nmembers of Defendant\u2019s start-up incubator on or about September 25, 2019.\n\n\n\n\n *****\n\n\n\n\n(See https://developer.nvidia.com/blog/inception-spotlight-ai-startup-neurala-sees-7x-speedup-\n\nwith-ngc/ (September 25, 2019); see also https://www.youtube.com/watch?v=-WBtxGLoQNs\n\n(\u201cNeurala Accelerating AI Video Annotation with NGC Containers\u201d posted by Defendant\u2019s\n\nYouTube account).)\n\n 164. Neural AI and/or its predecessors-in-interest have satisfied all statutory obligations\n\nrequired to collect pre-filing damages for the full period allowed by law for infringement of the\n\n\u2019461 Patent.\n\n 165. Defendant directly infringes at least claim 21 of the \u2019461 Patent, either literally or\n\nunder the doctrine of equivalents, by performing the steps described above. For example,\n\nDefendant performs the claimed method in an infringing manner as described above by\n\n\n 88\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 90 89\n of 95\n of 94\n\n\n\n\nimplementing the Accused Products as part of its accelerated computing operations and running\n\ncorresponding software that implements the infringing performance. Defendant also performs the\n\nclaimed method in an infringing manner when testing the operation of the Accused Products and\n\ncorresponding systems. As another example, Defendant performs the claimed method when\n\nproviding or administering services to third parties, customers, and partners using the Accused\n\nProducts.\n\n 166. Defendant\u2019s partners, customers, and users of its Accused Products and\n\ncorresponding systems and services directly infringe at least claim 21 of the \u2019461 Patent, literally\n\nor under the doctrine of equivalents, at least by using the Accused Products and corresponding\n\nsystems and services, as described above.\n\n 167. Defendant has actively induced and is actively inducing infringement of at least\n\nclaim 21 of the \u2019461 Patent with specific intent to induce infringement, and/or willful blindness to\n\nthe possibility that its acts induce infringement, in violation of 35 U.S.C. \u00a7 271(b). For example,\n\nDefendant encourages and induces customers to use Nvidia\u2019s CUDA platform in a manner that\n\ninfringes claim 21 of the \u2019461 Patent at least by offering and providing software that performs a\n\nmethod that infringes claim 21 when installed and operated by the customer using the Accused\n\nProducts, and by engaging in activities relating to selling, marketing, advertising, promotion,\n\ninstallation, support, and distribution of the Accused Products.\n\n 168. Defendant encourages, instructs, directs, and/or requires third parties\u2014including\n\nits certified partners and/or customers\u2014to perform the claimed method using the software,\n\nplatform, services, and systems in infringing ways, as described above.\n\n 169. Defendant further encourages and induces its customers to infringe claim 21 of the\n\n\u2019461 Patent: 1) by making its accelerated computing and data center services available on its\n\n\n\n\n 89\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 91 90\n of 95\n of 94\n\n\n\n\nwebsite, providing applications that allow users to access those services, widely advertising those\n\nservices, and providing technical support and instructions to users (see\n\nhttps://www.nvidia.com/en-us/data-center/data-center-gpus/gpu-test-drive/); and 2) through\n\nactivities relating to marketing, advertising, promotion, installation, support, and distribution of\n\nthe Accused Products, including its CUDA platform, and services in the United States. (See\n\nhttps://www.nvidia.com/en-us/; see https://www.nvidia.com/en-us/about-nvidia/partners/;\n\nhttps://www.nvidia.com/en-us/data-center/where-to-buy/; https://www.nvidia.com/en-us/data-\n\ncenter/where-to-buy-tesla/.)\n\n 170. For example, Defendant shares instructions, guides, and manuals, which advertise\n\nand instruct third parties on how to use its hardware and platform as described above, including at\n\nleast customers and partners. (See https://docs.nvidia.com/cuda/cuda-c-programming-guide/.)\n\nDefendant also provides customer service and technical support to purchasers of the Accused\n\nProducts and corresponding systems and services, which directs and encourages customers to\n\nperform certain actions that use the Accused Products in an infringing manner. (See\n\nhttps://www.nvidia.com/en-us/support/; https://www.nvidia.com/en-\n\nus/support/enterprise/services/.)\n\n 171. Defendant and/or Defendant\u2019s partners recommend and sell the Accused Products\n\nand provide technical support for the installation, implementation, integration, and ongoing\n\noperation of the Accused Products for each individual customer. On information and belief, each\n\ncustomer enters into a contractual relationship with Defendant and/or one of Defendant\u2019s partners,\n\nwhich obligates each customer to perform certain actions in order to use the Accused Products.\n\n(See https://www.nvidia.com/en-us/agreements/; https://www.nvidia.com/en-\n\nus/agreements/cloud-services/nvidia-cloud-agreement/; https://www.nvidia.com/en-\n\n\n\n\n 90\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 92 91\n of 95\n of 94\n\n\n\n\nus/agreements/cloud-services/service-specific-terms-for-nvidia-dgx-cloud/.) Further, in order to\n\nreceive the benefit of Defendant\u2019s and/or its partner\u2019s continued technical support and their\n\nspecialized knowledge and guidance of the operability of the Accused Products, each customer\n\nmust continue to use the Accused Products in a way that infringes the \u2019461 Patent. (See\n\nhttps://www.nvidia.com/en-us/support/.)\n\n 172. Further, as the entity that provides installation, implementation, and integration of\n\nthe Accused Products in addition to ensuring the Accused Product remains operational for each\n\ncustomer through ongoing technical support, on information and belief, Defendant and/or\n\nDefendant\u2019s partners affirmatively aid and abet each customer\u2019s use of the Accused Products in a\n\nmanner that performs the claimed method of, and infringes, the \u2019461 Patent.\n\n 173. Defendant also contributes to the infringement of its partners, customers, and users\n\nof the Accused Products by providing within the United States or importing into the United States\n\nthe Accused Products, which are for use in practicing, and under normal operation practice, the\n\nmethods, systems, and devices claimed in the Asserted Patents, constituting a material part of the\n\ninventions claimed, and not a staple article or commodity of commerce suitable for substantial\n\nnon-infringing uses. Indeed, as shown above, the Accused Products and the example functionality\n\nhave no substantial non-infringing uses but are specifically designed to practice the \u2019461 Patent.\n\n 174. On information and belief, the infringing actions of each partner, customer, and/or\n\nuser of the Accused Products are attributable to Defendant. For example, on information and belief,\n\nDefendant directs and controls the activities or actions of its partners or others in connection with\n\nthe Accused Products by contractual agreement or otherwise requiring partners or others to provide\n\ninformation and instructions to customers who acquire the Accused Products which, when\n\nfollowed, results in infringement. Defendant further directs and controls the operation of devices\n\n\n\n\n 91\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 93 92\n of 95\n of 94\n\n\n\n\nexecuting the Accused Products by programming the software which, when executed by a\n\ncustomer or user, performs the claimed method of at least claim 21 of the \u2019461 Patent.\n\n 175. Plaintiff has suffered and continues to suffer damages as a result of Defendant\u2019s\n\ninfringement of the \u2019461 Patent. Defendant is therefore liable to Plaintiff under 35 U.S.C. \u00a7 284\n\nfor damages in an amount that adequately compensates Plaintiff for Defendant\u2019s infringement, but\n\nno less than a reasonable royalty.\n\n 176. Defendant\u2019s infringement of the \u2019461 Patent is knowing and willful. Defendant\n\nacquired actual knowledge of the family of the \u2019461 Patent since at least 2017 and has acquired\n\nadditional knowledge of the \u2019461 Patent since at least the filing of this lawsuit.\n\n 177. On information and belief, despite Defendant\u2019s knowledge of the Asserted Patents and\n\nPlaintiff\u2019s patented technology, Defendant made the deliberate decision to sell products and services\n\nthat it knew infringe these patents. Defendant\u2019s continued infringement of the \u2019461 Patent with\n\nknowledge of the \u2019461 Patent constitutes willful infringement.\n\n\n\n\n 92\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 94 93\n of 95\n of 94\n\n\n\n\n PRAYER FOR RELIEF\n\nWHEREFORE, Plaintiff respectfully requests the following relief:\n\n a) That this Court adjudge and decree that Defendant has been, and is currently,\n\n infringing each of the Asserted Patents;\n\n b) That this Court award Plaintiff damages to compensate for Defendant\u2019s past and\n\n future infringement of the Asserted Patents, through the life of the Asserted Patents;\n\n c) That this Court award Plaintiff pre- and post-judgment interest on such;\n\n d) That this Court order an accounting of damages incurred by Plaintiff from six years\n\n prior to the date this lawsuit was filed through entry of a final, non-appealable\n\n judgment;\n\n e) That this Court determine that this patent infringement case is exceptional and\n\n award Plaintiff its costs and attorneys\u2019 fees incurred in this action;\n\n f) That this Court award increased damages under 35 U.S.C. \u00a7 284; and\n\n g) That this Court award such other relief as the Court deems just and proper.\n\n DEMAND FOR JURY TRIAL\n\n Plaintiff respectfully requests a trial by jury on all issues triable thereby.\n\n\n\n\n 93\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-2 30 Filed\n Filed\n 08/18/26\n 12/12/24 Page\n Page\n 95 94\n of 95\n of 94\n\n\n\nDATED: December 12, 2024\n By:/s/ Mark D. Siegmund\n Mark D. Siegmund\n Texas Bar No. 24117055\n CHERRY JOHNSON SIEGMUND JAMES\n PLLC\n Bridgeview Center\n 7901 Fish Pond Road, 2nd Floor\n Waco, Texas 76710\n Telephone: (254) 732-2242\n Facsimile: (866) 627-3509\n msiegmund@cjsjlaw.com\n\n Christopher C. Campbell\n KING & SPALDING LLP\n 1700 Pennsylvania Avenue, NW\n Suite 900\n Washington, DC 20006\n Telephone: (202) 626-5578\n Facsimile: (202) 626-3737\n ccampbell@kslaw.com\n\n Britton F. Davis\n Brian Eutermoser (pro hac vice to be filed)\n KING & SPALDING LLP\n 1401 Lawrence Street\n Suite 1900\n Denver, CO 80202\n Telephone: (720) 535-2300\n Facsimile: (720) 535-2400\n bfdavis@kslaw.com\n beutermoser@kslaw.com\n\n Attorneys for Plaintiff Neural AI, LLC\n\n\n CERTIFICATE OF SERVICE\n\n The undersigned does hereby certify that a true and correct copy of the foregoing document\n\nwas served on all counsel of record via the Court\u2019s electronic filing system on this 12th day of\n\nDecember 2024.\n\n By:/s/ Mark D. Siegmund\n Mark D. Siegmund\n\n\n\n 94\n\f","ocr_status":2,"date_upload":"2026-08-20T10:23:17.579800-07:00","document_number":"1","attachment_number":2,"pacer_doc_id":"181037219943","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 1","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622534/","id":490622534,"tags":[],"absolute_url":"/docket/74666997/1/3/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.311823-07:00","date_modified":"2026-08-23T08:23:04.829211-07:00","sha1":"28c9e50c04188aa54a17c3141559da59ac85762d","page_count":15,"file_size":1311107,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.3.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.3.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-3 Filed 08/18/26 Page 1 of 15\n\n\n\n\n EXHIBIT\n\n 2\n\f Case 7:26-mc-00323-DC Document 1-3 Filed 08/18/26 Page 2 of 15\n\n USOO8648867B2\n\n\n(12) United States Patent (10) Patent No.: US 8,648,867 B2\n Gorchetchnikov et al. (45) Date of Patent: Feb. 11, 2014\n(54) GRAPHIC PROCESSORBASED (56) References Cited\n ACCELERATOR SYSTEMAND METHOD\n U.S. PATENT DOCUMENTS\n(75) Inventors: Anatoli Gorchetchnikov, Belmont, MA 5,388,206 A * 2/1995 Poulton et al. ................ 345,505\n (US); Heather Marie Ames, South 2005, 0166042 A1* 7, 2005 Evans ............ T13,150\n Boston, MA (US); Massimiliano 2007/0052713 A1* 3/2007 Chung et al. ... 34.5/5O1\n Versace, South Boston, MA (US); 2007/0279429 A1* 12/2007 Ganzer ......................... 345,582\n Fabrizio Santini, Jamaica Plain, MA\n (US) * cited by examiner\n(73) Assignee: Neurala LLC, Boston, MA (US) Primary Examiner \u2014 Maurice L. McDowell, Jr.\n(*) Notice: Subject to any disclaimer, the term of this (57) ABSTRACT\n patent is extended or adjusted under 35 An accelerator system is implemented on an expansion card\n U.S.C. 154(b) by 1030 days. comprising a printed circuit board having (a) one or more\n graphics processing units (GPU), (b) two or more associated\n(21) Appl. No.: 11/860,254 memory banks (logically or physically partitioned), (c) a\n(22) Filed: Sep. 24, 2007 specialized controller, and (d) a local bus providing signal\n coupling compatible with the PCI industry standards (this\n(65) Prior Publication Data includes but is not limited to PCI-Express, PCI-X, USB 2.0,\n or functionally similar technologies). The controller handles\n US 2008/O 117220 A1 May 22, 2008 most of the primitive operations needed to set up and control\n Related U.S. Application Data GPU computation. As a result, the computer's central pro\n cessing unit (CPU) is freed from this function and is dedicated\n(60) Provisional application No. 60/826,892, filed on Sep. to other tasks. In this case a few controls (simulation start and\n 25, 2006. stop signals from the CPU and the simulation completion\n signal back to CPU), GPU programs and input/output data are\n(51) Int. C. the information exchanged between CPU and the expansion\n G06F 5/00 (2006.01) card. Moreover, since on every time step of the simulation the\n(52) U.S. C. results from the previous time step are used but not changed,\n USPC ........................................... 345/501; 34.5/503 the results are preferably transferred back to CPU in parallel\n(58) Field of Classification Search with the computation.\n USPC .................................................. 345/501,503\n See application file for complete search history. 19 Claims, 5 Drawing Sheets\n\n 140 200\n 8O 250\n -4\n\n\n SHADERE.K.\n MEMORY\n\n 50\n\n O EXRE\n - icon TROLLER w NEMORY\n\n C\n -\n\n\n\n\n 2\n\f Case 7:26-mc-00323-DC Document 1-3 Filed 08/18/26 Page 3 of 15\n\n\nU.S. Patent Feb. 11, 2014 Sheet 1 of 5 US 8,648,867 B2\n\n\n\n\n 7.\n\n\n\n\n $3.\n\n\n\n\n s\n\n\n\n\n FG,\n\f Case 7:26-mc-00323-DC Document 1-3 Filed 08/18/26 Page 4 of 15\n\n\nU.S. Patent Feb. 11, 2014 Sheet 2 of 5 US 8,648,867 B2\n\n\n\n\n g\n i.\n :\n i\n : r\n s\n al e3esiasti Od\n\n\n s\n\n 3\n\n\n s\n\f Case 7:26-mc-00323-DC Document 1-3 Filed 08/18/26 Page 5 of 15\n\n\nU.S. Patent Feb. 11, 2014 Sheet 3 of 5 US 8,648,867 B2\n\n\n\n\n 300\n CPU 120 Start\n 304\n Expansion Cardiso :\n iaia fict iss: Risitio: &::::::::8:::::::::\n Sires 301 Se::303\n 320\n Disk:O Graphic User Controller\n Interface initialization\n initialization Initialization\n\n\n\n\n 325\n User input Parser External input\n Texture textures from RAM to\n interaction Generator texture memory bank\n 326 :\n Population Parser Population shader\n Shader Generato binaries from RAM to\n and Compiler shader memory bank\n\n\n\n\n Simulation\n Initialization\n\n\n 330\n\n\n Progress Input Parser\n monitor Texture\n Generator Computation\n (see Fig. 4)\n Data output\n to Disk\n Output Data Data\n ACCumulation issils\n in RAM\n\n Last\n iteration\n 318 :\n\n Yes\n 350\n\n\n\n\n 3\n\f Case 7:26-mc-00323-DC Document 1-3 Filed 08/18/26 Page 6 of 15\n\n\nU.S. Patent Feb. 11, 2014 Sheet 4 of 5 US 8,648,867 B2\n\n\n Expansion Card 180\n\n Simulation\n start\n\n iDesi: {34}{ut : {iciplisiii) 2. iaia iiii:\n Si:Sires: Siii:Sire:: Silisirai?\n 402 403 404\n Input textures from\n texture memory\n bank to GPU\n\n\n\n Shaders from\n shader memory\n bank to GPU\n\n\n ... ...........\n\n\n\n\n Shader\n execution\n\n\n\n\n Output texture\n upload to texture\n memory bank\n\n New external input Data\n textures from RAM told -----------\n\n\n\n\n Wait for swap Swap input Wait for swap\n of input/output and output of input/output\n texture pointers texture pointers texture pointers\n\n 475\n Input textures from NO Last\n texture memory iteration?\n bank to RAM\n Yes\n\n\n\n iteration?\n Yes 490\n Wait for all three\n streams of\n execution to finish\n\n 499\n\n\n\n EIG 4\n\f Case 7:26-mc-00323-DC Document 1-3 Filed 08/18/26 Page 7 of 15\n\n\nU.S. Patent Feb. 11, 2014 Sheet 5 of 5 US 8,648,867 B2\n\n\n\n\n (p)\n\n\n\n\n *\u00b7,,?)&xaddO2OInputDependency(m gate1, O., O., 0.004, O., 0, 0);\nInteraction Stream, Data Output Stream, and Computational u->addFullDependency(m gate2, population());\nStream. Through TSimulator:timestep(), TSimulator:out 40\nfileInterval ( ), and TSimulator:outmode(), the application public: TCablePopRCF(): TPopulation(\u201ccompCPU RCF, w, h, true)\ncan set the time step of the simulation, the time step of disk { };\noutput, and the mode of the disk output. The external input ~TCablePopRCF() {if(m equation) delete m equation;\n if(m gate1) delete m gate1;\npattern should be packed into a TPattern object and bound to\nthe simulation object through TSimulator:resetInputs( ) 45 bool if(m gate2) delete m gate2:};\n fillElements(TSimulator sim);\nmethod. TSimulator::simLength( ) sets the length of the }:\nsimulation. bool TCablePopRCF::fillElements(TSimulatior sim)\n The second step is to create at least one population of { equation = new TEq RCF (this, m compet, m persist);\nequations (TPopulation object). Population holds one equa mcreateCatingStructure();\ntion object TEquation. This object contains only a formula 50 for(size ti = 0; i < x.Size(); ++i)\nand does not hold element-specific data, so all elements of the for(size tj = 0; j < ySize(); ++)\npopulation can share single TEquation. {\n The TEquation object is converted to a GPU program TElement u = new TCPUElement(this, m equation, i,j):\n sim->addUnit(u);\nbefore execution. GPU programs have to be executed within createUnitStructure(u);\na graphical context, which is stream specific. TSimulator 55 return true:\ncreates this context within a Computational Stream, therefore\nall programs and data arrays that are necessary for computa int\ntion have to be initialized within Computational Stream. Con main()\nstructor of TPopulation is called from User Interaction //{ Input pattern generation (309 in FIG. 3)\nStream, so no GPU-related objects can be initialized in this 60 uint32 t pat = new uint32 twh;\nCOnStructOr. TRandom-float randGen (O);\n TPopulation::fillElements( ) is a virtual method designed for(uint32 ti = 0; i < wh; ++i)\nto overcome this difficulty. It is called from within the Com pati = randGen.random ();\nputational Stream after TSimulator::networkCreate( ) is TPattern p = new TPattern (pat, w, h);\n if Setting up the simulation\ncalled in the User Interaction Stream. A user has to override 65 TSimulator cableSim = new TSimulator(\u201cdata'); fi(308 and 320 in\nTPopulation::fillElements( ) to create TEquation and other FIG. 3)\ncomputation related objects both element independent and\n\f Case 7:26-mc-00323-DC Document 1-3 Filed 08/18/26 Page 13 of 15\n\n\n US 8,648,867 B2\n 11 12\n -continued need to perform the computations and initiates the upload 435\n of them onto the GPU 240. The GPU 240 can communicate\ncableSim->timestep(0.05); fi(320 in FIG. 3)\ncableSim->resetInputs(p); (325 in FIG. 3) directly with the texture memory bank 250 to upload the\ncableSim->OutfileInterval(0.1); (308 in FIG. 3) appropriate texture to perform the computations. The control\ncableSim->Outmode(SANNDRA::timefunc); (308 in FIG. 3)\ncableSim->simLength(60.0); (320 in FIG. 3)\n ler 220 also pulls the first shader (known by the stored order)\nif Preparing the population from the shader memory bank 210 and uploads 450 it onto the\nTPopulation* cablePop = new TCablePopRCF(); //(310 in FIG. 3) GPU 240.\ncableSim->networkCreate(); //(326 in FIG. 3) The GPU 240 executes the following operations in this\nuint16 t user = 1; order: performs the computation (execution of the shader)\nwhile(user) 10\n 470; tells the controller 220 that it is done with the computa\nif(cableSim->simulationStart(true, 1)) (311 in FIG. 3) tions for the current shader; and after all shaders for this\nexit(1): particular equation are executed sends 480 the output textures\nstd::cout-\u201cRepeat?\\n: //(305 in FIG. 3)\nstd::cin>user; //(305 in FIG. 3) to the output portion of the texture memory bank 250. This\nif(user == 1) 15 cycle continues through all of the equations based on the\ncableSim->networkReset(); //(305 in FIG. 3) branching step 482.\nif cableSim) An example shader that performs fourth order Runge\ndelete cableSim; Also deletes cablePop and its internals Kutta numerical integration is shown in Listing 2 using GLSL\nexit(0); notation;\nListing 1.\n\n FIG. 4 is a detailed flow diagram illustrating a part of an uniform sampler2DRect Variable;\n uniform float integration step;\nexemplary implementation of the bottom level system and float halfstep = integration step*0.5;\nmethod performed during the computation on the GPU accel 25 float fl. 6 step = integration stepf 6.0:\nerator of the expansion card 180 and is a more detailed view vec4 output = texture2DRect(Variable, gl TexCoord O.st);\n if define equation() here\nof the computational box 330 in FIG. 3. FIG. 4 is a represen vec4 rungekutta4(vec4 x)\ntation of one of several ways in which a system and method\nfor processing numerical techniques can be implemented. const vecA k1 = equation(x);\n const vec4 k2 = equation(x + halfstep*k1);\n With systems of equations that have complex interdepen 30 const vec4 k3 = equation(x + halfstep*k2);\ndencies it is likely that the variable in Some equation from a const vecA k4 = equation(x + integration Step*k3);\nprevious time step has to be used by some other equation after return fl. 6step*(k1 + 2.0* (k2 + k3) + k4);\nthe new values of this variable are already computed for new\ntime step. To avoid data confusion, the new values of variables void main (void)\n {\nshould be rendered in a separate texture. After the time step is 35 output += rungekutta4(output);\ncompleted for all equations, these new values should be cop gl FragColor = output;\nied over old values so that they are used as input during the Listing 2.\nnext time step. Copying textures is an expensive operation,\ncomputationally, but since the textures are referred to by\ntexture IDs (pointers), Swapping these pointers for input and 40 The shader in Listing 2 can be executed on conventional\noutput textures after each time step achieves the same resultat video card. Using the controller 220 this code can be further\na much lesser cost. optimized, however. Since the integration step does not\n In the hardware solution suggested herein, ID Swapping is change during the simulation, the step itself as well as the\nequivalent to Swapping the base memory address for two halfstep and /6 of the step can be computed once per simula\npartitions of the texture memory bank 250. They are swapped 45 tion, and updated in all shaders by a shader update procedures\n485 during synchronization (485, 430, and 455) so that data\ntransfer 445 and the computation 435-487 proceeds immedi 310,326 discussed above.\nately and in parallel with data transfer as shown in FIG. 4. A computed theofmain\n After all the equations in the computational cycle are\nhardware solution allows this parallelism through access of 220 can switch 485execution the\n substream 403 on the controller\n reference pointers of the input and\nthe controller 220 to the onboard texture memory bank 250. 50 output portions of the texture memory bank 250.\n The main computation and data exchange are executed by The two other substreams of execution on the controller\nthe controller 220. It runs three parallel substreams of execu\ntion: Computational Substream 403, Data Output Substream 220 are waiting (blocks 430 and 455, respectively) for this\n402, and Data Input Substream 404. These streams are syn switch to begin their execution. The Data Input Substream\nchronized with each other during the swap of pointers 485 to 55 404 is controlling 440 the input of additional data from the\nthe input and output texture memory partitions of the texture CPU 120. This is necessary in cases where the simulation is\nmemory bank 250 and the check for the last iteration 487. monitoring the changing input, for example input from a\nAlgorithmically, these two operations are a single atomic video camera or other recording device in the real time. This\noperation, but the block diagram shows them as two separate substream uploads new external input from the CPU 120 to\nblocks for clarity. 60 the texture memory bank 250 so it can be used by the main\n The Computational Substream 403 performs a computa computational Substream 403 on the next computational step\ntional cycle including a sequential execution of all shaders and waits for the next iteration 475. The Data Output Sub\nthat were stored in the shader memory bank 210 using the stream 445 controls the output of simulation results to the\nappropriate input and output textures. To begin the simulation CPU 120 if requested by the user. This substream uploads the\nthe controller 220 initializes three execution substreams 403, 65 results of the previous step to the main RAM 130 so that the\n402, and 404. On every simulation step, the Computational CPU 120 can save them on disk 140 or show them on the\nSubstream 403 determines which textures the GPU 240 will results display 313 and waits for the next iteration 460.\n\f Case 7:26-mc-00323-DC Document 1-3 Filed 08/18/26 Page 14 of 15\n\n\n US 8,648,867 B2\n 13 14\n Since the Computational Substream 403 determines the While this invention has been particularly shown and\ntiming of input 440 and output 445 data transfers, these data described with references to preferred embodiments thereof,\ntransfers are driven by the controller 220. To further reduce it will be understood by those skilled in the art that various\nthe data transfer overhead (and disk 140 overhead also) the changes in form and details may be made therein without\ncontroller 220 initiates transfer only after selected computa departing from the scope of the invention encompassed by the\ntional steps. For example, if the experimental data that is appended claims.\nsimulated was recorded every 10 milliseconds (msec) and the\nsimulation for better precision was computed every 1 mSec, What is claimed is:\nthen only every tenth result has to be transferred to match the 1. A computer system for performing a numerical simula\nexperimental frequency. 10 tion over a plurality of computational cycles including at least\n This solution stores two copies of output data, one in the a first computational cycle and a second computational cycle,\nexpansion card texture memory bank 250 and another in the the computer system comprising:\nsystem RAM 130. The copy in the system RAM 130 is a central processing unit;\naccessed twice: for disk I/O and screen visualization 313. An a main memory, operably coupled to the central processing\nalternative solution would be to provide CPU 120 with a 15 unit, to store input data to be accessed by the central\ndirect read access to the onboard texture memory bank 250 by processing unit in performing the numerical simulation;\nmapping the memory of the hardware onto a global memory a video system, operably coupled to the central processing\nspace. The alternative solution will double the communica unit, to drive a video monitor to display an indication of\ntion through the local bus 190. Since the goal discussed herein the numerical simulation in response to the computer\nis reducing the information transfer through the local bus 190, system performing the numerical simulation;\nthe former solution is favored. an accelerator, operably coupled to the central processing\n The main stream substream 403 determines if this is the last unit, to receive at least a portion of the input data from\niteration 487. If it is the last iteration, the controller 220 waits the central processing unit and to provide first output\nfor the all of the execution substreams to finish 490 and then data generated during the first computational cycle to the\nreturns the control to the CPU 120, otherwise it begins the 25 central processing unit after a conclusion of the first\nnext computational cycle. computational cycle, the accelerator comprising:\n This repeats through all of the computational cycles of the at least one graphics processing unit to generate second\nsimulation. output data, during the second computational cycle,\n Conclusion by performing at least one calculation on the first\n This GPU accelerator system offers the following potential 30 output data; and\nadvantages: an accelerator memory, operably coupled to the at least\n 1. Limited computations on the CPU 120. The CPU 120 is one graphic processing unit, the accelerator memory\nonly used for user input, sending information to the controller comprising:\n220, receiving output after each computational cycle (or less a first partition, referenced by a first pointer, to store\nfrequently as defined by the user), writing this output to disk 35 the first output data during the second computa\n140, and displaying this output on the monitor 170. This frees tional cycle; and\nthe CPU 120 to execute other applications and allows the a second partition, referenced by a second pointer, to\nexpansion card to run at its full capacity without being slowed store the second output data generated during the\ndown by extensive interactions with the CPU 120. second computational cycle; and\n 2. Minimizing data transfer between the expansion card 40 an accelerator controller, operably coupled to the accelera\n180 and the system bus 200. All of the information needed to tor memory and the central processing unit, to transfer\nperform the simulations will be stored on the expansion card the at least the portion of the input data into the accel\n180 and all simulations will take place on it. Furthermore, erator memory before the first computational cycle, to\nwhatever data transfer remains necessary will take place in transfer the first output data from the accelerator\nparallel with the computation, thus reducing the impact of this 45 memory to the main memory during the second compu\ntransfer on the performance. tational cycle, to direct the second output data into the\n 3. New way to execute GPU programs (shaders). Previ second partition during the second computational cycle,\nously, the CPU 120 had full control over the order of shaders and to Swap the first pointer and the second pointer at the\nexecution and was required to produce specific commands on conclusion of the second computational cycle Such that\nevery cycle to tell the GPU 240 which shader to use. With the 50 the second output data becomes an input for a third\ninvention disclosed herein, shaders will initially be stored on computational cycle of the plurality of computational\nthe shader memory bank 210 on the expansion card 180 and cycles.\nwill be sent to the GPU 240 for execution by the general 2. The computer system as claimed in claim 1, wherein the\npurpose controller 220 located on the expansion card. accelerator controller is configured to dictate an order of\n 4. Multiple parallelisms. The GPU 240 is inherently paral 55 execution of instructions to the at least one graphics process\nlel and is well suited to perform parallel computations. In ing unit.\nparallel with the GPU 240 performing the next calculation, 3. The computer system as claimed in claim 1, wherein the\nthe controller 220 is uploading the data from the previous accelerator controller comprises an interface controller to\ncalculation into main memory 130. Furthermore, the CPU communicate with the central processing unit over a bus of\n120 at the same time uses uploaded previous results to save 60 the computer system.\nthem onto disk 140 and to display them on the screen through 4. The computer system as claimed in claim 1, wherein the\nthe system bus 200. accelerator memory comprises a texture memory bank to\n 5. Reuse of existing and affordable technology. All hard store the at least the portion of the input data and the first\nware used in the invention and mentioned here-in are based on output data and a shader memory bank to store instructions\ncurrently available and reliable components. Further advance 65 for performing a set of operations to be performed on the at\nof these components will provide straightforward improve least the portion of the input data by the at least one graphic\nments of the invention. processing unit.\n\f Case 7:26-mc-00323-DC Document 1-3 Filed 08/18/26 Page 15 of 15\n\n\n US 8,648,867 B2\n 15 16\n 5. The computer system as claimed in claim 4, wherein the bank to store instructions for processing operations to be\ntexture memory is partitioned into the first partition, the sec performed on the input data by the at least one graphic pro\nond partition, a third partition to store internal variables, a cessing unit.\nfourth partition to store data textures used as input at a par 13. The accelerator system as claimed in claim 12, wherein\nticular computation cycle of the plurality of computational 5 the texture memory is partitioned into a first partition to store\ncycles. the input data, a second partition to store internal variables, a\n 6. The computer system as claimed in claim 1, wherein the third partition to store data textures used as input at a particu\naccelerator controller inputs the at least the portion of the lar computation cycle of the numerical simulation, and a\ninput data and a series of instructions into the at least one fourth partition to store the output data.\ngraphic processing unit, wherein the at least one graphics 10\nprocessing unit then executes the instructions on the at least the14. The accelerator system as claimed in claim 9, wherein\n accelerator controller is configured to perform successive\nthe portion of the input data. computational cycles of the numerical simulation by feeding\n 7. The computer system as claimed in claim 1, wherein the the output data generated\naccelerator controller comprises a set of instructions stored ing unit from a previous by the at least one graphic process\n computational cycle and the input\non a memory. 15\n 8. The computer system as claimed in claim 1, wherein the data for a next computational cycle into the at least one\nat least the portion of the input data represents an initial graphic processing unit.\ncondition of the numerical simulation. 15. The accelerator system as claimed in claim 9, wherein\n 9. An accelerator system for a computer system performing the accelerator controller comprises a set of instructions\na numerical simulation, the accelerator system comprising: 20 stored in a memory.\n 16. A method for performing a numerical simulation on\n at least one graphics processing unit to generate output data input data in a computer system including a central process\n by performing at least one computation during a first\n computational cycle of the numerical simulation; ing unit and an accelerator, the method comprising:\n an accelerator memory, operably coupled to the at least one receiving, by an accelerator, first input data from the central\n processing unit;\n graphics processing unit, to store data used to perform 25 transferring,\n the at least one computation; and by an accelerator controller, the first input\n an accelerator controller, operably coupled to the accelera data into a first partition, referenced by first pointer. ofan\n tor memory and the at least one graphics processing unit, accelerator memory before a first computational cycle of\n to execute: the numerical simulation;\n (i) a computational stream controlling performance of 30 performing, by at least one graphics processing unit during\n the first computational cycle, at least one calculation on\n the at least one computation by the at least one graph the first portion of the input data as to generate first\n ics processing unit; output data;\n (ii) an output stream controlling transfer of the output storing, by the accelerator controller, the first output data\n data from the at least one graphics processing unit to into a second partition, referenced by a second pointer,\n the accelerator memory during the first computational 35 of the accelerator memory; and\n cycle; and\n (iii) an input stream controlling transfer of input data to Swapping the first pointer with the second pointer at the end\n the accelerator memory for use by the at least one of the first computational cycle, such that the first output\n graphics processing unit during a second computa data becomes an input for a second computational cycle\n of the numerical simulation.\n tional cycle of the numerical simulation. 40\n 10. The accelerator system as claimed in claim 9, wherein 17. The method as claimed inclaim 16, further comprising:\nthe accelerator controller is configured to dictate an order of sending, by the accelerator controller, instructions for per\nexecution of instructions to the at least one graphics process forming the at least one calculation to the at least one\ning unit. graphics processing unit.\n 11. The accelerator system as claimed in claim 9, wherein 45 18. The method as claimed in claim 16, further comprising:\nthe accelerator controller is configured to send instructions to partitioning the accelerator memory into the first partition,\nthe at least one graphics processing unit, wherein the at least the second partition, a third partition to store internal\none graphics processing unit is configured to execute the Variables, and a fourth partition to store data used as\ninstructions on the input data, and wherein the accelerator input at a particular computation cycle of the numerical\n simulation.\ncontroller is configured to transfer the output data from the 50 19. The method of claim 16, further comprising:\naccelerator memory to a main memory during the execution transferring, by the accelerator controller, the first output\nof the instructions by the at least one graphics processing unit. data to the main memory during the second computa\n 12. The accelerator system as claimed in claim 9, wherein tional cycle.\nthe accelerator memory comprises a texture memory bank to\nStore the input data and the output data and a shader memory\n\f","ocr_status":1,"date_upload":"2026-08-20T10:23:16.449405-07:00","document_number":"1","attachment_number":3,"pacer_doc_id":"181037219944","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 2","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622535/","id":490622535,"tags":[],"absolute_url":"/docket/74666997/1/4/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.338918-07:00","date_modified":"2026-08-23T07:59:05.734914-07:00","sha1":"6298051a55564b93e5c35c2a1a994d9992f074be","page_count":22,"file_size":2169756,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.4.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.4.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-4 Filed 08/18/26 Page 1 of 22\n\n\n\n\n EXHIBIT\n\n 3\n\f Case 7:26-mc-00323-DC Document 1-4 Filed 08/18/26 Page 2 of 22\n\n USOORE48438E\n(( 1912)) United\n United States\n Reissued Patent ( 10 ) Patent Number : US RE48,438 E\n Gorchetchnikov et al . (45 ) Date of Reissued Patent : * Feb . 16, 2021\n( 54 ) GRAPHIC PROCESSOR BASED ( 56 ) References Cited\n ACCELERATOR SYSTEM AND METHOD\n U.S. PATENT DOCUMENTS\n( 71 ) Applicant: Neurala, Inc. , Boston, MA (US) 5,063,603 A 11/1991 Burt\n( 72 ) Inventors: Anatoli Gorchetchnikov , Belmont, MA 5,136,687 A 8/1992 Edelman et al .\n (US ) ; Heather Marie Ames , Milton , (Continued )\n MA (US ) ; Massimiliano Versace, FOREIGN PATENT DOCUMENTS\n Milton, MA (US ); Fabrizio Santini ,\n Jamaica Plain, MA (US) EP 1 224 622 B1 7/2002\n WO WO 2014/190208 11/2014\n( 73 ) Assignee : Neurala, Inc. , Boston, MA (US) ( Continued )\n( * ) Notice: This patent is subject to a terminal dis\n claimer . OTHER PUBLICATIONS\n( 21 ) Appl. No .: 15 /808,201 Cornwall et al . , \u201c Automatically Translating a General Purpose C ++\n Image Processing Library for GPUs \u201d , IEEE , Jun . 2006 , 8 pages .\n(22 ) Filed : Nov. 9 , 2017 ( Year: 2006 ) . *\n Related U.S. Patent Documents ( Continued )\nReissue of:\n( 64) Patent No .: 9,189,828 Primary Examiner William H. Wood\n Issued: Nov. 17 , 2015 (74 ) Attorney, Agent, or Firm -Smith Baluch LLP\n Appl. No .: 14 /147,015 ( 57 ) ABSTRACT\n Filed : Jan. 3 , 2014\nU.S. Applications: An accelerator system is implemented on an expansion card\n( 63 ) Continuation of application No. 11 / 860,254 , filed on comprising a printed circuit board having ( a) one or more\n Sep. 24 , 2007 , now Pat . No. 8,648,867 . graphics processing units ( GPUs ) , ( b ) two or more associ\n (Continued ) ated memory banks ( logically or physically partitioned ), (c )\n a specialized controller, and ( d) a local bus providing signal\n( 51 ) Int. Ci. coupling compatible with the PCI industry standards. The\n GO6T 1/60 ( 2006.01 ) controller handles most of the primitive operations to set up\n G06F 9/50 ( 2006.01 ) and control GPU computation. Thus, the computer's central\n (Continued ) processing unit ( CPU) can be dedicated to other tasks . In this\n( 52 ) U.S. Ci . case a few controls ( simulation start and stop signals from\n CPC G06T 1/20 (2013.01 ) ; G06F 9/5027\n the CPU and the simulation completion signal back to CPU ),\n GPU programs and input/output data are exchanged between\n ( 2013.01 ) ; G06T 1/60 ( 2013.01 ) ; CPU and the expansion card . Moreover, since on every time\n ( Continued ) step of the simulation the results from the previous time step\n( 58 ) Field of Classification Search are used but not changed, the results are preferably trans\n CPC ... GO6F 9/5027 ; G06F 2209/509 ; G06T 1/20 ; ferred back to CPU in parallel with the computation .\n GO6T 1/60 ; G06N 99/005 ; GO6N 37063\n See application file for complete search history . 56 Claims , 5 Drawing Sheets\n Expansion Cards 40\n\n 420\n ? e.com\n\n 403 435\n xxtes\n 19x VI 9XY\n SKM 2\n 450\n Swarum\n shokolaty\n bars CPU\n\n\n 19:43 Shader GPU .\n\n 180\n Outdoor\n yoles exi\n Teney bank\n 440\n 482 Now external\n texmex Tom FRAM\n UM\n WOX + vary but\n\n\n Wait for SWRP Svima i wait for swap\n otrputloutpan\n xure points\n ? output\n texture packs\n otinescioutput\n extere gointate\n plexulante\n 478\n ******** * herbimity\n Dank AM leration harasana\n\n\n en?\n 490\n Waxa ste\n tra\n axexkoren\n 499\n\f Case 7:26-mc-00323-DC Document 1-4 Filed 08/18/26 Page 3 of 22\n\n\n US RE48,438 E\n Page 2\n\n Related U.S. Application Data 2014/0032461 Al 1/2014 Weng\n 2014/0089232 A1 3/2014 Buibas et al .\n( 60 ) Provisional application No. 60 /826,892 , filed on Sep. 2014/0052679 Al\n 2015/0127149 Al\n 11/2014 Sinyavskiy et al .\n 5/2015 Sinyavskiy et al .\n 25 , 2006 . 2015/0134232 Al 5/2015 Robinson\n 2015/0224648 A1 8/2015 Lee et al .\n( 51 ) Int . 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MIT Press , 1998 . * cited by examiner\n\f Case 7:26-mc-00323-DC Document 1-4 Filed 08/18/26 Page 7 of 22\n\n\nU.S. Patent Feb.i6, 2021 Sheet 1 of 5 US RE48,438 E\n\n\n\n\n 14? *\n\n\n\n\n 130\n ????????????\n\f Case 7:26-mc-00323-DC Document 1-4 Filed 08/18/26 Page 8 of 22\n\n\nU.S. Patent Feb. 16 , 2021 Sheet 2 of 5 US RE48,438 E\n\n\n\n\n I\n\n\n 220\n\n\n I\n\n\n\n\n RAM\n\f Case 7:26-mc-00323-DC Document 1-4 Filed 08/18/26 Page 9 of 22\n\n\nU.S. Patent Feb. 16 , 2021 Sheet 3 of 5 US RE48,438 E\n\n\n\n 13:25 326 330 FIG\n 3\n .\n 320\n\n\n ECXPANRSIDON CONTROLER INITIALIZATION\n 180\n EIXNTEPRUNATL TFEXRTUOREMS RTOEXATUMRE MBEAMNORKY POPULATION SBIHNADRIERS FRAMTO SMHEAMDOERRY BANK COMPUTATION )\n 4\n .\n (\n SEE\n FIG\n\n\n\n\n COMPUTATIONAL 3ST0RE3AM\n 309\n DATA\n 310\n PSDAHRASDTEAR GAENERADTOR\n 316\n BATA\n 314\n DATA\n 350\n\n 304\n IPANRPSUETR TEXTURE GENERATOR POPULATION COMPILER IPANRPSUETR TGENXETRAUTROER ODUATPUAT ACUMULATION INRAM\n 315\n\n 306 LAST T?ERATION YES\n 311 312\n\n 300\n UINTSERAECTIRON 3ST0RE2AM 307 GUINRTSAEPREFHAIRCE 305 SIMULATION INITIALIZATION PROGRES MONITOR RESULTS DISPLAY NO\n 390\n START GURSAPEHIRC INTERFACE INITIALIZATION INTERACTION USER\n 313\n END\n\n\n 308 317 318\n CPU120\n DOUATTPUAT 3ST0RE1AM\n O\n /\n I\n DISK\n\n\n INITIALIZATION DOUATPTUAT TODISK\n NO\n LAST I?TERATION YES\n\f Case 7:26-mc-00323-DC Document 1-4 Filed 08/18/26 Page 10 of 22\n\n\nU.S. Patent Feb. 16 , 2021 Sheet 4 of 5 US RE48,438 E\n\n\n Expansion Card 180\n\n\n\n Isoss foxxos ir\n\f Case 7:26-mc-00323-DC Document 1-4 Filed 08/18/26 Page 11 of 22\n\n\nU.S. Patent Feb. 16 , 2021 Sheet 5 of 5 US RE48,438 E\n\n\n\n\n Blsthepofdiwfc.amnicpxklotuniolndwahrstg 5\n .\n FIG\n\n\n\n\n 2\n\f Case 7:26-mc-00323-DC Document 1-4 Filed 08/18/26 Page 12 of 22\n\n\n US RE48,438 E\n 1 2\n GRAPHIC PROCESSOR BASED for input /output should be designed so that it provides the\n ACCELERATOR SYSTEM AND METHOD synchronization with computation .\n In the case of GPGPU , the computation itself is performed\n outside\nMatter enclosed in heavy brackets [ ] appears in the 5 \u201c peripheral of the CPU , so the complete system comprises three\noriginal patent but forms no part of this reissue specifica hardware, and\u201d components: user interactive hardware , disk\ntion ; matter printed in italics indicates the additions ing unit ( CPUcomputational\n ) establishes\n hardware. The central process\n communication and synchroni\nmade by reissue ; a claim printed with strikethrough zation between peripherals. Each of the peripherals is pref\nindicates that the claim was canceled, disclaimed, or held erably controlled by a dedicated thread that is executed in\ninvalid by a prior post- patent action or proceeding . 10 parallel with minimal interactions and dependencies on the\n other threads .\n RELATED APPLICATIONS A GPU on a conventional video card is usually controlled\n through OpenGL , DirectX , or similar graphic application\n The present application is a broadening reissue applica programming\ntion of U.S. Pat. No. 9,189,828, filed Jan. 3 , 2014, which 15 context of graphic interfaces (APIs ). Such APIs establish the\nclaims a priority benefit, under 35 U.S.C. $ 120 , as a con GPU are made . This operations, within which all calls to the\ntinuation of U.S. application Ser. No. 11 / 860,254 , now U.S. within the same threadcontext\n of\n only works when initialized\n execution that uses it . As a result,\nPat . No. 8,648,867 B2 , filed Sep. 24 , 2007 , entitled \u201c Graphic in a preferred embodiment, the context is initialized within\nProcessor Based Accelerator System and Method , \u201d which in\nturn claims the priority benefit, under 35 U.S.C. 8119 (e ) , of 20 aevercomputational thread. This creates complications , how\n , in the interaction between the user interface thread that\nU.S. Application No. 60/ 826,892 , filed Sep. 25 , 2006. Each\nof the above - identified applications is incorporated herein by changes parameters of simulations and the computational\nreference in its entirety. More than one reissue application thread that uses these parameters.\nhas been filed for the reissue of U.S. Pat. No. 9,189,828 , A solution as proposed here is an implementation of the\nincluding this application and a reissue continuation appli- 25 computational stream of execution in hardware, so that\ncation filed Dec. 29, 2020. thread and context initialization are replaced by hardware\n initialization . This hardware implementation includes an\n BACKGROUND expansion card comprising a printed circuit board having ( a )\n one or more graphics processing units , (b ) two or more\n Graphics Processing Units (GPUs) are found in video 30 associated memory banks that are logically or physically\nadapters ( graphic cards) of most personal computers ( PCs ) , partitioned, (c ) a specialized controller, and (d) a local bus\nvideo game consoles , workstations, etc. and are considered providing signal coupling compatible with the PCI industry\nhighly parallel processors dedicated to fast computation of standards ( this includes but is not limited to PCI -Express ,\ngraphical content. With the advances of the computer and PCI - X , USB 2.0 , or functionally similar technologies ). The\nconsole gaming industries, the need for efficient manipula- 35 controller handles most of the primitive operations needed to\ntion and display of 3D graphics has accelerated the devel- set up and control GPU computation . As a result, the CPU\nopment of GPUs . is freed from this function and is dedicated to other tasks . In\n In addition , manufacturers of GPUs have included general this case a few controls ( simulation start and stop signals\npurpose programmability into the GPU architecture leading from the CPU and the simulation completion signal back to\nto the increased popularity of using GPUs for highly paral- 40 CPU) , GPU programs and input/output data are the infor\nlelizable and computationally expensive algorithms outside mation exchanged between CPU and the expansion card .\nof the computer graphics domain . When implemented on Moreover, since on every time step of the simulation the\nconventional video card architectures, these general purpose results from the previous time step are used but not changed ,\nGPU ( GPGPU) applications are not able to achieve optimal the results are preferably transferred back to CPU in parallel\nperformance , however. There is overhead for graphics- 45 with the computation .\nrelated features and algorithms that are not necessary for In general, according to one aspect , the invention features\nthese non-video applications. a computer system . This system comprises a central pro\n cessing unit , main memory accessed by the central process\n SUMMARY ing unit , and a video system for driving a video monitor in\n 50 response to the central processing unit as is common . The\n Numerical simulations, e.g. , finite element analysis , of computer system further comprises an accelerator that uses\nlarge systems of similar elements ( e.g. neural networks, input data from and provides output data to the central\ngenetic algorithms, particle systems, mechanical systems) processing unit. This accelerator comprises at least one\nare one example of an application that can benefit from graphics processing unit, accelerator memory for the graphic\nGPGPU computation . During numerical simulations, disk 55 processing unit, and an accelerator controller that moves the\nand user input /output can be performed independently of input data into the at least one graphics processing unit and\ncomputation because these two processes require interac- the accelerator memory to generate the output data .\ntions with peripheral hardware ( disk , screen , keyboard , In the preferred , the central processing unit transfers the\nmouse , etc ) and put relatively low load on the central input data for a simulation to the accelerator, after which the\nprocessing unit/system (CPU) . Complete independence is 60 accelerator executes simulation computations to generate\nnot desirable , however; user input might affect how the the output data, which is transferred to the central processing\ncomputation is performed and even interrupt it if necessary. unit. Preferably, the accelerator controller dictates an order\nFurthermore, the user output and the disk output are depen- of execution of instructions to the at least one graphics\ndent on the results of the computation. A reasonable solution processing unit . The use of the separate controller enables\nwould be to separate input/output into threads, so that it is 65 data transfer during execution such that the accelerator\ninteracting with hardware occurs in parallel with the com- controller transfers output data from the accelerator memory\nputation . In this case whatever CPU processing is required to main memory of the central processing unit .\n\f Case 7:26-mc-00323-DC Document 1-4 Filed 08/18/26 Page 13 of 22\n\n\n US RE48,438 E\n 3 4\n In the preferred embodiment, the accelerator controller not limited to , workstations, server computers, supercom\ncomprises an interface controller that enables the accelerator puters, notebook computers, hand -held electronic devices\nto communicate over a bus of the computer system with the such as cell phones, mp3 players, or personal digital assis\ncentral processing unit. tants ( PDAs ) , multiprocessor systems, programmable con\n In general according to another aspect , the invention also 5 sumer electronics, networks of any of the above -mentioned\nfeatures an accelerator system for a computer system , which computing devices, and distributed computing environments\ncomprises at least one graphics processing unit , accelerator that including any of the above -mentioned computing\nmemory for the graphic processing unit and an accelerator devices.\ncontroller for moving data between the at least one graphics 10 In one implementation the GPU accelerator is imple\nprocessing unit and the accelerator memory .\n In general according to another aspect , the invention also mented as an expansion card 180 includes connections with\nfeatures a method for performing numerical simulations in a are installed along110with\n the motherboard , on which the one or more CPU's 120\n main , or system memory 130 and\ncomputer system . This method comprises a central process mass / non volatile data storage 140 , such as hard drive or\ning unit loading input data into an accelerator system from redundant array of independent drives (RAID ) array, for the\nmain memory of the central processing unit and an accel- 15 computer system 100. In the current example\nerator controller transferring the input data to a graphics card 180 communicates to the motherboard ,110 the expansion\nprocessing unit with instructions to be performed on the bus 190. This local bus 190 could be PCI , PCIviaExpress a local\ninput data . The accelerator controller then transfers output PCI - X , or any other functionally similar technology (de,\ndata generated by the graphic processing unit to the central 20 pending upon the availability on the motherboard 110 ) . An\nprocessing unit as output data .\n The above and other features of the invention including external version GPU accelerator is also a possible imple\nvarious novel details of construction and combinations of mentation . In this example, the external GPU accelerator is\nparts, and other advantages, will now be more particularly connected to the motherboard 110 through USB - 2.0 , IEEE\ndescribed with reference to the accompanying drawings and 1394 (Firewire ), or similar external /peripheral device inter\npointed out in the claims . It will be understood that the 25 face .\nparticular method and device embodying the invention are The CPU 120 and the system memory 130 on the moth\nshown by way of illustration and not as a limitation of the erboard 110 and the mass data storage system 140 are\ninvention . The principles and features of this invention may preferably independent of the expansion card 180 and only\nbe employed in various and numerous embodiments without communicate with each other and the expansion card 180\ndeparting from the scope of the invention . 30 through the system bus 200 located in the motherboard 110 .\n A system bus 200 in current generations of computers have\n BRIEF DESCRIPTION OF THE DRAWINGS bandwidths from 3.2 GB / s (Pentium 4 with AGTL + , Athlon\n XP with EVO ) to around 15 GB / s (Xeon Woodcrest with\n In the accompanying drawings, reference characters refer AGTL + , Athlon 64 /Opteron with Hypertransport), while the\nto the same parts throughout the different views. The draw- 35 local bus has maximal peak data transfer rates of 4 GB / s\nings are not necessarily to scale ; emphasis has instead been (PCI Express 16 ) or 2 GB / s ( PCI -X 2.0 ) . Thus the local bus\nplaced upon illustrating the principles of the invention . Of 190 becomes a bottleneck in the information exchange\nthe drawings: between the system bus 200 and the expansion card 180. The\n FIG . 1 is a schematic diagram illustrating a computer design of the expansion card and methods proposed herein\nsystem including the GPU accelerator according to an 40 minimizes the data transfer through the local bus 190 to\nembodiment of the present invention ; reduce the effect of this bottleneck .\n FIG . 2 is block diagram illustrating the architecture for the The system memory 130 is referred to as the main\nGPU accelerator according to an embodiment of the present random - access memory (RAM ) in the description herein .\ninvention; However, this is not intended to limit the system memory\n FIG . 3 is a block / flow diagram illustrating an exemplary 45 130 to only RAM technology. Other possible computer\nimplementation of the top level control of the GPU accel- storage media include , but are not limited to ROM ,\nerator system ; EEPROM , flash memory, or any other memory technology.\n FIG . 4 is a flow diagram illustrating an exemplary imple- In the illustrated example, the GPU accelerator system is\nmentation of the bottom level control of the GPU accelerator implemented on an expansion card 180 on which the one or\nsystem that is used to execute the target computation ; and 50 more GPU's 240 are mounted . It should be noted that the\n FIG . 5 is an example population of nine computational GPU accelerator system GPU 240 is separate from and\nelements arranged in a 3x3 square and a potential packing independent of any GPU on the standard video card 150 or\nscheme for texture pixels , according to an implementation of other video driving hardware such as integrated graphics\nthe present invention . systems. Thus the computations performed on the expansion\n 55 card 180 do not interfere with graphics display ( including\n DETAILED DESCRIPTION but not limited to manipulation and rendering of images ) .\n Various brand of GPU are relevant. Under current tech\n FIG . 1 shows a computer system 100 that has been nology, GPU's based on the GeForce series from NVIDIA\nconstructed according to the principles of the present inven- Corporation or the Catalyst series from ATI/ Advanced\ntion . 60 Micro Devices, Inc.\n In more detail, the computer system 100 in one example The output to a video monitor 170 is preferably through\nis a standard personal computer ( PC ) . However, this only the video card 150 and not the GPU accelerator system 180 .\nserves as an example environment as computing environ- The video card 150 is dedicated to the transfer of graphical\nment 100 does not necessarily depend on or require any information and connects to the motherboard 110 through a\ncombination of the components that are illustrated and 65 local bus 160 that is sometimes physically separate from the\ndescribed herein . In fact, there are many other suitable local bus 190 that connects the expansion card 180 to the\ncomputing environments for this invention, including, but motherboard 110 .\n\f Case 7:26-mc-00323-DC Document 1-4 Filed 08/18/26 Page 14 of 22\n\n\n US RE48,438 E\n 5 6\n FIG . 2 is a block diagram illustrating the general archi- not require hardware implementation. Also the partitioning\ntecture of the GPU accelerator system and specifically the scheme is also altered based on new designs or needs of the\nexpansion card 180 in which at least one GPU 240 and algorithms being employed. The reason for this partitioning\nassociated memories 210 and 250 are mounted . Electrical is further explained in the Data Organization section, below .\n( signal) and mechanical coupling with a local bus 190 5 A local bus interface 230 on the controller 220 serves as\nprovides signal coupling compatible with the PCI industry a driver that allows the controller 220 to communicate\nstandards ( this includes but is not limited to PCI , PCI -X , PCI through the local bus 190 with the system bus 200 and thus\nExpress, or functionally similar technology ). the CPU 120 and RAM 130. This local bus interface 230 is\n The GPU accelerator further preferably comprises one not intended to be limited to PCI related technology. Other\nspecifically designed accelerator controller 220. Depending 10 drivers can be used to interface with comparable technology\nupon the implementation , the accelerator controller 220 is as a local bus 190 .\nfield programmable gate array ( FPGA ) logic , or custom built Data Organization\napplication - specific (ASIC ) chip mounted in the expansion Each computational element discussed above has output\ncard 180 , and in mechanical and signal coupling with the variables that affect the rest of the system . For example in\nGPU 240 and the associated memories 210 and 250. During 15 the case of a neural network it is the output of a neuron . A\ninitial design , a controller can be partially or even fully computational element also usually has several internal\nimplemented in software, in one example. variables that are used to compute output variables , but are\n The controller 220 commands the storage and retrieval of not exposed to the rest of the system , not even to other\narrays of data ( on a conventional video card the arrays of elements of the same population, typically. Each of these\ndata are represented as textures, hence the term ' texture' in 20 variables is represented as a texture . The important differ\nthis document refers to a data array unless specified other- ence between output variables and internal variables is their\nwise and each element of the texture is a pixel of color access .\ninformation ), execution of GPU programs (on a conven- Output variables are usually accessed by any element in\ntional video card these programs are called shaders , hence the system during every time step . The value of the output\nthe term \u201c shader ' in this document refers to a GPU program 25 variable that is accessed by other elements of the system\nunless specified otherwise ), and data transfer between the corresponds to the value computed on the previous, not the\nsystem bus 200 and the expansion card 180 through the local current, time step . This is realized by dedicating two textures\nbus 190 which allows communication between the main to output variables \u2014 one holds the value computed during\nCPU 120 , RAM 130 , and disk 140 . the previous time step and is accessible to all computational\n Two memory banks 210 and 250 are mounted on the 30 elements during the current time step , another is not acces\nexpansion card 180. In some example, these memory banks sible to other elements and is used to accumulate new values\nseparated in the hardware, as shown, or alternatively imple- for the variable computed during the current time step .\nmented as a single , logically partitioned memory compo- In -between time steps these tw te res are switched , so\nnent. that newly accumulated values serve as accessible input\n The reason to separate the memory into two partitions 210 35 during the next time step , while the old input is replaced with\n250 stems from the nature of the computations to which the new values of the variable. This switch is implemented by\nGPU accelerator system is applied . The elements of com- swapping the address pointers to respective textures as\nputation ( computational elements ) are characterized by a described in the System and Framework section .\nsingle output variable . Such computational elements often Internal variables are computed and used within the same\ninclude one or more equations. Computational elements are 40 computational element. There is no chance of a race con\nsame or similar within a large population and are computed dition in which the value is used before it is computed or\nin parallel. An example of such a population is a layer of after it has already changed on the next time step because\nneurons in an artificial neural network (ANN ), where all within an element the processing is sequential. Therefore, it\nneurons are described by the same equation. As a result, is possible to render the new value of internal variable into\nsome data and most of the algorithms are common to all 45 the same texture where the old was read from in the texture\ncomputational elements within population , while most of the memory bank . Rendering to more than one texture from a\ndata and some algorithms are specific for each equation . single shader is not implemented in current GPU architec\nThus, one memory , the shader memory bank 210 , is used to tures, so computational elements that track internal variables\nstore the shaders needed for the execution of the required would have to have one shader per variable . These shaders\ncomputations and the parameters that are common for all 50 can be executed in order with internal variables computed\ncomputational elements and is coupled with the controller first, followed by output variables .\n220 only. The second memory, the texture memory bank Further savings of texture memory is achieved through\n250 , is used to store all the necessary data that are specific using multiple color components per pixel ( texture element)\nfor every computational element (including, but not limited to hold data . Textures can have up to four color components\nto , input data , output data , intermediate results, and param- 55 that are all processed in parallel on a GPU . Thus, to\neters ) and is coupled with both the controller 220 and the maximize the use of GPU architecture it is desirable to pack\nGPU 240 . the data in such a way that all four components are used by\n The texture memory bank 250 is preferably further par- the algorithm . Even though each computational element can\ntitioned into four sections . The first partition 250 a is have multiple variables, designating one texture pixel per\ndesigned to hold the external input data patterns. The second 60 element is ineffective because internal variables require one\npartition 250b is designed to hold the data textures repre- texture and output variables require two textures . Further\nsenting internal variables. The third partition 250c is more , different element types have different numbers of\ndesigned to hold the data textures used as input at a variables and unless this number is precisely a multiple of\nparticular computation step on the GPU 240. The fourth four, texture memory can be wasted .\npartition 250d holds the data textures used to accommodate 65 A more reasonable packing scheme would be to pack four\nthe output of a particular computational step on the GPU computational elements into a pixel and have separate\n240. This partitioning scheme can be done logically , does textures for every variable associated with each computa\n\f Case 7:26-mc-00323-DC Document 1-4 Filed 08/18/26 Page 15 of 22\n\n\n US RE48,438 E\n 7 8\ntional element. In this case the packing scheme is identical The crucial feature of the interaction between the User\nfor all textures, and therefore can be accessed using the same Interaction Stream 302 and the Computational Stream 303 is\nalgorithm . Several ways to approach this packing scheme the shift of priorities. Outside of the simulation , the system\nare outlined here. An example population of nine computa- 100 is driven by the user input, thus the User Interaction\ntional elements arranged in a 3x3 square (FIG . 5a ) can be 5 Stream 302 has the priority and controls the data exchange\npacked by element (FIG . 5b ) , by row (FIG . 5c ) , or by square 304 between streams. After the user starts the simulation , the\n( FIG . 5d) . Computational Stream 303 takes the priority and controls\n Packing by element ( FIG . 5b ) means that elements 1,2,3,4 the data exchange between streams until the simulation is\n finished or interrupted 350 .\ngo into first pixel ; 5,6,7,8 go into second pixel ; 9 goes into\nthird pixel . This is the most compact scheme , but not 10 an The user starts 300 the framework through the means of\nconvenient because the geometrical relationship is not pre theoperating system and interacts with the software through\nserved during packing and its extraction depends on the size 306user interaction section 305 of the graphic user interface\n executed on the CPU 120. The start 300 of the imple\nof the population .\n Packing by row ( column; FIG . 5c ) means that elements 15 initializationbegins\n mentation with a user action that causes a GUI\n 307 , Disk input /output initialization 308 on the\n1,2,3 go into pixel ( 1,1 ) ; 3,4,5 go into pixel (2,1 ) , 7,8,9 go CPU 120 , and controller initialization 320 of the GPU\ninto pixel ( 3,1 ) . With this scheme the element\u2019s y coordinate accelerator on the expansion card 180. GUI initialization\nin the population is the pixel's y coordinate, while the includes opening of the main application window and setting\nelement\u2019s x coordinate in the population is the pixel's x the interface tools that allow the user to control the frame\ncoordinate times four plus the index of color component. 20 work . Disk I/O initialization can be performed at the start of\nFive by five populations in this case will use 2x5 texture, or the framework , or at the start of each individual simulation .\n10 pixels . Five of these pixels will only use one out of four The user interaction 305 controls the setting and editing of\ncomponents , so it wastes 37.5 % of this texture. 25x1 popu- the computational elements, parameters, and sources of\nlation will use 6x1 texture ( six pixels ) and will waste 12.5 % external inputs. It specifies which equations should have\nof it . 25 their output saved to disk and / or displayed on the screen . It\n Packing by square ( FIG . 5d ) means that elements 1,2,4,5 allows the user to start and stop the simulation . And it\ngo into pixel ( 1,1 ) ; 3,6 go into pixel ( 1,2 ) ; 7,8 go into pixel performs standard interface functions such as file loading\n( 2,1 ) , and 9 goes into pixel (2,2 ) . Both the row and the and saving , interactive help , general preferences and others.\ncolumn of the element are determined from the row (col- The user interaction 305 directs the CPU 120 to acquire\numn ) of the pixel times two plus the second ( first) bit of the 30 the new external input textures needed (this includes but is\ncolor component index . Five by five populations in this case not limited to loading from disk 140 or receiving them in\nwill use 3x3 texture , or 9 pixels . Four of these pixels will real time from a recording device ), parses them if necessary\nonly use out of four components, and one will only use 309 , and initializes their transfer the expansion card 180 ,\none component, so it wastes 34.4 % of this texture . This is where they are stored 325 in the texture memory bank 250\nmore advantageous than packing by row , since the texture is 35 by the controller 220. The user interaction 305 also directs\nsmaller and the waste is also lower. 25x1 population on the the CPU 120 to parse populations of elements that will be\nother hand will use 13x1 texture ( thirteen pixels ) and waste used in the simulation, convert them to GPU programs\n> 50 % of it , which is much worse than packing by row . ( shaders ) , compile them 310 , and initializes their transfer to\n In order to eliminate waste altogether the population the expansion card 180 , where they are stored 326 in the\nshould have even dimensions in the square packing, and it 40 shader memory bank 210 by the controller 220. This opera\nshould have a number of columns divisible by four in row tion is accompanied by the upload 309 of the initial data into\npacking. Theoretically, the chances are approximately the input partition of the texture memory bank 250 , and\nequivalent for both of these cases to occur, so the particular stores the shader order of execution in the controller 220 .\ntask and data sizes should determine which packing scheme The user can perform operations 309 and 310 as many times\nis preferable in each individual case . 45 as necessary prior to starting the simulation or between\n The System and Framework simulations .\n FIG . 3 shows an exemplary implementation of the top The editing of the system between simulations is difficult\nlevel system and method that is used to control the compu- to accomplish without the hardware implementation of the\ntation . It is a representation of one of several ways in which computational thread suggested herein . The system of equa\na system and method for processing numerical techniques 50 tions ( computational elements) is represented by textures\ncan be implemented in the invention described herein and so that track variables plus shaders that define processing\nthe implementation is not intended to be limited to the algorithms. As mentioned above , textures, shaders and other\nfollowing description and accompanying figure . graphics related constructs can only be initialized within the\n The method presented herein includes two execution rendering context, which is thread specific . Therefore tex\nstreams that run on the CPU 120 - User Interaction Stream 55 tures and shaders can only be initialized in the computa\n302 and Data Output Stream 301. These two streams pref- tional thread .\nerably do not interact directly, but depend on the same data Network editing is a user - interactive process, which\naccumulated during simulations . They can be implemented according to the scheme suggested above happens in the\nas separate threads with shared memory access and executed User Interaction Stream 302. The simulation software thus\non different CPUs in the case of multi -CPU computing 60 has to take the new parameters from the User Interaction\nenvironment. The third execution stream \u2014 Computational Stream 302 , communicate them to the Computational\nStream 303 runs on the GPU accelerator of the expansion Stream 303 and regenerate the necessary shaders and tex\ncard 180 and interacts with the User Interaction Stream 302 tures . This is hard to accomplish without a hardware imple\nthrough initialization routines and data exchange in between mentation of the Computational Stream 303. The Compu\nsimulations. The Computational Stream 303 interacts with 65 tational Stream 303 is forked from the User Interaction\nthe User Interaction Stream and the Data Output Stream Stream and it can access the memory of the parent thread,\nthrough synchronization procedures during simulations. but the reverse communication is harder to achieve. The\n\f Case 7:26-mc-00323-DC Document 1-4 Filed 08/18/26 Page 16 of 22\n\n\n US RE48,438 E\n 9 10\ncontroller 220 allows operations 309 and 310 to be per- timestep ( ) , TSimulator::outfileInterval ( ), and TSimulator::\nformed as many times as necessary by providing the nec- outmode ( ) , the application can set the time step of the\nessary communication to the User Interaction Stream 302 . simulation , the time step of disk output, and the mode of the\n After execution of the input parser texture generation 309 5 disk output. The external input pattern should be packed into\nand population parser shader generator and compiler 310 are a TPattern object and bound to the simulation object through\nperformed at least once , the user has the option to initialize TSimulator:: resetInputs( ) . method . TSimulator::\nthe simulation 311. During this initialization the main con simLength ( ) sets the length of the simulation .\ntrol of the framework is transferred to the GPU accelerator The second step is to create at least one population of\nsystem's accelerator controller 220 and computation 330 is equations ( Tpopulation object ). Population holds one equa\nstarted\ninterrupt(see\n the FIG . 4; 420, change\n simulation ). The the\n userinput\n retains\n , or the abilitythe\n to change to 10 tion object TEquation. This object contains only a formula\ndisplay properties of the framework , but these interactions the and does not hold element- specific data , so all elements of\nare queued to be performed at times determined by the population can share single TEquation .\ncontroller - driven data exchange 314 and 316 to avoid the before execution The TEquation object is converted to a GPU program\ncorruption of the data . 15 . GPU programs have to be executed within\n The progress monitor 312 is not necessary for perfor creates this context , within\n a graphical context which is stream specific . TSimulator\nmance , but adds convenience. It displays the percentage of fore all programs and dataa arrays Computational Stream , there\ncompleted time steps of the simulation and allows the user computation have to be initialized that within\n are necessary for\n Computational\nto plan the schedule using the estimates of the simulation Stream . Constructor of TPopulation is called from User\nwall clock times . Controller - driven data exchange 314 20 Interaction\nupdates the display of the results 313. Online screen output tialized in this constructor .\n Stream , so no GPU - related objects can be ini\nfor the user selected population allows the user to monitor\nthe activity and evaluate the qualitative behavior of the to TPopulation overcome\n :: fillElements ( ) is a virtual method designed\n this difficulty. It is called from within the\nnetwork . Simulations with unsatisfactory behavior can be Computational Stream after TSimulator ::user\n networkCreate ( ) is\nterminated early to change parameters and restart . Control- 25 called in the User Interaction Stream\nler - driven data exchange 314 also drives the output of the TPopulation :: fillElements ( ) to create TEquation and other\n . A has to override\nresults to disk 317. Data output to disk for convenience can computation related objects both element independent and\nbe done on an element per file basis . A suggested file format element-specific. Element independent objects include sub\nincludes a leftmost column that displays a simulated time for\neach of the simulation steps and subsequent columns that 30 components of TEquation and\n handle interdependencies objectsvariables\n between that describe how to\n implemented\ndisplay variable values during this time step in all elements through derivatives of TGate class .\nwith identical equations (e.g. all neurons in a layer of a Element - specific data is held in TElement objects. These\nneural network ).\n Controller -driven data exchange or input parser texture objects. Therereferences\n objects hold to TEquation and a set of TGate\n is one TElement per population, but the size\ngenerator 316 allows the user to change input that is gen- 35 of data arrays within this object corresponds to population\nerated on the fly during the simulation . This allows the size . All TElement objects have to be added to the TSimu\nframework monitoring of the input that is coming from a lator list of elements by calling TSimulator:: addUnit ( )\nrecording device ( video camera, microphone, cell recording method from TPopulation :: fillElements ( ).\nelectrode, etc ) in real time . Similar to the initial input parser Finally, TPopulation :: fillElements ( ) should contain a set\n309\ndata, itarray\n preprocesses\n suitable the\n for input\n textureintogeneration\n a universaland\n format of the 40 of TElement:: add* Dependency ( ) calls for each element.\n generates\ntextures . Unlike the initial parser 309 , here the textures are every Each of these calls sets a corresponding dependency for\ntransferred to hardware not whenever ready but upon the pendentTGatepart object. Here TGate object holds element inde\n of dependency and TElement::\nrequest of the controller 220 . add * Dependency sets element-specific details.\n The controller 220 also drives the conditional testing 315 45 System provided TPopulation handles the output of com\nand 318 informs the CPU - bound streams whether the simu putational elements, both when they need to exchange the\nlation is finished . If so , the control returns to the User data and when they need to output it to disk . User imple\nInteraction Stream . The user then can change parameters or\ninputs ( 309 and 310 ) , restart the simulation (311 ) or quit the mentation of TPopulation derivative can add screen output.\n Listing 1 is an example code of the user program that uses\nframework (390 ) . 50\n a recurrent competitive field (RCF ) equation:\n SANNDRA ( Synchronous Artificial Neuronal Network\nDistributed Runtime Algorithm ; http://www.kinness.net/\nDocs /SANNDRA /html) was developed to accelerate and Listing 1\noptimize processing of numerical integration of large non\nhomogenous systems of differential equations. This library 55 uint16_t static floatw m_compet\n = 3 , h = 3 ; = 0.5 ;\nis fully reworked in its version 2.x.x to support multiple static float m_persist = 1.0 ;\ncomputational backends including those based on multicore class TCablePopRCF : public TPopulation\nCPUs , GPUs and other processing systems . GPU based {TEq_RCF * m_equation ;\nbackend for SANNDRA -2.x.x can serve as an example TGate * m_gatel;\npractical software implementation of the method and archi- 60 TGate * m_gate2;\ntecture described above and pictorially represented in FIG . void createGatingStructure( )\n3. {\n To use SANNDRA, the application should create a m_gate2 m_gatel = new TGate ( 0 );\nTSimulator object either directly or through inheritance . } ; = new TGate ( 1 ) ;\nThis object will handle global simulation properties and 65 void createUnitStructure ( TBasicUnit* u )\ncontrol the User Interaction Stream , Data Output Stream , {\nand Computational Stream . Through TSimulator ::\n\f Case 7:26-mc-00323-DC Document 1-4 Filed 08/18/26 Page 17 of 22\n\n\n US RE48,438 E\n 11 12\n -continued expensive operation , computationally, but since the textures\n are referred to by texture IDs ( pointers ), swapping these\n Listing 1 pointers for input and output textures after each time step\nu-> addO20PInputDependency (m_gatel, O. , 0. , 0.004 , 0. , 0 , 0 ) ; achieves the same result at a much lesser cost .\n 5\nu- > addFullDependency (m_gate2, population ( ) ); In the hardware solution suggested herein , ID swapping is\n} equivalent to swapping the base memory address for two\npublic : TCablePopRCF ( ) : TPopulation ( \" compCPU RCF \u201d , w , h , true) { } ;\n-TCablePopRCFO ) { if (m_equation ) delete m_equation ; partitions of the texture memory bank 250. They are\n if (m_gatel) delete m_gatel;\n if (m_gate2) delete m_gate2 ; } ;\n swapped 485 during synchronization ( 485 , 430 , and 455 ) so\nbool fillElements( TSimulator * sim ) ; 10 that data transfer 445 and the computation 435-487 proceeds\n}; immediately and in parallel with data transfer as shown in\nbool TCablePopRCF :: fillElements ( TSimulatior* sim) FIG . 4. A hardware solution allows this parallelism through\n{ access of the controller 220 to the onboard texture memory\nm_equation = new TEQ_RCF (this, m_compet, m_persist );\ncreateGatingStructure ( ) ; bank 250 .\nfor( size_t i = 0 ; i < xSize ( ) ; ++ i ) 15\n The main computation and data exchange are executed by\n for(size_t j = 0 ; j < ySize ( ) ; ++ i)\n{ the controller 220. It runs three parallel substreams of\nTElement * u = new TCPUElement(this , m_equation, i , j ) ; execution : Computational Substream 403 , Data Output Sub\nsim-> addUnit( u ); stream 402 , and Data Input Substream 404. These streams\ncreateUnitStructure ( u );\n} 20 are synchronized with each other during the swap of pointers\nReturn true ; 485 to the input and output texture memory partitions of the\n} texture memory bank 250 and the check for the last iteration\nint\nmain ( ) 487. Algorithmically, these two operations are a single\n{ atomic operation, but the block diagram shows them as two\n// Input pattern generation ( 309 in FIG.3 ) 25 separate blocks for clarity.\nuint32_t * pat = new uint32_t [ w * h ];\nTRandom < float > randGen (0 ) ; The Computational Substream 403 performs a computa\nfor (uint32_t I = 0 ; I < w * h ; ++ i )\npat [i] = randGen.random ( ) ; tional cycle including a sequential execution of all shaders\nTpattern * p = new Tpattern (pat, w, h ) ; that were stored in the shader memory bank 210 using the\n// Setting up the simulation\n 30\n appropriate input and output textures. To begin the simula\nTSimulator * cableSim = new TSimulator ( \"data \" ) ; // ( 308 and 320 in tion the controller 220 initializes three execution substreams\nFIG. 3)\ncableSim- >timestep ( 0.05 ) ; // (320 in FIG . 3 ) 403 , 402 , and 404. On every simulation step , the Compu\ncableSim-> resetInputs (p ); // (325 in FIG . 3 ) tational Substream 403 determines which textures the GPU\ncableSim- > outfileInterval(0.1 ); // (308 in FIG . 3 ) 240 will need to perform the computations and initiates the\ncableSim- > outmode (SANNDRA ::timefunc ); // ( 308 in FIG . 3 )\ncableSim- > simLength (60.0 ); // (320 in FIG . 3 ) 35 upload 435 of them onto the GPU 240. The GPU 240 can\n// Preparing the population communicate directly with the texture memory bank 250 to\nTPopulation * cablePop new TCablePopRCFO ); // (310 in FIG . 3 ) upload the appropriate texture to perform the computations .\ncableSim- > networkCreate ( ); // (326 in FIG . 3 ) The controller 220 also pulls the first shader (known by the\nuint16_t user = 1 ;\nwhile (user) stored order ) from the shader memory bank 210 and uploads\n{ 40 450 it onto the GPU 240 .\nif (! cableSim-> simulationStart ( true, 1 ) ) // ( 311 in FIG . 3 )\nexit ( 1 ) ; The GPU 240 executes the following operations in this\nstd ::cout << \" Repeat ? \\ n \" ; // (305 in FIG . 3 )\nstd :: cin >> user; // ( 305 in FIG . 3 )\n order : performs the computation ( execution of the shader )\nif (user 1 ) 470 ; tells the controller 220 that it is done with the compu\ncableSim- > networkReset ( ); // ( 305 in FIG . 3 ) tations for the current shader; and after all shaders for this\n 45 particular equation are executed sends 480 the output tex\n{\nIf (cableSim ) tures to the output portion of the texture memory bank 250 .\nDelete cableSim ; // Also deletes cablePop and its internals This cycle continues through all of the equations based on\nexit (0 ) ;\n}; the branching step 482 .\n 50 An example shader that performs fourth order Runge\n FIG . 4 is a detailed flow diagram illustrating a part of an Kutta numerical integration is shown in Listing 2 using\nexemplary implementation of the bottom level system and GLSL notation ;\nmethod performed during the computation on the GPU\naccelerator of the expansion card 180 and is a more detailed Listing 2\nview of the computational box 330 in FIG . 3. FIG . 4 is a 55\nrepresentation of one of several ways in which a system and uniform sampler2DRect Variable ;\nmethod for processing numerical techniques can be imple uniform float integration_step ;\n float halfstep = integration_step * 0.5 ;\nmented .\n With systems of equations that have complex interdepen float fl_6step = integration_step / 6.0 ;\n vec4 output = texture2DRect (Variable, gl_TexCoord [0 ] .st );\ndencies it is likely that the variable in some equation from 60 // define equation here\na previous time step has to be used by some other equation vec4 rungekutta4 ( vec4 x )\nafter the new values of this variable are already computed {\n const vec4 kl = equation ( x );\nfor new time step . To avoid data confusion , the new values const vec4 k2 equation ( x + halfstep * kl ) ;\nof variables should be rendered in a separate texture. After const vec4 k3 equation ( x + halfstep * k2 );\nthe time step is completed for all equations, these new values 65 const vec4 k4 = equation ( x + integration step * k3 ) ;\nshould be copied over old values so that they are used as return fl_6step * (kl + 2.0 * (k2 + k3 ) + k4 );\ninput during the next time step . Copying textures is an\n\f Case 7:26-mc-00323-DC Document 1-4 Filed 08/18/26 Page 18 of 22\n\n\n US RE48,438 E\n 13 14\n -continued CONCLUSION\n Listing 2 This GPU accelerator system offers the following poten\n }\n tial advantages:\n Void main (void ) 5 1. Limited computations on the CPU 120. The CPU 120\n { is only used for user input, sending information to the\n output + = rungekutta4 (output );\n gl_FragColor = output;\n controller 220 , receiving output after each computational\n } cycle ( or less frequently as defined by the user ), writing this\n output to disk 140 , and displaying this output on the monitor\n 10 170. This frees the CPU 120 to execute other applications\n The shader in Listing 2 can be executed on conventional and allows the expansion card to run at its full capacity\nvideo card . Using the controller 220 this code can be further without being slowed down by extensive interactions with\noptimized , however. Since the integration step does not the CPU 120 .\nchange during the simulation , the step itself as well as the 2. Minimizing data transfer between the expansion card\nhalfstep and % of the step can be computed once per 15 180 and the system bus 200. All of the information needed\nsimulation , and updated in all shaders by a shader update to perform the simulations will be stored on the expansion\nprocedures 310 , 326 discussed above . card 180 and all simulations will take place on it . Further\n After all of the equations in the computational cycle are more , whatever data transfer remains necessary will take\ncomputed the main execution substream 403 on the control place in parallel with the computation , thus reducing the\nler 220 can switch 485 the reference pointers of the input and 20 impact\n 3. New of this\n waytransfer on the\n to execute GPUperformance\n programs (. shaders ). Previ\noutput portions of the texture memory bank 250 . ously, the CPU 120 had full control over the order of\n The two other substreams of execution on the controller shader's execution and was required to produce specific\n220 are waiting ( blocks 430 and 455 , respectively) for this commands on every cycle to tell the GPU 240 which shader\nswitch to begin their execution . The Data Input Substream 25 to use . With the invention disclosed herein , shaders will\n404 is controlling 440 the input of additional data from the initially be stored on the shader memory bank 210 on the\nCPU 120. This is necessary in cases where the simulation is expansion card 180 and will be sent to the GPU 240 for\nmonitoring the changing input, for example input from a execution by the general purpose controller 220 located on\nvideo camera or other recording device in the real time . This the expansion card .\nsubstream uploads new external input from the CPU 120 to 30 4. Multiple parallelisms . The GPU 240 is inherently\nthe texture memory bank 250 so it can be used by the main parallel and is well suited to perform parallel computations.\ncomputational substream 403 on the next computational step In parallel with the GPU 240 performing the next calcula\nand waits for the next iteration 475. The Data Output tion , the controller 220 is uploading the data from the\nSubstream 445 controls the output of simulation results to previous calculation into main memory 130. Furthermore,\nthe CPU 120 if requested by the user . This substream 35 the CPU 120 at the same time uses uploaded previous results\nuploads the results of the previous step to the main RAM to save them onto disk 140 and to display them on the screen\n130 so that the CPU 120 can save them on disk 140 or show through the system bus 200 .\nthem on the results display 313 and waits for the next 5. Reuse of existing and affordable technology. All hard\niteration 460 . ware used in the invention and mentioned here - in are based\n Since the Computational Substream 403 determines the 40 on currently available and reliable components. Further\ntiming of input 440 and output 445 data transfers, these data advance of these components will provide straightforward\ntransfers are driven by the controller 220. To further reduce improvements of the invention .\nthe data transfer overhead ( and disk 140 overhead also ) the While this invention has been particularly shown and\ncontroller 220 initiates transfer only after selected compu- described with references to preferred embodiments thereof,\ntational steps . For example, if the experimental data that is 45 it will be understood by those skilled in the art that various\nsimulated was recorded every 10 milliseconds (msec ) and changes in form and details may be made therein without\nthe simulation for better precision was computed every 1 departing from the scope of the invention encompassed by\nmsec , then only every tenth result has to be transferred to the appended claims .\nmatch the experimental frequency.\n This solution stores two copies of output data , one in the 50 What is claimed is :\nexpansion card texture memory bank 250 and another in the 1. \u00c0 computer system , comprising:\nsystem RAM 130. The copy in the system RAM 130 is a central processing unit to receive input data ;\naccessed twice : for disk I/O and screen visualization 313. An main memory , operably coupled to the central processing\nalternative solution would be to provide CPU 120 with a unit via a bus , to store the input data received by the\ndirect read access to the onboard texture memory bank 250 55 central processing unit;\nby mapping the memory of the hardware onto a global an accelerator, operably coupled to the central processing\nmemory space . The alternative solution will double the unit and the [first] main memory via the bus , to receive\ncommunication through the local bus 190. Since the goal at least a portion of the input data from the main\ndiscussed herein is reducing the information transfer through memory , the accelerator comprising:\nthe local bus 190 , the former solution is favored . 60 at least one graphics processing unit to perform a\n The main substream 403 determines if this is the last sequence of computations on the at least a portion of\niteration 487. If it is the last iteration , the controller 220 the input data so as to generate output data , the\nwaits for the all of the execution substreams to finish 490 sequence of computations representing an artificial\nand then returns the control to the CPU 120 , otherwise it neural network, intermediate computations in the\nbegins the next computational cycle . 65 sequence of computations representing respective\n This repeats through all of the computational cycles of the layers of the artificial neural network and yielding\nsimulation . intermediate results; and\n\f Case 7:26-mc-00323-DC Document 1-4 Filed 08/18/26 Page 19 of 22\n\n\n US RE48,438 E\n 15 16\n accelerator memory , operably coupled to the [ graphic ] system comprising a central processing unit (CPU) , a main\n at least one graphics processing unit, to store the memory operably coupled to the central processing unit via\n results of the [ plurality of sequential] sequence of a bus , an accelerator operably coupled to the CPU and the\n computations; and main memory via the bus , the accelerator comprising a\n a controller, operably coupled to the at least one graphics 5 graphics processing unit (GPU) and an accelerator memory,\n processing unit and the accelerator memory, to initial- the method comprising:\n ize textures and shaders in the accelerator memory for ( A ) performing, by the GPU , the sequence of computa\n performing the sequence of computations, to control tions on a first portion of [ the] input data so as to\n performance of the sequence of computations by the at generate a first portion of [the] output data , the first\n least one graphics processing unit, to transfer the at 10 portion of the output data representing an output of a\n least a portion of the input data into the accelerator neuron in a first layer of the artificial neural network,\n memory during performance of the intermediate com intermediate computations in the sequence of compu\n putations in the sequence of computations by the at tations yielding intermediate results , wherein perform\n least one graphics processing unit, and to transfer at ing the sequence of computations on the first portion of\n least a portion of the output data from the accelerator 15 the input data comprises ( i ) assigning an output vari\n memory to the main memory during performance of the\n intermediate computations in the sequence of compu able to a first texture and a second texture , the output\n tations by the at least one [ graphic ] graphics processing variable being included in a first computational ele\n unit . ment of a plurality of computational elements, the\n 2. The computer system of claim 1 , wherein the central 20 plurality of computational elements representing the\nprocessing unit is configured to receive the input data in sequence of computations and ( ii ) accumulating a first\nresponse to a user interaction . value for the output variable in the first texture during\n 3. The computer system of claim 1 , wherein : a first time step ;\n the central processing unit is configured to receive the ( B ) in parallel with performing the sequence of compu\n input data at a first rate ; and 25 tations by the GPU in ( A ), transferring a second portion\n the at least one graphics processing unit is configured to of the input data from the main memory to the accel\n perform the sequence of computations at a second rate erator via the bus ; [ and]\n different than the first rate . ( C ) in parallel with performing the sequence of compu\n 4. The computer system of claim 1 , wherein the main tations by the GPU in ( A ), transferring a second portion\nmemory is configured to store a copy of the output data 30 of the output data from the accelerator memory to the\nstored in the accelerator memory . main memory via the bus, the second portion of the\n 5. The computer system of claim 1 , wherein an output of output data representing an output of a neuron in a\nat least one computation in the sequence of computations second layer in the artificial neural network ; and\nrepresents an output of at least one neuron in an artificial ( D ) performing, by the GPU , the sequence of computa\nneural network . 35 tions on the second portion of the input data , wherein\n 6. The computer system of claim 1 , wherein accelerator performing the sequence of computationson the second\nmemory comprises: portion of the input data comprises ( i ) accumulating a\n a first memory bank to store parameters common to all of second value for the output variable in the second\n the computations in the sequence of computations; and texture during a second time step and ( ii) making the\n a second memory bank to store data specific to at least one 40 first value of the output variable in the first texture\n computation in the sequence of computations. accessible to other computational elements in the plu\n 7. The computer system of claim 1 , wherein the controller rality of computational elements during the second\nis configured to transfer the output data from the accelerator time step.\nmemory to the main memory without transferring any of the 13. The method of claim 12 , further comprising:\nintermediate results from the accelerator memory to the 45 storing the input data in the main memory in response to\nmain memory so as to reduce data transfer via the bus . a user interaction .\n 8. The computer system of claim 1 , wherein the controller 14. The method of claim 12 , further comprising:\nis configured to transfer at least a portion of the output data receiving the input data at a first rate; and\nfrom the accelerator memory to the main memory after the wherein ( A ) comprises performing the sequence of com\nat least one graphics processing unit has begun to perform 50 putations at a second rate different than the first rate .\nanother sequence of computations. [ 15. The method of claim 12 , wherein ( A ) comprises:\n 9. The computer system of claim 8 , wherein the controller generating an output representative of an output of at least\nis configured to initiate transfer of the at least a portion of the one neuron in an artificial neural network .]\ninput data and to transfer the at least a portion of the output 16. The method of claim 12 , wherein (C ) comprises:\ndata in parallel with performance of at least one computation 55 transferring the second portion of the output data from the\nin the other sequence of computations by the at least one accelerator memory to the main memory without trans\ngraphics processing unit . ferring any of the intermediate results of the plurality of\n 10. The computer system of claim 1 , wherein the con sequential computations from the accelerator memory\ntroller is configured to control execution of the sequence of to the main memory so as to reduce data transfer via the\ncomputations by the at least one graphics processing unit . 60 bus .\n 11. The computer system of claim 1 , further comprising: 17. The method of claim 12 , wherein ( C ) comprises :\n at least one of a video camera, a microphone, or a cell transferring the second portion of the output data from the\n recording electrode, operably coupled to the central accelerator memory to the main memory after the GPU\n [ processor) processing unit , to acquire the input data in has begun to perform another sequence of computa\n real time . 65 tions.\n 12. A method of performing a sequence of computations 18. The method of claim 17 , wherein (C ) further com\nrepresenting an artificial neural network on a computer prises:\n\f Case 7:26-mc-00323-DC Document 1-4 Filed 08/18/26 Page 20 of 22\n\n\n US RE48,438 E\n 17 18\n initiating transfer of the second portion of the output data 27. The method of claim 26 , further comprising :\n in parallel with performance of at least one computa- storing, in a second memory partition of the memory, data\n tion in the other sequence of computations. specific to the first computation in the sequence of\n 19. The method of claim 12 , further comprising : computations.\n acquiring the input data in real time with at least one of 5 28. The method of claim 27, further comprising :\n a video camera , a microphone, or a cell recording storing, in the second memory partition , external input\n electrode operably coupled to the CPU . data patterns, representations of internal variables, an\n 20. The method of claim 12 , further comprising : input of the computation in the sequence of computa\n storing parameters common to all of the computations in 10 tions , and the output of the computation in the sequence\n the sequence of computations in a first memory bank in of computations.\n the accelerator memory ; and 29. The method of claim 21 , wherein storing the first\n storing data specific to at least one computation in the output data comprises :\n sequence of computations in a second memory bank in accumulating, in the memory, outputs of computational\n the accelerator memory. 15 elements executed by the GPU in performing the first\n 21. A method of performing a sequence of computations computation in the sequence of computations.\nrepresenting an artificial neural network, the method com- 30. The method of claim 21 , further comprising:\nprising : storing, in the memory, an output of a previous compu\n receiving, at a central processing unit ( CPU ), first input tation in the sequence of computations; and\n data acquired from an external system in real time; 20 accessing, by the GPU , the output of the previous com\n initializing, by a controller operably coupled to a graph- putation during performance of the computation in the\n ics processing unit (GPU ), textures and shaders in a sequence of computations.\n memory opera coupled to the GPU ; 31. The method of claim 21 , wherein performing the first\n transferring the first input data received by the CPU to the computation comprises executing a plurality of computa\n memory operably coupled to the GPU : 25 tional elements representing a layer of neurons in an arti\n performing, by the graphics processing unit (GPU ), a first ficial neural network.\n computation in the sequence of computations on the 32. The method of claim 31 , wherein all neurons in the\n first input data based on the textures and shaders to layer of neurons are described by the same equation .\n generate first output data , computations in the 30 33. The method of claim 21 , further comprising :\n acquiring the second input data with at least one of a\n sequence of computations representing respective lay\n ers of neurons in the artificial neural network , an video camera , a microphone, or a cell recording elec\n trode .\n output of the first computation in the sequence of 34. The method of claim 21 , further comprising :\n computations representing an output of a first neuron in loading the second input data from disk .\n a first layer in the artificial neural network ; 35 35. A system for performing a sequence of computations,\n storing , in the memory operably coupled to the GPU , the the system comprising:\n first input data and the first output data ; and a camera to generate input data in real time ;\n transferring second input data acquired from the external a first memory partition ;\n system in real time into the memory operably coupled a second memory partition operably coupled to the first\n to the GPU after the GPU starts the first computation 40 memory partition ; and\n and before the GPU starts a second computation of the a processing unit , operably coupled to the camera , the\n sequence of computations, an output of the second first memory partition , and the second memory parti\n computation in the sequence of computations repre tion , to perform the sequence of computations on a first\n senting an output of a second neuron in a second layer portion of the input data so as to generate a first\n in the artificial neural network . 45 portion of output data , intermediate computations in\n 22. The method of claim 21 , wherein transferring the the sequence of computations yielding intermediate\nsecond input data comprises transferring the second input results, the first portion of the output data representing\ndata via a bus operably coupled to the CPU . an output of an artificial neural network,\n 23. The method of claim 21 , further comprising: wherein the first memory partition is configured to trans\n transferring the first output data from the memory to 50 fer a second portion of the input data to the second\n another memory during the second computation in the memory partition in parallel with performance the\n sequence of computations. sequence of computations by the processing unit ,\n 24. The method of claim 23, further comprising: wherein the second memory partition is configured to\n storing intermediate results of the sequence of computa 55 transfer a second portion of the output data to the first\n tions in the memory, and memory partition in parallel with performance the\n wherein transferring the first output data from the sequence of computations by the processing unit, and\n wherein the sequence of computations represents the\n memory to the other memory occurs without transfer artificial neural network , each neuron in the artificial\n ring the intermediate results of the sequence of com neural network has an output variable assigned to a\n putations. 60 first texture and a second texture in the memory , the first\n 25. The method of claim 23 , wherein transferring the texture holds a first value of the output variable com\nsecond input data and transferring the first output data puted during a previous time step of the sequence of\noccurs in parallel . computations and accessible to other neurons in the\n 26. The method of claim 21 ,further comprising: neural network during a current time step of the\n storing , in a first memory partition of the memory, param- 65 sequence of computations and the second texture accu\n eters common to all of the computations in the mulates a second value of the output variable computed\n sequence of computations. during the current time step .\n\f Case 7:26-mc-00323-DC Document 1-4 Filed 08/18/26 Page 21 of 22\n\n\n US RE48,438 E\n 19 20\n 36. The system of claim 35, wherein the first memory in the sequence of computations representing layers\npartition and the second memory partition are logical par of the neural network and yielding intermediate\ntitions . results ; and\n 37. The system of claim 35, wherein the processing unit is accelerator memory, operably coupled to the at least\ncomprises a graphics processing unit ( GPU ) . 5\n one processing unit, to store the results of the\n 38. The system of claim 35, wherein the processing unit is sequence of computations; and\nconfigured to receive the input data at a first rate and to a controller, operably coupled to the at least one\nperform the sequence of computations at a second rate is processing unit and the accelerator memory, to con\ndifferent than the first rate. trol transfer of the at least a portion of the input data\n 39. The system of claim 35, wherein the second memory 10 into the accelerator memory during performance of\npartition is configured to transfer the second portion of the the intermediate computations in the sequence of\noutput data to the first memory partition without transfer computations by the at least one processing unit, to\nring any of the intermediate results to the first memory control transfer at least a portion of the output data\npartition .\n 40. A system for executing an artificial neural network, 15 from the accelerator memory to the main memory\nthe system comprising: during performance of the intermediate computa\n a central processing unit (CPU ) to provide first input tions in the sequence of computations by the at least\n data ; one processing unit, and to control performance of\n a memory, operably coupled to the CPU , to store the first the sequence of computations by the at least one\n input data in a first partition, referenced by a first 20 processing unit.\n pointer, before computing a first layer of neurons of the 45. The computer system of claim 44, wherein the central\n artificial neural network ; processing unit is configured to receive the input data in\n a processing unit, operably coupled to the memory, to response to a user interaction .\n perform , during computation of the first layer of neu- 46. The computer system of claim 44, wherein :\n rons, at least one calculation on the first input data so 25 the central processing unit is configured to receive the\n as to generate first output data , the first output data input data at a first rate ; and\n representing an output of at least one neuron in the first the at least one processing unit is configured to perform\n layer of neurons ; and the sequence of computations at a second rate different\n a controller, operably coupled to the processing unit and than the first rate.\n the memory, to : 30 47. The computer system of claim 44, wherein the main\n store the first output data in a second partition of the memory is configured to store a copy of the output data\n memory, the second partition referenced by a second stored in the accelerator memory.\n pointer, and to swap the firstpointer with the second 48. The computer system of claim wherein an output\n pointer at the end of the computation of the first layer of at least one computation in the sequence of computations\n of neurons, such that the firstoutput data becomes an 35 represents an output of at least one neuron in an artificial\n input for a second layer of neurons of the artificial neural network .\n neural network, 49. The computer system of claim 44, wherein accelerator\n transfer the first output data to another memory during memory comprises:\n computation of the second layer of neurons, and a first memory partition to store parameters common to\n dictate an order of execution of instructions to the 40 all of the computations in the sequence of computa\n processing unit to perform the computation of the tions ; and\n first layer of neurons . a second memory partition to store data specific to at least\n 41. The system of claim 40 , wherein the processing unit one computation in the sequence of computations.\ncomprises a graphics processing unit . 50. The computer system of claim 44, wherein the con\n 42. The system of claim 40 , wherein the controller is 45 troller is configured to transfer the output data from the\nconfigured to send instructions for performing the at least accelerator memory to the main memory without transfer\none calculation to the processing unit. ring any of the intermediate results from the accelerator\n 43. The system of claim 40 , wherein the memory further memory to the main memory so as to reduce data transfer\ncomprises : via the bus.\n a third partition to store internal variables; and 50 51. The computer system of claim 44, wherein the con\n a fourth partition to store data used as input at a troller is configured to transfer at least a portion of the\n particular layer of neurons of the artificial neural output data from the accelerator memory to the main\n network. memory after the at least one processing unit has begun to\n 44. A computer system , comprising: perform another sequence of computations.\n a central processing unit to receive input data acquired 55 52. The computer system of claim 51 , wherein the con\n from an external system ; troller is configured to initiate transfer of the at least a\n main memory, operably coupled to the central processing portion of the input data and to transfer the at least a portion\n unit via a bus, to store the input data received by the of the output data in parallel with performance of at least\n central processing unit; one computation in the other sequence of computations by\n an accelerator, operably coupled to the central processing 60 the at least one processing unit .\n unit and the main memory via the bus, to receive at 53. The computer system of claim 44, wherein the con\n least a portion of the input data from the main memory , troller is configured to control execution of the sequence of\n the accelerator comprising : computations by the at least one processing unit .\n at least one processing unit to perform a sequence of 54. The computer system of claim 44, further comprising :\n computations representing an artificial neural net- 65 at least one of a video camera , a microphone, or a cell\n work on the at least a portion of the input data so as recording electrode, operably coupled to the central\n to generate output data, intermediate computations processing unit, to acquire the input data in real time .\n\f Case 7:26-mc-00323-DC Document 1-4 Filed 08/18/26 Page 22 of 22\n\n\n US RE48,438 E\n 21 22\n 55. The computer system of claim 1 , wherein the control\nler is configured to inform the central processing unit that\nthe sequence of computations is finished .\n 56. The computer system of claim 1 , wherein the control\nler is configured to reduce a processing load on the central 5\nprocessing unit.\n 57. The computer system of claim 1 , wherein the control\nler is configured to reduce interactions between the central\nprocessing unit and the accelerator.\n 10\n\f","ocr_status":1,"date_upload":"2026-08-20T10:23:27.357447-07:00","document_number":"1","attachment_number":4,"pacer_doc_id":"181037219946","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 3","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622536/","id":490622536,"tags":[],"absolute_url":"/docket/74666997/1/5/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.363334-07:00","date_modified":"2026-08-23T01:50:35.268249-07:00","sha1":"7e28c0fbc03f8c2bb43aa4a038e605cbb2daddea","page_count":20,"file_size":1057517,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.5.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.5.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-5 Filed 08/18/26 Page 1 of 20\n\n\n\n\n EXHIBIT\n\n 4\n\f Case 7:26-mc-00323-DC Document 1-5 Filed 08/18/26 Page 2 of 20\n I 1111111111111111\n 1111111111111111\n IIIIIIIIIIIII1111111111111111\n Illlllll llll\n US00RE49461E\nc19) United States\nc12) Reissued Patent (10) Patent Number: US RE49,461 E\n Gorchetchnikov et al. (45) Date of Reissued Patent: Mar. 14, 2023\n\n\n(54) GRAPHIC PROCESSOR BASED (56) References Cited\n ACCELERATOR SYSTEM AND METHOD\n U.S. PATENT DOCUMENTS\n(71) Applicant: Neurala, Inc., Boston, MA (US)\n 5,063,603 A 11/1991 Burt\n(72) Inventors: Anatoli Gorchetchnikov, Newton, MA 5,136,687 A 8/1992 Edelman et al.\n (US); Heather Marie Ames, Milton, (Continued)\n MA (US); Massimiliano Versace,\n Milton, MA (US); Fabrizio Santini, FOREIGN PATENT DOCUMENTS\n Jamaica Plain, MA (US) EP 1224622 Bl 11/2004\n WO 190208 11/2014\n(73) Assignee: Neurala, Inc., Boston, MA (US)\n (Continued)\n(21) Appl. No.: 17/136,343\n(22) Filed: Dec. 29, 2020 OTHER PUBLICATIONS\n Related U.S. Patent Documents Hodgkin, A. L., and Huxley, A. F. 1952. Quantitative description of\nReissue of: membrane current and its application to conduction and excitation\n(64) Patent No.: 9,189,828 m nerve. J Physiol 117, pp. 500-544.\n Issued: Nov. 17, 2015 (Continued)\n Appl. No.: 14/147,015\n Primary Examiner - William H. Wood\n Filed: Jan.3, 2014\n (74) Attorney, Agent, or Firm - Smith Baluch LLP\nU.S. Applications:\n(63) Continuation of application No. 15/808,201, filed on (57) ABSTRACT\n Nov. 9, 2017, now Pat. No. Re. 48,438, which is an An accelerator system is implemented on an expansion card\n (Continued) comprising a printed circuit board having (a) one or more\n graphics processing units (GPUs), (b) two or more associ-\n(51) Int. Cl. ated memory banks (logically or physically partitioned), (c)\n G06T 1160 (2006.01) a specialized controller, and (d) a local bus providing signal\n coupling compatible with the PCI industry standards. The\n G06F 9/50 (2006.01) controller handles most of the primitive operations to set up\n (Continued) and control GPU computation. Thus, the computer's central\n(52) U.S. Cl. processing unit (CPU) can be dedicated to other tasks. In this\n CPC .............. G06T 1120 (2013.01); G06F 9/5027 case a few controls (simulation start and stop signals from\n the CPU and the simulation completion signal back to CPU),\n (2013.01); G06T 1160 (2013.01); GPU programs and input/output data are exchanged between\n (Continued) CPU and the expansion card. Moreover, since on every time\n(58) Field of Classification Search step of the simulation the results from the previous time step\n CPC ... G06F 9/5027; G06F 2209/509; G06T 1/20; are used but not changed, the results are preferably trans-\n ferred back to CPU in parallel with the computation.\n G06T 1/60; G06N 3/00; G06N 3/02;\n (Continued) 21 Claims, 5 Drawing Sheets\n\n Expansion Card mo\n\n\n\n\n I ............\n\n\n 41 r:;-\n\n\n r~\u00b7--\u00b7 .tll)\n\f Case 7:26-mc-00323-DC Document 1-5 Filed 08/18/26 Page 3 of 20\n\n\n US RE49,461 E\n Page 2\n\n\n Related U.S. Application Data 2011/0004341 Al 1/2011 Sarvadevabhatla et al.\n 2011/0173015 Al 7/2011 Chapman et al.\n application for the reissue of Pat. No. 9,189,828, 2011/0279682 Al 11/2011 Li et al.\n which is a continuation of application No. 11/860, 2012/0072215 Al 3/2012 Yu et al.\n 2012/0089552 Al 4/2012 Chang et al.\n 254, filed on Sep. 24, 2007, now Pat. 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Colorado\nUniv At Boulder Dept of Computer Science, 1986. 88 pages. * cited by examiner\n\f Case 7:26-mc-00323-DC Document 1-5 Filed 08/18/26 Page 7 of 20\n\n\nU.S. Patent Mar.14,2023 Sheet 1 of 5 US RE49,461 E\n\n\n\n\n ,/\n ........... \u00b7\u00b7\u00b7\u00b7\u00b7t--\u00b7.c:\n\f Case 7:26-mc-00323-DC Document 1-5 Filed 08/18/26 Page 8 of 20\n\n\nU.S. Patent Mar.14,2023 Sheet 2 of 5 US RE49,461 E\n\n\n\n\n w\n rt: ~ X:\n \\,,,\n ;- 0\n :) 2;\n\n ..., X\n < ~\n ~\n d w w 00 :t, ..-. -0\n 0\n i,t:<\n N\n \\{)\n (~,\n ..1 r- :fil <.(}\n t>J\n ':\")\n ;-b\n (~\n\n\n\n /\n\n\n CJ\n \"<......\n N\n\n ~~ >-\n ~\n 0\n 0\n N\n .,\n <\".\\!\n\n\n -\n u !!\n w\n ..J\n V '?\n\n /\n z.U ,.J.\n 0 :)\n l.\n :Ez\n ~\n \u00b5 tt; I~ a..\n f.!: \u00b7'\u00a2(\n wm '(--,\n }\u00ab\n ~\n 'r-r {;)\u00b7\n 0 0\n >.::t \u00b7,AWMWM ,A~ \u2022M\u00b7,A \u2022, 'OW\n\n\n %:\n w - Mi2J.1ma11:)d\n _.,,,~..,\n ~\n 0\n (.'>)\n N\n '\"I ..,, 'T\n\n\n - -\n\n\n ,,.,\n 0\n -.:.:::-:\n ..... --\u00b7\n f~\n .......\n ~\n ,~\\;,j\u2022t: r.?-!.if:~/? ~/:f::\n \u00b7\u00b7, :.~.....'!'\u00b7\";\u2022,;-\u00b7.:\u00b7~:\u00b7:\u00b7~ .:-:;::~\n lh.~-:;_/~ ~/~//~\n 435\n 40;: 403\n !: ~rsp.H~ t~xr:1r:=:-~~-ff>i:=:.\n t>:::-:-:.~u:\n ::-:\u2022\n ~n>:::-~n:.ny\n I\n .j t;-;:u:}; ?:-;:GPU\n .\n Sl i~:~t1-:::-r~;:\n fi t)fn\n ~b:=:::!Jt:;::\u00b7\n r'f}f.::f::K::ry\n b::~nK:r:-GPU\n\n ;\u2666------------------\n :r\n\n\n\n\n 480,----~--~\n i Outp~:ttf:<_:,;\u00b7:sp<::,\n i vpk-.:;;:r!to ::';ix.~:Jrfs\n j r?>:3 r\":::(\u00b7!~).. (3;~t: k ,......................\n 440\n\n\n i::;:~~=~:,:~:;:::;t~:~::~\n f\n 4~}fj\n\n V'.J::i~t\n fr_;r:~w::tp i fr:=!\u00b7\n \\:\\'\u00b0::~~t f)W{)p\n r,..\u00b7\n \u2713 y5\n O{ lnpcl!i\u25catl!f,rn\n t:::\u2022:-:.b.Jr<::\n 44~=,\n ........\n p:_);ntr~f::'>\n 1............. t..l~~;~~;~r\u2022:::;~t',J\n N.:.'::..................\n L:~::-(t-.....\n .........,\n --------~~..........\n tt-~~ratK>11?,,.\"\"r\u00b7-.:--\n ..... ........_ ......... \u2713\n\n\n Y<::-s\n\f Case 7:26-mc-00323-DC Document 1-5 Filed 08/18/26 Page 11 of 20\n\n\n\n\n e\n \u2022\n 00\n \u2022\n ~\n ~\n ~\n ~\n\n =\n ~\n\n\n\n 3 .i 2 3 4 1 2 3 -\u00b7\u00b7.. -\u00b7\u00b7 ...\u00b7\u00b7\u00b7\u00b7\u00b7\u00b7\u00b7\u00b7\u00b7\u00b7\u00b7\n .............-...... ....\n 1 2 3\n ~--\u2022-\u2022.\u2022\n -~\u00b7\u00b7\u00b7'\u00b7\u00b7\u00b7\u00b7'\n 6 5 6 7 8 4 5 6 4 5 6 ~\n ~\n\n7!8 9 \u00b7g 7 8 9 7 8 9 :-:\n ' \" ....\n ...\n ~\n N\n 0\n ::a) b) ........,.,.,\n ,, ...... ' .... -\u00b7\u00b7\n )1 \u00b7\u00b7\u00b7\u00b7\u00b7\u00b7=\u00b7\u00b7\u00b7\u00b7\u00b7\u00b7\u00b7--\u2022\u2022'\u00b7\u2022\u00b7\u00b7\n N\n ~\n\n\n\n\n Bo1dlines shmv the packing of data into pixels ',Nlthfour color components,\n rJJ\n =-\n ('D\n ....\n ('D\n\n Ul\n\n ....\n 0\n\n Ul\n\n\n\n\n FIG\u00bb5 d\n rJl.\n\n ~\n ~\n \\0\n ~\n 0--,\n\n \"'\"\"'\n ~\n\f Case 7:26-mc-00323-DC Document 1-5 Filed 08/18/26 Page 12 of 20\n\n\n US RE49,461 E\n 1 2\n GRAPHIC PROCESSOR BASED processing unit/system (CPU). Complete independence is\n ACCELERATOR SYSTEM AND METHOD not desirable, however; user input might affect how the\n computation is performed and even interrupt it if necessary.\n Furthermore, the user output and the disk output are depen-\n Matter enclosed in heavy brackets [ ] appears in the 5 dent on the results of the computation. A reasonable solution\n original patent but forms no part of this reissue specifica- would be to separate input/output into threads, so that it is\n tion; matter printed in italics indicates the additions interacting with hardware occurs in parallel with the com-\n made by reissue; a claim printed with strikethrough putation. In this case whatever CPU processing is required\n indicates that the claim was canceled, disclaimed, or held for input/output should be designed so that it provides the\n invalid by a prior post-patent action or proceeding. 10 synchronization with computation.\n In the case of GPGPU, the computation itself is performed\n RELATED APPLICATIONS outside of the CPU, so the complete system comprises three\n \"peripheral\" components: user interactive hardware, disk\n The present application is a reissue continuation appli- hardware, and computational hardware. The central process-\n cation of U.S. application Ser. No. 15/808,201, which was 15 ing unit (CPU) establishes communication and synchroni-\nfiled on Nov. 9, 2017 as a broadening reissue application of zation between peripherals. Each of the peripherals is pref-\n U.S. Pat. No. 9,189,828, filed Jan. 3, 2014, which claims a erably controlled by a dedicated thread that is executed in\n priority benefit, under 35 U.S.C. \u00a7120, as a continuation of parallel with minimal interactions and dependencies on the\n U.S. application Ser. No. 11/860,254, now U.S. Pat. No. other threads.\n 8,648,867 B2, filed Sep. 24, 2007, entitled \"Graphic Pro- 20 A GPU on a conventional video card is usually controlled\n cessor Based Accelerator System and Method,\" which in through OpenGL, DirectX, or similar graphic application\n turn claims the priority benefit, under 35 U.S.C. \u00a7119(e), of programming interfaces (APis ). Such APis establish the\n U.S. Application No. 60/826,892, filed Sep. 25, 2006. The context of graphic operations, within which all calls to the\npresent application is also a broadening reissue application GPU are made. This context only works when initialized\n of U.S. Pat. No. 9,189,828, filed Jan. 3, 2014, which is a 25 within the same thread of execution that uses it. As a result,\n continuation of U.S. application Ser. No. 11/860,254, now in a preferred embodiment, the context is initialized within\n U.S. Pat. No. 8,648,867 B2, filed Sep. 24, 2007, which in a computational thread. This creates complications, how-\n turn claims the priority benefit, under 35 U.S. C. \u00a7 119(e), of ever, in the interaction between the user interface thread that\n U.S. Application No. 60/826,892, filed Sep. 25, 2006. Each changes parameters of simulations and the computational\n of the above-identified applications is incorporated herein by 30 thread that uses these parameters.\n reference in its entirety. More than one reissue application A solution as proposed here is an implementation of the\n has been filed for the reissue of U.S. Pat. No. 9,189,828, computational stream of execution in hardware, so that\n including this application and U.S. application Ser. No. thread and context initialization are replaced by hardware\n 15/808,201. initialization. This hardware implementation includes an\n 35 expansion card comprising a printed circuit board having (a)\n BACKGROUND one or more graphics processing units, (b) two or more\n associated memory banks that are logically or physically\n Graphics Processing Units (GPUs) are found in video partitioned, (c) a specialized controller, and (d) a local bus\n adapters (graphic cards) of most personal computers (PCs), providing signal coupling compatible with the PCI industry\n video game consoles, workstations, etc. and are considered 40 standards (this includes but is not limited to PCI-Express,\n highly parallel processors dedicated to fast computation of PCI-X, USB 2.0, or functionally similar technologies). The\n graphical content. With the advances of the computer and controller handles most of the primitive operations needed to\n console gaming industries, the need for efficient manipula- set up and control GPU computation. As a result, the CPU\n tion and display of 3D graphics has accelerated the devel- is freed from this function and is dedicated to other tasks. In\n opment of GPUs. 45 this case a few controls (simulation start and stop signals\n In addition, manufacturers of GPU shave included general from the CPU and the simulation completion signal back to\n purpose programmability into the GPU architecture leading CPU), GPU programs and input/output data are the infor-\n to the increased popularity of using GPU s for highly paral- mation exchanged between CPU and the expansion card.\n lelizable and computationally expensive algorithms outside Moreover, since on every time step of the simulation the\n of the computer graphics domain. When implemented on 50 results from the previous time step are used but not changed,\n conventional video card architectures, these general purpose the results are preferably transferred back to CPU in parallel\n GPU (GPGPU) applications are not able to achieve optimal with the computation.\n performance, however. There is overhead for graphics- In general, according to one aspect, the invention features\n related features and algorithms that are not necessary for a computer system. This system comprises a central pro-\n these non-video applications. 55 cessing unit, main memory accessed by the central process-\n ing unit, and a video system for driving a video monitor in\n SUMMARY response to the central processing unit as is common. The\n computer system further comprises an accelerator that uses\n Numerical simulations, e.g., finite element analysis, of input data from and provides output data to the central\n large systems of similar elements (e.g. neural networks, 60 processing unit. This accelerator comprises at least one\n genetic algorithms, particle systems, mechanical systems) graphics processing unit, accelerator memory for the graphic\n are one example of an application that can benefit from processing unit, and an accelerator controller that moves the\n GPGPU computation. During numerical simulations, disk input data into the at least one graphics processing unit and\n and user input/output can be performed independently of the accelerator memory to generate the output data.\n computation because these two processes require interac- 65 In the preferred, the central processing unit transfers the\n tions with peripheral hardware (disk, screen, keyboard, input data for a simulation to the accelerator, after which the\n mouse, etc) and put relatively low load on the central accelerator executes simulation computations to generate\n\f Case 7:26-mc-00323-DC Document 1-5 Filed 08/18/26 Page 13 of 20\n\n\n US RE49,461 E\n 3 4\nthe output data, which is transferred to the central processing In more detail, the computer system 100 in one example\nunit. Preferably, the accelerator controller dictates an order is a standard personal computer (PC). However, this only\nof execution of instructions to the at least one graphics serves as an example environment as computing environ-\nprocessing unit. The use of the separate controller enables ment 100 does not necessarily depend on or require any\ndata transfer during execution such that the accelerator 5 combination of the components that are illustrated and\ncontroller transfers output data from the accelerator memory described herein. In fact, there are many other suitable\nto main memory of the central processing unit. computing environments for this invention, including, but\n In the preferred embodiment, the accelerator controller not limited to, workstations, server computers, supercom-\ncomprises an interface controller that enables the accelerator puters, notebook computers, hand-held electronic devices\nto communicate over a bus of the computer system with the 10 such as cell phones, mp3 players, or personal digital assis-\ncentral processing unit. tants (PDAs), multiprocessor systems, progranimable con-\n In general according to another aspect, the invention also sumer electronics, networks of any of the above-mentioned\nfeatures an accelerator system for a computer system, which computing devices, and distributed computing environments\ncomprises at least one graphics processing unit, accelerator\n that including any of the above-mentioned computing\nmemory for the graphic processing unit and an accelerator 15\n devices.\ncontroller for moving data between the at least one graphics\n In one implementation the GPU accelerator is imple-\nprocessing unit and the accelerator memory.\n In general according to another aspect, the invention also mented as an expansion card 180 includes connections with\nfeatures a method for performing numerical simulations in a the motherboard 110, on which the one or more CPU's 120\ncomputer system. This method comprises a central process- 20 are installed along with main, or system memory 130 and\ning unit loading input data into an accelerator system from mass/non volatile data storage 140, such as hard drive or\nmain memory of the central processing unit and an accel- redundant array of independent drives (RAID) array, for the\nerator controller transferring the input data to a graphics computer system 100. In the current example, the expansion\nprocessing unit with instructions to be performed on the card 180 communicates to the motherboard 110 via a local\ninput data. The accelerator controller then transfers output 25 bus 190. This local bus 190 could be PCI, PCI Express,\ndata generated by the graphic processing unit to the central PCI-X, or any other functionally similar technology (de-\nprocessing unit as output data. pending upon the availability on the motherboard 110). An\n The above and other features of the invention including external version GPU accelerator is also a possible imple-\nvarious novel details of construction and combinations of mentation. In this example, the external GPU accelerator is\nparts, and other advantages, will now be more particularly 30 connected to the motherboard 110 through USB-2.0, IEEE\ndescribed with reference to the accompanying drawings and 1394 (Firewire), or similar external/peripheral device inter-\npointed out in the claims. It will be understood that the face.\nparticular method and device embodying the invention are The CPU 120 and the system memory 130 on the moth-\nshown by way of illustration and not as a limitation of the erboard 110 and the mass data storage system 140 are\ninvention. The principles and features of this invention may 35 preferably independent of the expansion card 180 and only\nbe employed in various and numerous embodiments without communicate with each other and the expansion card 180\ndeparting from the scope of the invention. through the system bus 200 located in the motherboard 110.\n A system bus 200 in current generations of computers have\n BRIEF DESCRIPTION OF THE DRAWINGS bandwidths from 3.2 GB/s (Pentium 4 withAGTL+, Athlon\n 40 XP with EV6) to around 15 GB/s (Xeon Woodcrest with\n In the accompanying drawings, reference characters refer AGTL+, Athlon 64/Opteron with Hypertransport), while the\nto the same parts throughout the different views. The draw- local bus has maximal peak data transfer rates of 4 GB/s\nings are not necessarily to scale; emphasis has instead been (PCI Express 16) or 2 GB/s (PCI-X 2.0). Thus the local bus\nplaced upon illustrating the principles of the invention. Of 190 becomes a bottleneck in the information exchange\nthe drawings: 45 between the system bus 200 and the expansion card 180. The\n FIG. 1 is a schematic diagram illustrating a computer design of the expansion card and methods proposed herein\nsystem including the GPU accelerator according to an minimizes the data transfer through the local bus 190 to\nembodiment of the present invention; reduce the effect of this bottleneck.\n FIG. 2 is block diagram illustrating the architecture for the The system memory 130 is referred to as the main\nGPU accelerator according to an embodiment of the present 50 random-access memory (RAM) in the description herein.\ninvention; However, this is not intended to limit the system memory\n FIG. 3 is a block/flow diagram illustrating an exemplary 130 to only RAM technology. Other possible computer\nimplementation of the top level control of the GPU accel- storage media include, but are not limited to ROM,\nerator system; EEPROM, flash memory, or any other memory technology.\n FIG. 4 is a flow diagram illustrating an exemplary imple- 55 In the illustrated example, the GPU accelerator system is\nmentation of the bottom level control of the GPU accelerator implemented on an expansion card 180 on which the one or\nsystem that is used to execute the target computation; and more GPU's 240 are mounted. It should be noted that the\n FIG. 5 is an example population of nine computational GPU accelerator system GPU 240 is separate from and\nelements arranged in a 3x3 square and a potential packing independent of any GPU on the standard video card 150 or\nscheme for texture pixels, according to an implementation of 60 other video driving hardware such as integrated graphics\nthe present invention. systems. Thus the computations performed on the expansion\n card 180 do not interfere with graphics display (including\n DETAILED DESCRIPTION but not limited to manipulation and rendering of images).\n Various brand of GPU are relevant. Under current tech-\n FIG. 1 shows a computer system 100 that has been 65 nology, GPU's based on the GeForce series from NVIDIA\nconstructed according to the principles of the present inven- Corporation or the Catalyst series from ATI/Advanced\ntion. Micro Devices, Inc.\n\f Case 7:26-mc-00323-DC Document 1-5 Filed 08/18/26 Page 14 of 20\n\n\n US RE49,461 E\n 5 6\n The output to a video monitor 170 is preferably through partition 250b is designed to hold the data textures repre-\nthe video card 150 and not the GPU accelerator system 180. senting internal variables. The third partition 250c is\nThe video card 150 is dedicated to the transfer of graphical designed to hold the data textures used as input at a\ninformation and connects to the motherboard 110 through a particular computation step on the GPU 240. The fourth\nlocal bus 160 that is sometimes physically separate from the 5 partition 250d holds the data textures used to accommodate\nlocal bus 190 that connects the expansion card 180 to the the output of a particular computational step on the GPU\nmotherboard 110. 240. This partitioning scheme can be done logically, does\n FIG. 2 is a block diagram illustrating the general archi- not require hardware implementation. Also the partitioning\ntecture of the GPU accelerator system and specifically the scheme is also altered based on new designs or needs of the\nexpansion card 180 in which at least one GPU 240 and 10 algorithms being employed. The reason for this partitioning\nassociated memories 210 and 250 are mounted. Electrical is further explained in the Data Organization section, below.\n(signal) and mechanical coupling with a local bus 190 A local bus interface 230 on the controller 220 serves as\nprovides signal coupling compatible with the PCI industry a driver that allows the controller 220 to communicate\nstandards (this includes but is not limited to PCI, PCI-X, PCI through the local bus 190 with the system bus 200 and thus\nExpress, or functionally similar technology). 15 the CPU 120 and RAM 130. This local bus interface 230 is\n The GPU accelerator further preferably comprises one not intended to be limited to PCI related technology. Other\nspecifically designed accelerator controller 220. Depending drivers can be used to interface with comparable technology\nupon the implementation, the accelerator controller 220 is as a local bus 190.\nfield programmable gate array (FPGA) logic, or custom built Data Organization\napplication-specific (ASIC) chip mounted in the expansion 20 Each computational element discussed above has output\ncard 180, and in mechanical and signal coupling with the variables that affect the rest of the system. For example in\nGPU 240 and the associated memories 210 and 250. During the case of a neural network it is the output of a neuron. A\ninitial design, a controller can be partially or even fully computational element also usually has several internal\nimplemented in software, in one example. variables that are used to compute output variables, but are\n The controller 220 commands the storage and retrieval of 25 not exposed to the rest of the system, not even to other\narrays of data (on a conventional video card the arrays of elements of the same population, typically. Each of these\ndata are represented as textures, hence the term 'texture' in variables is represented as a texture. The important differ-\nthis document refers to a data array unless specified other- ence between output variables and internal variables is their\nwise and each element of the texture is a pixel of color access.\ninformation), execution of GPU programs (on a conven- 30 Output variables are usually accessed by any element in\ntional video card these programs are called shaders, hence the system during every time step. The value of the output\nthe term 'shader' in this document refers to a GPU program variable that is accessed by other elements of the system\nunless specified otherwise), and data transfer between the corresponds to the value computed on the previous, not the\nsystem bus 200 and the expansion card 180 through the local current, time step. This is realized by dedicating two textures\nbus 190 which allows communication between the main 35 to output variables----one holds the value computed during\nCPU 120, RAM 130, and disk 140. the previous time step and is accessible to all computational\n Two memory banks 210 and 250 are mounted on the elements during the current time step, another is not acces-\nexpansion card 180. In some example, these memory banks sible to other elements and is used to accumulate new values\nseparated in the hardware, as shown, or alternatively imple- for the variable computed during the current time step.\nmented as a single, logically partitioned memory compo- 40 In-between time steps these two textures are switched, so\nnent. that newly accumulated values serve as accessible input\n The reason to separate the memory into two partitions 210 during the next time step, while the old input is replaced with\n250 stems from the nature of the computations to which the new values of the variable. This switch is implemented by\nGPU accelerator system is applied. The elements of com- swapping the address pointers to respective textures as\nputation (computational elements) are characterized by a 45 described in the System and Framework section.\nsingle output variable. Such computational elements often Internal variables are computed and used within the same\ninclude one or more equations. Computational elements are computational element. There is no chance of a race con-\nsame or similar within a large population and are computed dition in which the value is used before it is computed or\nin parallel. An example of such a population is a layer of after it has already changed on the next time step because\nneurons in an artificial neural network (ANN), where all 50 within an element the processing is sequential. Therefore, it\nneurons are described by the same equation. As a result, is possible to render the new value of internal variable into\nsome data and most of the algorithms are common to all the same texture where the old was read from in the texture\ncomputational elements within population, while most of the memory bank. Rendering to more than one texture from a\ndata and some algorithms are specific for each equation. single shader is not implemented in current GPU architec-\nThus, one memory, the shader memory bank 210, is used to 55 tures, so computational elements that track internal variables\nstore the shaders needed for the execution of the required would have to have one shader per variable. These shaders\ncomputations and the parameters that are common for all can be executed in order with internal variables computed\ncomputational elements and is coupled with the controller first, followed by output variables.\n220 only. The second memory, the texture memory bank Further savings of texture memory is achieved through\n250, is used to store all the necessary data that are specific 60 using multiple color components per pixel (texture element)\nfor every computational element (including, but not limited to hold data. Textures can have up to four color components\nto, input data, output data, intermediate results, and param- that are all processed in parallel on a GPU. Thus, to\neters) and is coupled with both the controller 220 and the maximize the use of GPU architecture it is desirable to pack\nGPU 240. the data in such a way that all four components are used by\n The texture memory bank 250 is preferably further par- 65 the algorithm. Even though each computational element can\ntitioned into four sections. The first partition 250 a is have multiple variables, designating one texture pixel per\ndesigned to hold the external input data patterns. The second element is ineffective because internal variables require one\n\f Case 7:26-mc-00323-DC Document 1-5 Filed 08/18/26 Page 15 of 20\n\n\n US RE49,461 E\n 7 8\ntexture and output variables require two textures. Further- Stream 303-runs on the GPU accelerator of the expansion\nmore, different element types have different numbers of card 180 and interacts with the User Interaction Stream 302\nvariables and unless this number is precisely a multiple of through initialization routines and data exchange in between\nfour, texture memory can be wasted. simulations. The Computational Stream 303 interacts with\n Amore reasonable packing scheme would be to pack four 5 the User Interaction Stream and the Data Output Stream\ncomputational elements into a pixel and have separate through synchronization procedures during simulations.\ntextures for every variable associated with each computa- The crucial feature of the interaction between the User\ntional element. In this case the packing scheme is identical Interaction Stream 302 and the Computational Stream 303 is\nfor all textures, and therefore can be accessed using the same the shift of priorities. Outside of the simulation, the system\nalgorithm. Several ways to approach this packing scheme 10 100 is driven by the user input, thus the User Interaction\nare outlined here. An example population of nine computa- Stream 302 has the priority and controls the data exchange\ntional elements arranged in a 3x3 square (FIG. Sa) can be 304 between streams. After the user starts the simulation, the\npacked by element (FIG. Sb), by row (FIG. Sc), or by square Computational Stream 303 takes the priority and controls\n(FIG. Sd). the data exchange between streams until the simulation is\n Packing by element (FIG. Sb) means that elements 1,2,3,4 15 finished or interrupted 350.\ngo into first pixel; 5,6,7,8 go into second pixel; 9 goes into The user starts 300 the framework through the means of\nthird pixel. This is the most compact scheme, but not an operating system and interacts with the software through\nconvenient because the geometrical relationship is not pre- the user interaction section 305 of the graphic user interface\nserved during packing and its extraction depends on the size 306 executed on the CPU 120. The start 300 of the imple-\nof the population. 20 mentation begins with a user action that causes a GUI\n Packing by row (colunm; FIG. Sc) means that elements initialization 307, Disk input/output initialization 308 on the\n1,2,3 go into pixel (1,1); 3,4,5 go into pixel (2,1), 7,8,9 go CPU 120, and controller initialization 320 of the GPU\ninto pixel (3,1). With this scheme the element's y coordinate accelerator on the expansion card 180. GUI initialization\nin the population is the pixel's y coordinate, while the includes opening of the main application window and setting\nelement's x coordinate in the population is the pixel's x 25 the interface tools that allow the user to control the frame-\ncoordinate times four plus the index of color component. work. Disk I/O initialization can be performed at the start of\nFive by five populations in this case will use 2x5 texture, or the framework, or at the start of each individual simulation.\n10 pixels. Five of these pixels will only use one out of four The user interaction 305 controls the setting and editing of\ncomponents, so it wastes 37.5% of this texture. 25xl popu- the computational elements, parameters, and sources of\nlation will use 6xl texture (six pixels) and will waste 12.5% 30 external inputs. It specifies which equations should have\nof it. their output saved to disk and/or displayed on the screen. It\n Packing by square (FIG. Sd) means that elements 1,2,4,5 allows the user to start and stop the simulation. And it\ngo into pixel (1,1); 3,6 go into pixel (1,2); 7,8 go into pixel performs standard interface functions such as file loading\n(2,1), and 9 goes into pixel (2,2). Both the row and the and saving, interactive help, general preferences and others.\ncolunm of the element are determined from the row (col- 35 The user interaction 305 directs the CPU 120 to acquire\nunm) of the pixel times two plus the second (first) bit of the the new external input textures needed (this includes but is\ncolor component index. Five by five populations in this case not limited to loading from disk 140 or receiving them in\nwill use 3x3 texture, or 9 pixels. Four of these pixels will real time from a recording device), parses them if necessary\nonly use two out of four components, and one will only use 309, and initializes their transfer to the expansion card 180,\none component, so it wastes 34.4% of this texture. This is 40 where they are stored 325 in the texture memory bank 250\nmore advantageous than packing by row, since the texture is by the controller 220. The user interaction 305 also directs\nsmaller and the waste is also lower. 25xl population on the the CPU 120 to parse populations of elements that will be\nother hand will use 13xl texture (thirteen pixels) and waste used in the simulation, convert them to GPU programs\n>50% of it, which is much worse than packing by row. (shade rs), compile them 310, and initializes their transfer to\n In order to eliminate waste altogether the population 45 the expansion card 180, where they are stored 326 in the\nshould have even dimensions in the square packing, and it shader memory bank 210 by the controller 220. This opera-\nshould have a number of columns divisible by four in row tion is accompanied by the upload 309 of the initial data into\npacking. Theoretically, the chances are approximately the input partition of the texture memory bank 250, and\nequivalent for both of these cases to occur, so the particular stores the shader order of execution in the controller 220.\ntask and data sizes should determine which packing scheme 50 The user can perform operations 309 and 310 as many times\nis preferable in each individual case. as necessary prior to starting the simulation or between\n The System and Framework simulations.\n FIG. 3 shows an exemplary implementation of the top The editing of the system between simulations is difficult\nlevel system and method that is used to control the compu- to accomplish without the hardware implementation of the\ntation. It is a representation of one of several ways in which 55 computational thread suggested herein. The system of equa-\na system and method for processing numerical techniques tions (computational elements) is represented by textures\ncan be implemented in the invention described herein and so that track variables plus shaders that define processing\nthe implementation is not intended to be limited to the algorithms. As mentioned above, textures, shaders and other\nfollowing description and accompanying figure. graphics related constructs can only be initialized within the\n The method presented herein includes two execution 60 rendering context, which is thread specific. Therefore tex-\nstreams that run on the CPU 120-User Interaction Stream tures and shaders can only be initialized in the computa-\n302 and Data Output Stream 301. These two streams pref- tional thread.\nerably do not interact directly, but depend on the same data Network editing is a user-interactive process, which\naccumulated during simulations. They can be implemented according to the scheme suggested above happens in the\nas separate threads with shared memory access and executed 65 User Interaction Stream 302. The simulation software thus\non different CPUs in the case of multi-CPU computing has to take the new parameters from the User Interaction\nenvironment. The third execution stream-Computational Stream 302, communicate them to the Computational\n\f Case 7:26-mc-00323-DC Document 1-5 Filed 08/18/26 Page 16 of 20\n\n\n US RE49,461 E\n 9 10\nStream 303 and regenerate the necessary shaders and tex- practical software implementation of the method and archi-\ntures. This is hard to accomplish without a hardware imple- tecture described above and pictorially represented in FIG.\nmentation of the Computational Stream 303. The Compu- 3.\ntational Stream 303 is forked from the User Interaction To use SANNDRA, the application should create a\nStream and it can access the memory of the parent thread, 5 TSimulator object either directly or through inheritance.\nbut the reverse communication is harder to achieve. The This object will handle global simulation properties and\ncontroller 220 allows operations 309 and 310 to be per- control the User Interaction Stream, Data Output Stream,\nformed as many times as necessary by providing the nec- and Computational Stream. Through TSimulator: :time-\nessary communication to the User Interaction Stream 302. step( ) TSimulator: :outfileinterval( ), and TSimulator: :out-\n After execution of the input parser texture generation 309 lO mode( ), the application can set the time step of the simu-\nand population parser shader generator and compiler 310 are lation, the time step of disk output, and the mode of the disk\nperformed at least once, the user has the option to initialize output. The external input pattern should be packed into a\nthe simulation 311. During this initialization the main con- TPattem object and bound to the simulation object through\ntrol of the framework is transferred to the GPU accelerator 15 TSimulator::resetinputs( ) method. TSimulator::sim-\nsystem's accelerator controller 220 and computation 330 is Length( ) sets the length of the simulation.\nstarted (see FIG. 4; 420). The user retains the ability to The second step is to create at least one population of\ninterrupt the simulation, change the input, or to change the equations (Tpopulation object). Population holds one equa-\n tion object TEquation. This object contains only a formula\ndisplay properties of the framework, but these interactions\n and does not hold element-specific data, so all elements of\nare queued to be performed at times determined by the 20\n the population can share single TEquation.\ncontroller-driven data exchange 314 and 316 to avoid the\n The TEquation object is converted to a GPU program\ncorruption of the data. before execution. GPU programs have to be executed within\n The progress monitor 312 is not necessary for perfor- a graphical context, which is stream specific. TSimulator\nmance, but adds convenience. It displays the percentage of creates this context within a Computational Stream, there-\ncompleted time steps of the simulation and allows the user 25 fore all programs and data arrays that are necessary for\nto plan the schedule using the estimates of the simulation computation have to be initialized within Computational\nwall clock times. Controller-driven data exchange 314 Stream. Constructor of TPopulation is called from User\nupdates the display of the results 313. Online screen output Interaction Stream, so no GPU-related objects can be ini-\nfor the user selected population allows the user to monitor tialized in this constructor.\nthe activity and evaluate the qualitative behavior of the 30 TPopulation: :fillElements( ) is a virtual method designed\nnetwork. Simulations with unsatisfactory behavior can be to overcome this difficulty. It is called from within the\nterminated early to change parameters and restart. Control- Computational Stream after TSimulator: :networkCreate( ) is\nler-driven data exchange 314 also drives the output of the called in the User Interaction Stream. A user has to override\nresults to disk 317. Data output to disk for convenience can 35 TPopulation::fillElements( ) to create TEquation and other\nbe done on an element per file basis. A suggested file format computation related objects both element independent and\nincludes a leftmost colunm that displays a simulated time for element-specific. Element independent objects include sub-\neach of the simulation steps and subsequent colunms that components of TEquation and objects that describe how to\ndisplay variable values during this time step in all elements handle interdependencies between variables implemented\n through derivatives of TGate class.\nwith identical equations (e.g. all neurons in a layer of a 40\n Element-specific data is held in TElement objects. These\nneural network).\n objects hold references to TEquation and a set of TGate\n Controller-driven data exchange or input parser texture\n objects. There is one TElement per population, but the size\ngenerator 316 allows the user to change input that is gen- of data arrays within this object corresponds to population\nerated on the fly during the simulation. This allows the size. All TElement objects have to be added to the TSimu-\nframework monitoring of the input that is coming from a 45 lator list of elements by calling TSimulator::addUnit( )\nrecording device (video camera, microphone, cell recording method from TPopulation: :fillElements( ).\nelectrode, etc) in real time. Similar to the initial input parser Finally, TPopulation::fillElements() should contain a set\n309, it preprocesses the input into a universal format of the of TElement::add*Dependency( ) calls for each element.\ndata array suitable for texture generation and generates Each of these calls sets a corresponding dependency for\ntextures. Unlike the initial parser 309, here the textures are 50 every TGate object. Here TGate object holds element inde-\ntransferred to hardware not whenever ready but upon the pendent part of dependency and TElement::\nrequest of the controller 220. add*Dependency( ) sets element-specific details.\n The controller 220 also drives the conditional testing 315 System provided TPopulation handles the output of com-\nand 318 informs the CPU-bound streams whether the simu-\n putational elements, both when they need to exchange the\nlation is finished. If so, the control returns to the User 55 data and when they need to output it to disk. User imple-\nInteraction Stream. The user then can change parameters or mentation of TPopulation derivative can add screen output.\ninputs (309 and 310), restart the simulation (311) or quit the Listing 1 is an example code of the user program that uses\nframework (390). a recurrent competitive field (RCF) equation:\n SANNDRA (Synchronous Artificial Neuronal Network\nDistributed Runtime Algorithm; http://www.kinness.net/ 60\n LISTING 1\nDocs/SANNDRA/html) was developed to accelerate and\noptimize processing of numerical integration of large non- uint16_t w - 3, h - 3;\nhomogenous systems of differential equations. This library static float m_compet = 0.5;\n static float m_persist = 1.0;\nis fully reworked in its version 2.x.x to support multiple class TCablePopRCF : public TPopulation\ncomputational backends including those based on multicore 65 {\nCPUs, GPUs and other processing systems. GPU based TEq_RCF* m_equation;\nbackend for SANNDRA-2.x.x can serve as an example\n\f Case 7:26-mc-00323-DC Document 1-5 Filed 08/18/26 Page 17 of 20\n\n\n US RE49,461 E\n 11 12\n LISTING I-continued for new time step. To avoid data confusion, the new values\n of variables should be rendered in a separate texture. After\nTGate* m_gatel; the time step is completed for all equations, these new values\nTGate* m_gate2;\nvoid createGatingStructure( )\n should be copied over old values so that they are used as\n{ 5 input during the next time step. Copying textures is an\nm_gatel - new TGate(0); expensive operation, computationally, but since the textures\nm_gate2 - new TGate(l); are referred to by texture IDs (pointers), swapping these\n}; pointers for input and output textures after each time step\nvoid createUnitStructure(TBasicUnit* u)\n achieves the same result at a much lesser cost.\n{\nu->addO2OPlnputDependency(m_gatel, 0., 0., 0.004, 0., 0, 0); 10\n In the hardware solution suggested herein, ID swapping is\nu->addFullDependency(m_gate2, population()); equivalent to swapping the base memory address for two\n} partitions of the texture memory bank 250. They are\npublic: TCablePopRCF() : TPopulation(\"compCPU RCF\", w, h, true) { }; swapped 485 during synchronization (485, 430, and 455) so\n~TCablePopRCF() {if(m_equation) delete m_equation;\n that data transfer 445 and the computation 435-487 proceeds\n if(m_gatel) delete m_gatel;\n if(m_gate2) delete m_gate2;}; immediately and in parallel with data transfer as shown in\n 15 FIG. 4. A hardware solution allows this parallelism through\nboo! fillElements(TSimulator* sim);\n}; access of the controller 220 to the onboard texture memory\nboo! TCablePopRCF::fillElements(TSimulatior* sim) bank 250.\n{ The main computation and data exchange are executed by\nm_equation - new TEq_RCF(this, m_compet, m_persist);\ncreateGatingStructure( );\n the controller 220. It runs three parallel substreams of\nfor(size_t i - 0; i < xSize( ); ++i) 20 execution: Computational Substream 403, Data Output Sub-\nfor(size_t j - 0; j < ySize( ); ++j) stream 402, and Data Input Substream 404. These streams\n{ are synchronized with each other during the swap of pointers\nTElement* u - new TCPUElement(this, m_equation, i, j); 485 to the input and output texture memory partitions of the\nsim->addUnit(u);\ncreate U nitStructure( u);\n texture memory bank 250 and the check for the last iteration\n} 25 487. Algorithmically, these two operations are a single\nReturn true; atomic operation, but the block diagram shows them as two\n} separate blocks for clarity.\nint The Computational Substream 403 performs a computa-\nmain() tional cycle including a sequential execution of all shaders\n{\n// Input pattern generation (309 in FIG.3) that were stored in the shader memory bank 210 using the\n 30\nuint32_t* pat - new uint32_t[w*h]; appropriate input and output textures. To begin the simula-\nTRandom randGen (0); tion the controller 220 initializes three execution sub streams\nfor(uint32_t I - 0; I < w*h; ++i) 403, 402, and 404. On every simulation step, the Compu-\npat[i] - randGen.random( ); tational Substream 403 determines which textures the GPU\nTpattern* p - new Tpattern(pat, w, h);\n// Setting up the simulation\n 240 will need to perform the computations and initiates the\n 35 upload 435 of them onto the GPU 240. The GPU 240 can\nTSimulator* cableSim - new TSimulator(\"data\"); //(308 and 320 in\nFIG. 3) communicate directly with the texture memory bank 250 to\ncableSim->timestep(0.05); //(320 in FIG. 3) upload the appropriate texture to perform the computations.\ncableSim->resetlnputs(p); //(325 in FIG. 3) The controller 220 also pulls the first shader (known by the\ncableSim->outfileinterval(0.1); //(308 in FIG. 3)\ncableSim->outmode(SANNDRA::timefunc); //(308 in FIG. 3)\n stored order) from the shader memory bank 210 and uploads\ncableSim->simLength(60.0); //(320 in FIG. 3) 40 450 it onto the GPU 240.\n// Preparing the population The GPU 240 executes the following operations in this\nTPopulation* cablePop - new TCablePopRCF( ); //(310 in FIG. 3) order: performs the computation (execution of the shader)\ncableSim->networkCreate( ); //(326 in FIG. 3) 470; tells the controller 220 that it is done with the compu-\nuintl 6_t user= 1;\n tations for the current shader; and after all shaders for this\nwhile(user)\n{ 45 particular equation are executed sends 480 the output tex-\nif(! cableSim->simulationStart(true, 1)) //(311 in FIG. 3) tures to the output portion of the texture memory bank 250.\nexit(!); This cycle continues through all of the equations based on\nstd::cout<<\"Repeat?ln\"; //(305 in FIG. 3) the branching step 482.\nstd::cin>>user; //(305 in FIG. 3) An example shader that performs fourth order Runge-\nif(user -- 1)\ncableSim->networkReset( ); //(305 in FIG. 3)\n Kutta numerical integration is shown in Listing 2 using\n 50\n{ GLSL notation;\nIf(cableSim)\nDelete cableSim; //Also deletes cablePop and its internals LISTING 2\nexit(0);\n}; uniform sarnpler2DRect Variable;\n 55 uniform float integration_step;\n float halfstep - integration_step*0.5;\n FIG. 4 is a detailed flow diagram illustrating a part of an float fl_6step - integration_step/6.0;\nexemplary implementation of the bottom level system and vec4 output - texture2DRect(Variable, gl_TexCoord[0].st);\n // define equation( ) here\nmethod performed during the computation on the GPU\n vec4 rungekutta4(vec4 x)\naccelerator of the expansion card 180 and is a more detailed {\nview of the computational box 330 in FIG. 3. FIG. 4 is a 60 canst vec4 kl - equation(x);\nrepresentation of one of several ways in which a system and canst vec4 k2 - equation(x + halfstep*kl);\nmethod for processing numerical techniques can be imple- canst vec4 k3 - equation(x + halfstep*k2);\n canst vec4 k4 - equation(x + integration step*k3);\nmented. return fl_6step*(kl + 2.0*(k2 + k3) + k4);\n With systems of equations that have complex interdepen- }\ndencies it is likely that the variable in some equation from 65 Void main(void)\na previous time step has to be used by some other equation {\nafter the new values of this variable are already computed\n\f Case 7:26-mc-00323-DC Document 1-5 Filed 08/18/26 Page 18 of 20\n\n\n US RE49,461 E\n 13 14\n LISTING 2-continued cycle (or less frequently as defined by the user), writing this\n output to disk 140, and displaying this output on the monitor\n output +- rungekutta4( output);\n 170. This frees the CPU 120 to execute other applications\n gl_FragColor - output;\n }\n and allows the expansion card to run at its full capacity\n 5 without being slowed down by extensive interactions with\n the CPU 120.\n The shader in Listing 2 can be executed on conventional 2. Minimizing data transfer between the expansion card\nvideo card. Using the controller 220 this code can be further 180 and the system bus 200. All of the information needed\noptimized, however. Since the integration step does not to perform the simulations will be stored on the expansion\nchange during the simulation, the step itself as well as the 10 card 180 and all simulations will take place on it. Further-\nhalfstep and 1/4 of the step can be computed once per more, whatever data transfer remains necessary will take\nsimulation, and updated in all shaders by a shader update place in parallel with the computation, thus reducing the\nprocedures 310, 326 discussed above. impact of this transfer on the performance.\n After all of the equations in the computational cycle are 3. New way to execute GPU programs (shaders). Previ-\ncomputed the main execution substream 403 on the control- 15 ously, the CPU 120 had full control over the order of\n!er 220 can switch 485 the reference pointers of the input and shader's execution and was required to produce specific\noutput portions of the texture memory bank 250. commands on every cycle to tell the GPU 240 which shader\n The two other substreams of execution on the controller to use. With the invention disclosed herein, shaders will\n220 are waiting (blocks 430 and 455, respectively) for this initially be stored on the shader memory bank 210 on the\nswitch to begin their execution. The Data Input Substream\n 20 expansion card 180 and will be sent to the GPU 240 for\n404 is controlling 440 the input of additional data from the execution by the general purpose controller 220 located on\nCPU 120. This is necessary in cases where the simulation is the expansion card.\nmonitoring the changing input, for example input from a 4. Multiple parallelisms. The GPU 240 is inherently\nvideo camera or other recording device in the real time. This\n parallel and is well suited to perform parallel computations.\nsubstream uploads new external input from the CPU 120 to\n In parallel with the GPU 240 performing the next calcula-\nthe texture memory bank 250 so it can be used by the main 25\ncomputational sub stream 403 on the next computational step tion, the controller 220 is uploading the data from the\nand waits for the next iteration 475. The Data Output previous calculation into main memory 130. Furthermore,\nSubstream 445 controls the output of simulation results to the CPU 120 at the same time uses uploaded previous results\nthe CPU 120 if requested by the user. This substream to save them onto disk 140 and to display them on the screen\nuploads the results of the previous step to the main RAM 30 through the system bus 200.\n130 so that the CPU 120 can save them on disk 140 or show 5. Reuse of existing and affordable technology. All hard-\nthem on the results display 313 and waits for the next ware used in the invention and mentioned here-in are based\niteration 460. on currently available and reliable components. Further\n Since the Computational Substream 403 determines the advance of these components will provide straightforward\ntiming of input 440 and output 445 data transfers, these data 35 improvements of the invention.\ntransfers are driven by the controller 220. To further reduce While this invention has been particularly shown and\nthe data transfer overhead (and disk 140 overhead also) the described with references to preferred embodiments thereof,\ncontroller 220 initiates transfer only after selected compu- it will be understood by those skilled in the art that various\ntational steps. For example, if the experimental data that is changes in form and details may be made therein without\nsimulated was recorded every 10 milliseconds (msec) and\n 40 departing from the scope of the invention encompassed by\nthe simulation for better precision was computed every 1 the appended claims.\nmsec, then only every tenth result has to be transferred to\nmatch the experimental frequency.\n This solution stores two copies of output data, one in the What is claimed is:\nexpansion card texture memory bank 250 and another in the [1. A computer system, comprising:\nsystem RAM 130. The copy in the system RAM 130 is 45 a central processing unit to receive input data;\naccessed twice: for disk I/O and screen visualization 313. An main memory, operably coupled to the central processing\nalternative solution would be to provide CPU 120 with a unit via a bus, to store the input data received by the\ndirect read access to the onboard texture memory bank 250 central processing unit;\nby mapping the memory of the hardware onto a global an accelerator, operably coupled to the central processing\nmemory space. The alternative solution will double the 50 unit and the first memory via the bus, to receive at least\ncommunication through the local bus 190. Since the goal a portion of the input data from the main memory, the\ndiscussed herein is reducing the information transfer through accelerator comprising:\nthe local bus 190, the former solution is favored. at least one graphics processing unit to perform a\n The main substream 403 determines if this is the last sequence of computations on the at least a portion of\niteration 487. If it is the last iteration, the controller 220 55 the input data so as to generate output data, inter-\nwaits for the all of the execution substreams to finish 490 mediate computations in the sequence of computa-\nand then returns the control to the CPU 120, otherwise it tions yielding intermediate results; and\nbegins the next computational cycle.\n accelerator memory, operably coupled to the graphic\n This repeats through all of the computational cycles of the\n processing unit, to store the results of the plurality of\nsimulation.\n 60 sequential computations; and\n CONCLUSION a controller, operably coupled to the at least one graphics\n processing unit and the accelerator memory, to transfer\n This GPU accelerator system offers the following poten- the at least a portion of the input data into the accel-\ntial advantages: erator memory, and to transfer at least a portion of the\n 1. Limited computations on the CPU 120. The CPU 120 65 output data from the accelerator memory to the main\nis only used for user input, sending information to the memory during performance of the sequence of com-\ncontroller 220, receiving output after each computational putations by the at least one graphic processing unit.]\n\f Case 7:26-mc-00323-DC Document 1-5 Filed 08/18/26 Page 19 of 20\n\n\n US RE49,461 E\n 15 16\n [2. The computer system of claim 1, wherein the central [13. The method of claim 12, further comprising:\nprocessing unit is configured to receive the input data in storing the input data in the main memory in response to\nresponse to a user interaction.] a user interaction.]\n [3. The computer system of claim 1, wherein: [14. The method of claim 12, further comprising:\n the central processing unit is configured to receive the 5 receiving the input data at a first rate; and\n input data at a first rate; and wherein (A) comprises performing the sequence of com-\n the at least one graphics processing unit is configured to putations at a second rate different than the first rate.]\n perform the sequence of computations at a second rate [15. The method of claim 12, wherein (A) comprises:\n different than the first rate.] generating an output representative of an output of at least\n 10\n [4. The computer system of claim 1, wherein the main one neuron in an artificial neural network.]\nmemory is configured to store a copy of the output data [16. The method of claim 12, wherein (C) comprises:\nstored in the accelerator memory.] transferring the second portion of the output data from the\n [5. The computer system of claim 1, wherein an output of accelerator memory to the main memory without trans-\nat least one computation in the sequence of computations 15 ferring any of the intermediate results of the plurality of\nrepresents an output of at least one neuron in an artificial sequential computations from the accelerator memory\nneural network.] to the main memory so as to reduce data transfer via the\n [6. The computer system of claim 1, wherein accelerator bus.]\nmemory comprises: [17. The method of claim 12, wherein (C) comprises:\n a first memory bank to store parameters common to all of 20 transferring the second portion of the output data from the\n the computations in the sequence of computations; and accelerator memory to the main memory after the GPU\n a second memory bank to store data specific to at least one has begun to perform another sequence of computa-\n computation in the sequence of computations.] tions.]\n [7. The computer system of claim 1, wherein the control- [18. The method of claim 17, wherein (C) further com-\nler is configured to transfer the output data from the accel- 25 prises:\nerator memory to the main memory without transferring any initiating transfer of the second portion of the output data\nof the intermediate results from the accelerator memory to in parallel with performance of at least one computa-\nthe main memory so as to reduce data transfer via the bus.] tion in the other sequence of computations.]\n [8. The computer system of claim 1, wherein the control- [19. The method of claim 12, further comprising:\nler is configured to transfer at least a portion of the output 30 acquiring the input data in real time with at least one of\ndata from the accelerator memory to the main memory after a video camera, a microphone, or a cell recording\nthe at least one graphics processing unit has begun to electrode operably coupled to the CPU.]\nperform another sequence of computations.] [20. The method of claim 12, further comprising:\n [9. The computer system of claim 8, wherein the control- 35 storing parameters common to all of the computations in\n!er is configured to initiate transfer of the at least a portion the sequence of computations in a first memory bank in\nof the input data and to transfer the at least a portion of the the accelerator memory; and\noutput data in parallel with performance of at least one storing data specific to at least one computation in the\ncomputation in the other sequence of computations by the at sequence of computations in a second memory bank in\nleast one graphics processing unit.] 40 the accelerator memory.]\n [10. The computer system of claim 1, wherein the con- 21. A method of executing computations representing an\ntroller is configured to control execution of the sequence of artificial neural network on a computer system comprising\ncomputations by the at least one graphics processing unit.] at least one central processing unit (CPU), a processing\n [11. The computer system of claim 1, further comprising: unit, a first memory partition, and a second memory parti-\n at least one of a video camera, a microphone, or a cell 45 tion, the method comprising:\n recording electrode, operably coupled to the central executing, by the at least one CPU, a user interaction\n processor unit, to acquire the input data in real time.] stream, the user interaction stream controlling transfer\n [12. A method of performing a sequence of computations of inputs to the artificial neural network to the first\non a computer system comprising a central processing unit memory partition and the second memory partition;\n(CPU), a main memory operably coupled to the central 50 executing, by the processing unit, a computational stream,\nprocessing unit via a bus, an accelerator operably coupled to the computational stream controlling data exchange\nthe CPU and the main memory via the bus, the accelerator between the user interaction stream and the computa-\ncomprising a graphics processing unit (GPU) and an accel- tional stream during execution of the computations\nerator memory, the method comprising: representing the artificial neural network;\n (A) performing, by the GPU, the sequence of computa- 55 shifting control of a data exchange between the user\n tions on a first portion of the input data so as to generate interaction stream and the computational stream to the\n a first portion of the output data, intermediate compu- computational stream in response to starting execution\n tations in the sequence of computations yielding inter- of the computations representing the artificial neural\n mediate results; network;\n (B) in parallel with performing the sequence of compu- 60 shifting control of the data exchange between the user\n tations by the GPU in (A), transferring a second portion interaction stream and the computational stream to the\n of the input data from the main memory to the accel- user interaction stream in response to completion or\n erator via the bus; and interruption of the computations representing the arti-\n (C) in parallel with performing the sequence of compu- ficial neural network;\n tations by the GPU in (A), transferring a second portion 65 queueing a user command received by the user interaction\n of the output data from the accelerator memory to the stream during execution of the computations represent-\n main memory via the bus.] ing the artificial neural network; and\n\f Case 7:26-mc-00323-DC Document 1-5 Filed 08/18/26 Page 20 of 20\n\n\n US RE49,461 E\n 17 18\n executing the user command during execution of the a second memory partition;\n computations representing the artificial neural network at least one central processing unit (CPU), operably\n at times determined by the computational stream. coupled to the camera, the first memory partition, and\n 22. The method of claim 21, wherein the user interaction the second memory partition, to execute a user inter-\nstream controls the data exchange between the user inter- 5 action stream, the user interaction stream controlling\naction stream and the computational stream outside of transfer of the input data acquired by the camera to the\nexecution of the computations representing the artificial first memory partition and the second memory partition\nneural network. during execution of the computations representing the\n 23. The method of claim 21, wherein executing the user artificial neural network;\ninteraction stream comprises: 10\n a processing unit, operably coupled to the first memory\n controlling setting and editing of computational elements\n partition, the second memory partition, and the at least\n of the computations representing the artificial neural\n one CPU, to execute a computational stream, the\n network\n 24. The method of claim 21, wherein executing the user computational stream controlling transfer of the input\ninteraction stream comprises: 15\n data from the first memory partition and the second\n controlling setting and editing of parameters of the com- memory partition during execution of the computations\n putations representing the artificial neural network. representing the artificial neural network, the execution\n 25. The method of claim 21, wherein executing the user of the computations representing the artificial neural\ninteraction stream comprises: network occurring while the camera is acquiring the\n controlling setting and editing of parameters of the inputs 20 input data; and\n to the artificial neural network. a controller, operably coupled to the at least one CPU and\n 26. The method of claim 21, wherein executing the user the processing unit, to queue user interactions received\ninteraction stream comprises: by the user interaction stream during the execution of\n specifying an output to be saved to disk and/or displayed the computations representing the artificial neural net-\n on a screen. 25\n work for performance at times selected to avoid data\n 27. The method of claim 21, wherein executing the user corruption.\ninteraction stream comprises: 34. The system of claim 33, wherein the user interactions\n parsing elements to be used in the computations repre- cause interruption of the computations representing the\n senting the artificial neural network. artificial neural network.\n 28. The method of claim 27, wherein the processing unit 30 35. The system of claim 33, wherein the user interactions\ncomprises a graphics processing unit ( GPU) and executing cause a change in inputs to the artificial neural network.\nthe user interaction stream further comprises: 36. The system of claim 33, wherein the user interactions\n converting the elements into GPU programs. cause a change in display properties of an output of the\n 29. The method of claim 28, wherein executing the user computations representing the artificial neural network.\ninteraction stream comprises: 35\n 3 7. The system of claim 33, wherein the controller is\n compiling the GPU programs. configured to request the input data during the execution of\n 30. The method of claim 29, wherein executing the user the computations representing the artificial neural network.\ninteraction stream comprises: 38. The method of claim 21, wherein the user command\n transferring the GPU programs to the second memory causes interruption of the computations representing the\n partition. 40\n artificial neural network.\n 31. The method of claim 21, further comprising: 39. The method of claim 21, wherein the user command\n executing, by the at least one CPU, a data output stream, causes a change in the inputs to the artificial neural net-\n the data output stream controlling transfer of outputs of work.\n the computations representing the artificial neural net- 40. The method of claim 21, wherein the user command\n work to disk. 45\n causes a change in display properties of an output of the\n 32. The method of claim 21, further comprising: computations representing the artificial neural network.\n generating the inputs with a video camera during execu- 41. The method of claim 21, wherein, during execution of\n tion of the computations. the computations representing the artificial neural network,\n 33. A system for executing computations representing an the computational stream controls the data exchange\nartificial neural network, the system comprising: 50\n between the user interaction stream and the computational\n a camera to acquire input data for the artificial neural stream by requesting the inputs to the artificial neural\n network; network.\n a first memory partition; * * * * *\n\f","ocr_status":1,"date_upload":"2026-08-20T10:23:18.351870-07:00","document_number":"1","attachment_number":5,"pacer_doc_id":"181037219948","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 4","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622537/","id":490622537,"tags":[],"absolute_url":"/docket/74666997/1/6/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.386848-07:00","date_modified":"2026-08-23T02:40:36.335099-07:00","sha1":"97a32ad6b988736f928c4ce6c06e717e92cd1a03","page_count":20,"file_size":409314,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.6.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.6.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-6 Filed 08/18/26 Page 1 of 20\n\n\n\n\n EXHIBIT\n\n 5\n\f Case 7:26-mc-00323-DC Document 1-6 Filed 08/18/26 Page 2 of 20\n\n\n\n\n UNITED STATES DISTRICT COURT\n WESTERN DISTRICT OF TEXAS\n MIDLAND/ODESSA DIVISION\n\n\nNEURAL AI, LLC,\n\n Plaintiff, Civil Action No. 7:24-cv-00221-ADA-DTG\n\n v. JURY TRIAL DEMANDED\n\nNVIDIA CORPORATION,\n\n Defendant.\n\n\n PLAINTIFF NEURAL AI, LLC\u2019S NOTICE OF SERVICE\n OF SUBPOENA TO COREWEAVE, INC. (COREWEAVE)\n\n PLEASE TAKE NOTICE that Plaintiff Neural AI, LLC (\u201cNeural AI\u201d) will serve a\n\nsubpoena for Subpoena to Produce Documents, Information, or Objects on CoreWeave, Inc.\n\n(\u201cCoreWeave\u201d). The subpoena is attached hereto as Attachment 1.\n\n PLEASE TAKE FURTHER NOTICE that CoreWeave is requested to produce all\n\ndocuments and things in its possession, custody, or control requested in Exhibit A of the subpoena\n\nby 12:00 p.m. Central Time on November 7, 2025, via email or to Planet Depos \u2013 Downtown\n\nAustin c/o Lexitas Legal, 100 Congress Ave, Ste. 2000, Austin, TX 78701, or alternatively at a\n\nmutually agreed upon time and location.\n\n\n\nDated: October 15, 2025\n Respectfully submitted,\n\n /s/ Emily Portuguese\n Max L. Tribble\n Texas State Bar 20213950\n Brian D. Melton\n Texas State Bar 24010620\n Rocco Magni\n\fCase 7:26-mc-00323-DC Document 1-6 Filed 08/18/26 Page 3 of 20\n\n\n\n\n Texas State Bar 24092745\n Samuel Drezdzon\n Texas State Bar 24117374\n SUSMAN GODFREY L.L.P.\n 1000 Louisiana\n Suite 5100\n Houston, TX 77002\n Telephone: (713) 651-9366\n Facsimile: (713) 654-6666\n mtribble@susmangodfrey.com\n bmelton@susmangodfrey.com\n rmagni@susmangodfrey.com\n sdrezdzon@susmangodfrey.com\n\n Tamar Lusztig\n NY State Bar 5125174\n Emily Portuguese\n NY State Bar 5920327\n One Manhattan West, 50th Floor\n New York, NY 10001\n tlusztig@susmangodfrey.com\n eportuguese@susmangodfrey.com\n\n Tanner Laiche\n WA State Bar 5125174\n 401 Union Street, Suite 3000\n Seattle, WA 98101\n tlaiche@susmangodfrey.com\n\n Mark D. Siegmund\n Texas State Bar No. 24117055\n CHERRY JOHSON SIEGMUND\n JAMES PC\n Bridgeview Center\n 7901 Fish Pond Road, 2nd Floor\n Waco, Texas 76710\n msiegmund@cjsjlaw.com\n\n Max Ciccarelli\n Texas State Bar No. 00787242\n CICCARELLI LAW FIRM LLC\n 100 N. 6th Street, Suite 502\n Waco, Texas 76701\n Max@CiccarelliLawFirm.com\n\n Attorneys for Plaintiff Neural AI, LLC\n\f Case 7:26-mc-00323-DC Document 1-6 Filed 08/18/26 Page 4 of 20\n\n\n\n\n CERTIFICATE OF SERVICE\n\n\n I certify that on October 15, 2025 a true and correct copy of Neural AI\u2019s Subpoena to\n\nProduce Documents, Information, or Objects on CoreWeave, Inc. has been served on the following\n\ncounsel of record via email as indicated below:\n\nL. Kieran Kieckhefer\nCasey McCracken\nJaysen S. Chung\nGIBSON, DUNN & CRUTCHER LLP\nOne Embarcadero Center Suite 2600\nSan Francisco, CA 94111-3715\nkkieckhefer@gibsondunn.com\ncmccracken@gibsondunn.com\njschung@gibsondunn.com\n\nBrian Rosenthal\nAhmed ElDessouki\nVivian Lu\nPaul Torchia\nGIBSON, DUNN & CRUTCHER LLP\n200 Park Avenue\nNew York, NY 10166-0193\nbrosenthal@gibsondunn.com\naeldessouki@gibsondunn.com\nvlu@gibsondunn.com\nptorchia@gibsondunn.com\n\nLillian J. Mao\nGIBSON DUNN & CRUTCHER LLP\n310 University Avenue\nPalo Alto, CA 94301-1744\nlmao@gibsondunn.com\n\nBrian M. Buroker\nGIBSON DUNN & CRUTCHER LLP\n1700 M St. N.W.\nWashington, DC 20036\nbburoker@gibsondunn.com\n\nNathan Curtis\nGIBSON DUNN & CRUTCHER LLP\n\f Case 7:26-mc-00323-DC Document 1-6 Filed 08/18/26 Page 5 of 20\n\n\n\n\n2001 Ross Ave., Ste. 2100\nDallas, TX 75201\nncurtis@gibsondunn.com\n\nBarry K. Shelton\nBradley D. Coburn\nSHELTON COBURN LLP\n311 RR 620 S, Suite 205\nAustin, TX 78734-4775\nbshelton@sheltoncoburn.com\n\n\n /s/ Emily Portuguese\n Emily Portuguese\n\fCase 7:26-mc-00323-DC Document 1-6 Filed 08/18/26 Page 6 of 20\n\n\n\n\n Attachment 1\n\f Case 7:26-mc-00323-DC Document 1-6 Filed 08/18/26 Page 7 of 20\n AO 88B (Rev. 02/14) Subpoena to Produce Documents, Information, or Objects or to Permit Inspection of Premises in a Civil Action\n\n\n UNITED STATES DISTRICT COURT\n for the\n Western District of __________\n __________ Texas\n NEURAL AI, LLC\n )\n Plaintiff )\n v. ) Civil Action No. 7:24-cv-00221-ADA-DTG\n NVIDIA CORPORATION\n )\n )\n Defendant )\n\n SUBPOENA TO PRODUCE DOCUMENTS, INFORMATION, OR OBJECTS\n OR TO PERMIT INSPECTION OF PREMISES IN A CIVIL ACTION\n\n To: CoreWeave, Inc.\n c/o National Registered Agents, 1999 Bryan St., Ste. 900, Dallas, TX 75201\n (Name of person to whom this subpoena is directed)\n\n \u2714\n u Production: YOU ARE COMMANDED to produce at the time, date, and place set forth below the following\n documents, electronically stored information, or objects, and to permit inspection, copying, testing, or sampling of the\n material:\n See Exhibit A\n\n\n Place: Planet Depos \u2013 Downtown Austin c/o Lexitas Legal Date and Time:\n 100 Congress Ave, Ste. 2000 11/07/2025 12:00 pm\n Austin, TX 78701\n\n u Inspection of Premises: YOU ARE COMMANDED to permit entry onto the designated premises, land, or\n other property possessed or controlled by you at the time, date, and location set forth below, so that the requesting party\n may inspect, measure, survey, photograph, test, or sample the property or any designated object or operation on it.\n\n Place: Date and Time:\n\n\n\n The following provisions of Fed. R. Civ. P. 45 are attached \u2013 Rule 45(c), relating to the place of compliance;\n Rule 45(d), relating to your protection as a person subject to a subpoena; and Rule 45(e) and (g), relating to your duty to\n respond to this subpoena and the potential consequences of not doing so.\n\n Date: 10/15/2025\n\n CLERK OF COURT\n OR\n /s/ Emily Portuguese\n Signature of Clerk or Deputy Clerk Attorney\u2019s signature\n\n\n The name, address, e-mail address, and telephone number of the attorney representing (name of party)\nNeural AI, LLC , who issues or requests this subpoena, are:\n Emily Portuguese, Susman Godfrey LLP, One Manhattan West, 50th Floor, New York, New York 10001\nHSRUWXJXHVH#VXVPDQJRGIUH\\\u0011FRP\u000f\u0003\u0015\u0014\u0015\u0010\u001a\u0015\u001c\u0010\u0015\u0013\u001b\u0015\n Notice to the person who issues or requests this subpoena\n If this subpoena commands the production of documents, electronically stored information, or tangible things or the\n inspection of premises before trial, a notice and a copy of the subpoena must be served on each party in this case before\n it is served on the person to whom it is directed. Fed. R. Civ. P. 45(a)(4).\n\f Case 7:26-mc-00323-DC Document 1-6 Filed 08/18/26 Page 8 of 20\nAO 88B (Rev. 02/14) Subpoena to Produce Documents, Information, or Objects or to Permit Inspection of Premises in a Civil Action (Page 2)\n\nCivil Action No. 7:24-cv-00221-ADA-DTG\n\n PROOF OF SERVICE\n (This section should not be filed with the court unless required by Fed. R. Civ. P. 45.)\n\n I received this subpoena for (name of individual and title, if any)\non (date) .\n\n u I served the subpoena by delivering a copy to the named person as follows:\n\n\n on (date) ; or\n\n u I returned the subpoena unexecuted because:\n .\n\n Unless the subpoena was issued on behalf of the United States, or one of its officers or agents, I have also\n tendered to the witness the fees for one day\u2019s attendance, and the mileage allowed by law, in the amount of\n $ .\n\nMy fees are $ for travel and $ for services, for a total of $ 0.00 .\n\n\n I declare under penalty of perjury that this information is true.\n\n\nDate:\n Server\u2019s signature\n\n\n\n Printed name and title\n\n\n\n\n Server\u2019s address\n\nAdditional information regarding attempted service, etc.:\n\f Case 7:26-mc-00323-DC Document 1-6 Filed 08/18/26 Page 9 of 20\nAO 88B (Rev. 02/14) Subpoena to Produce Documents, Information, or Objects or to Permit Inspection of Premises in a Civil Action(Page 3)\n\n Federal Rule of Civil Procedure 45 (c), (d), (e), and (g) (Effective 12/1/13)\n(c) Place of Compliance. (ii) disclosing an unretained expert\u2019s opinion or information that does\n not describe specific occurrences in dispute and results from the expert\u2019s\n (1) For a Trial, Hearing, or Deposition. A subpoena may command a study that was not requested by a party.\nperson to attend a trial, hearing, or deposition only as follows: (C) Specifying Conditions as an Alternative. In the circumstances\n (A) within 100 miles of where the person resides, is employed, or described in Rule 45(d)(3)(B), the court may, instead of quashing or\nregularly transacts business in person; or modifying a subpoena, order appearance or production under specified\n (B) within the state where the person resides, is employed, or regularly conditions if the serving party:\ntransacts business in person, if the person (i) shows a substantial need for the testimony or material that cannot be\n (i) is a party or a party\u2019s officer; or otherwise met without undue hardship; and\n (ii) is commanded to attend a trial and would not incur substantial (ii) ensures that the subpoenaed person will be reasonably compensated.\nexpense.\n (e) Duties in Responding to a Subpoena.\n (2) For Other Discovery. A subpoena may command:\n (A) production of documents, electronically stored information, or (1) Producing Documents or Electronically Stored Information. These\ntangible things at a place within 100 miles of where the person resides, is procedures apply to producing documents or electronically stored\nemployed, or regularly transacts business in person; and information:\n (B) inspection of premises at the premises to be inspected. (A) Documents. A person responding to a subpoena to produce documents\n must produce them as they are kept in the ordinary course of business or\n(d) Protecting a Person Subject to a Subpoena; Enforcement. must organize and label them to correspond to the categories in the demand.\n (B) Form for Producing Electronically Stored Information Not Specified.\n (1) Avoiding Undue Burden or Expense; Sanctions. A party or attorney If a subpoena does not specify a form for producing electronically stored\nresponsible for issuing and serving a subpoena must take reasonable steps information, the person responding must produce it in a form or forms in\nto avoid imposing undue burden or expense on a person subject to the which it is ordinarily maintained or in a reasonably usable form or forms.\nsubpoena. The court for the district where compliance is required must (C) Electronically Stored Information Produced in Only One Form. The\nenforce this duty and impose an appropriate sanction\u2014which may include person responding need not produce the same electronically stored\nlost earnings and reasonable attorney\u2019s fees\u2014on a party or attorney who information in more than one form.\nfails to comply. (D) Inaccessible Electronically Stored Information. The person\n responding need not provide discovery of electronically stored information\n (2) Command to Produce Materials or Permit Inspection. from sources that the person identifies as not reasonably accessible because\n (A) Appearance Not Required. A person commanded to produce of undue burden or cost. On motion to compel discovery or for a protective\ndocuments, electronically stored information, or tangible things, or to order, the person responding must show that the information is not\npermit the inspection of premises, need not appear in person at the place of reasonably accessible because of undue burden or cost. If that showing is\nproduction or inspection unless also commanded to appear for a deposition, made, the court may nonetheless order discovery from such sources if the\nhearing, or trial. requesting party shows good cause, considering the limitations of Rule\n (B) Objections. A person commanded to produce documents or tangible 26(b)(2)(C). The court may specify conditions for the discovery.\nthings or to permit inspection may serve on the party or attorney designated\nin the subpoena a written objection to inspecting, copying, testing, or (2) Claiming Privilege or Protection.\nsampling any or all of the materials or to inspecting the premises\u2014or to (A) Information Withheld. A person withholding subpoenaed information\nproducing electronically stored information in the form or forms requested. under a claim that it is privileged or subject to protection as trial-preparation\nThe objection must be served before the earlier of the time specified for material must:\ncompliance or 14 days after the subpoena is served. If an objection is made, (i) expressly make the claim; and\nthe following rules apply: (ii) describe the nature of the withheld documents, communications, or\n (i) At any time, on notice to the commanded person, the serving party tangible things in a manner that, without revealing information itself\nmay move the court for the district where compliance is required for an privileged or protected, will enable the parties to assess the claim.\norder compelling production or inspection. (B) Information Produced. If information produced in response to a\n (ii) These acts may be required only as directed in the order, and the subpoena is subject to a claim of privilege or of protection as\norder must protect a person who is neither a party nor a party\u2019s officer from trial-preparation material, the person making the claim may notify any party\nsignificant expense resulting from compliance. that received the information of the claim and the basis for it. After being\n notified, a party must promptly return, sequester, or destroy the specified\n (3) Quashing or Modifying a Subpoena. information and any copies it has; must not use or disclose the information\n (A) When Required. On timely motion, the court for the district where until the claim is resolved; must take reasonable steps to retrieve the\ncompliance is required must quash or modify a subpoena that: information if the party disclosed it before being notified; and may promptly\n (i) fails to allow a reasonable time to comply; present the information under seal to the court for the district where\n (ii) requires a person to comply beyond the geographical limits compliance is required for a determination of the claim. The person who\nspecified in Rule 45(c); produced the information must preserve the information until the claim is\n (iii) requires disclosure of privileged or other protected matter, if no resolved.\nexception or waiver applies; or\n (iv) subjects a person to undue burden. (g) Contempt.\n (B) When Permitted. To protect a person subject to or affected by a The court for the district where compliance is required\u2014and also, after a\nsubpoena, the court for the district where compliance is required may, on motion is transferred, the issuing court\u2014may hold in contempt a person\nmotion, quash or modify the subpoena if it requires: who, having been served, fails without adequate excuse to obey the\n (i) disclosing a trade secret or other confidential research, subpoena or an order related to it.\ndevelopment, or commercial information; or\n\n\n\n For access to subpoena materials, see Fed. R. Civ. P. 45(a) Committee Note (2013).\n\f Case 7:26-mc-00323-DC Document 1-6 Filed 08/18/26 Page 10 of 20\n\n\n\n\n EXHIBIT A\n\n DEFINITIONS AND INSTRUCTIONS\n\n 1. The term \u201cNVIDIA GPU-Acceleration Hardware\u201d means the following devices:\n\nDGX line of supercomputers and servers (including at least DGX B300, DGX B200, DGX GB200,\n\nDGX GB300, DGX Spark, DGX Station, DGX SuperPOD with GB300, DGX SuperPOD with\n\nGB200, DGX H200, DGX H100, DGX BasePOD, DGX SuperPOD with H200, DGX A100),\n\nHGX line of supercomputers and servers (including at least HGX B300, HGX B200, HGX H100,\n\nHGX H200, Eos SuperPOD), OVX line of supercomputers and servers (including at least OVX\n\nL40S), EGX line of supercomputers and servers (including at least EGX Server with Quadro RTX\n\nA6000, EGX Server with A40, EGX Server with Quadro RTX 8000, EGX Server with Quadro\n\nRTX 6000), GB300 NVL72, GB200 NVL72; Nvidia\u2019s GPU accelerators and superchips,\n\nincluding those with NVIDIA\u2019s Blackwell, Hopper, Ada Lovelace, Ampere, Turing, Volta, Pascal,\n\nand Maxwell GPU architectures, including at least, RTX PRO 6000 Server Edition, RTX PRO\n\n6000 Workstation, RTX PRO 6000 Max-Q Workstation, RTX PRO 5000, RTX PRO 4500, RTX\n\nPRO 4000, RTX PRO 3000, RTX PRO 2000, RTX PRO 1000, RTX PRO 500, GB300, GB200,\n\nH100, H200, GH200, GH100, L40, L40S, L4, RTX 6000, RTX 6000 Ada, RTX 5000, Ada, RTX\n\n4500 Ada, RTX 4000 Ada, RTX 4000 SFF, RTX 3500, RTX 3000, RTX 2000, RTX 1000, RTX\n\n500, RTX 4090, RTX 4080 SUPER, RTX 4070 Ti SUPER, RTX 4070 SUPER, RTX 4070, RTX\n\n4060 Ti, and RTX 4060, GeForce RTX 4090 Laptop GPU, GeForce RTX 4080 Laptop GPU,\n\nGeForce RTX 4070 Laptop GPU, GeForce RTX 4060 Laptop GPU, GeForce RTX 4050 Laptop\n\nGPU, A100, A40, A30, A16, A10, A2, A800 40GB Active, RTX A6000, RTX A5500, RTX\n\nA5000, RTX A4500, RTX A4000, RTX A2000, RTX A2000 12GB, RTX A1000, RTX A400,\n\nRTX A5500, RTX A4500, RTX A3000 12GB, RTX A2000 8GB, RTX A1000 6GB, RTX A500,\n\f Case 7:26-mc-00323-DC Document 1-6 Filed 08/18/26 Page 11 of 20\n\n\n\n\nGeForce RTX 3090 Ti, GeForce RTX 3090, GeForce RTX 3080 Ti, GeForce RTX 3080, GeForce\n\nRTX 3070 Ti, GeForce RTX 3070, GeForce RTX 3060 Ti, GeForce RTX 3060, GeForce RTX\n\n3050 (8 GB), GeForce RTX 3050 (6 GB), GeForce RTX 3080 Ti Laptop GPU, GeForce RTX\n\n3080 Laptop GPU, GeForce RTX 3070 Ti Laptop GPU, GeForce RTX 3070 Laptop GPU,\n\nGeForce RTX 3060 Laptop GPU, GeForce RTX 3050 Ti Laptop GPU, GeForce RTX 3050 Laptop\n\nGPU, GeForce MX570 Laptop GPU, Tesla T4 GPUs, Quadro RTX 8000, Quadro RTX 6000,\n\nQuadro RTX 8000, Quadro RTX 6000, Quadro RTX 5000, Quadro RTX 4000, Quadro RTX 3000,\n\nQuadro T2000, T1000 8GB, T1200, Quadrio T1000, T1000 (4GB), T600, T550, T500 T400, T400\n\n4GB, Titan RTX, GeForce RTX 2080 Ti, GeForce RTX 2080, Super, GeForce RTX 2080,\n\nGeForce RTX 2070 Super, GeForce RTX 2070, GeForce RTX 2060 Super, GeForce RTX 2060,\n\nGeForce RTX 2500, GeForce GTX 1660 Ti, GeForce GTX 1660 Super, GeForce GTX 1660,\n\nGeForce GTX 1650 Ti, GeForce GTX 1650 Super, GeForce GTX 1650 (G5), GeForce GTX 1650\n\n(G6), GeForce GTX 1650, GeForce GTX 1630, GeForce MX550, GeForce MX450, GeForce\n\nMX430, Tesla V100, Quadro GV100, Titan V GPU, Tesla P100, P40, P4, Quadro GP100, Quadro\n\nP6000, Quadro P5200, Quadro P5000, Quadro P4200, Quadro P4000, Quadro P3200, Quadro\n\nP3000, Quadro P2200, Quadro P2000, Quadro P1000, Quadro P620, Quadro P600, Quadro P520,\n\nQuadro P500, Quadro P400, Titan Xp, Titan X, GeForce GTX 1080 Ti, GeForce GTX 1080,\n\nGeForce GTX 1070 Ti, GeForce GTX 1070, GeForce GTX 1060, GeForce GTX 1050 Ti, GeForce\n\nGTX 1050, GeForce MX300, GeForce MX200, GeForce MX150, Tesla M60, M40, M10, Quadro\n\nM6000 24GB, Quadro M6000 (12GB), Quadro M5000, Quadro M5000M, Quadro M5500,\n\nQuadro M4000, Quadro M4000M, Quadro M3000M, Quadro M2200, Quadro M2000, Quadro\n\nM2000M, Quadro M1200, Quadro M1000M, Quadro M620, Quadro M600M, Quadro M520,\n\nQuadro M500M, NVS 810, Tesla M6, GTX Titan X, GeForce GTX 980Ti, GeForce GTX 980,\n\f Case 7:26-mc-00323-DC Document 1-6 Filed 08/18/26 Page 12 of 20\n\n\n\n\nGeForce GTX 970, GeForce GTX 960, GeForce GTX 980M, GeForce GTX 970M, GeForce GTX\n\n965M, GeForce GTX 960M, GeForce GTX 950M, GeForce GTX 750 Ti, GeForce GTX 750,\n\nGeForce MX130, and GeForce MX110, any and all variations of the aforementioned products\n\n(including at least products having different options for number of GPUs).\n\n 2. The term \u201cNVIDIA GPU-Acceleration Software\u201d means any and all software,\n\nlibraries, toolkits, APIs, SDKs, platforms, orchestration environments, cloud services, or\n\napplication frameworks developed, sold, licensed, maintained, or distributed by NVIDIA\n\nCorporation that are designed for, dependent upon, or enable GPU-accelerated computing,\n\nprocessing, training, inference, rendering, simulation, or analytics. This includes, without\n\nlimitation: CUDA, including the CUDA Toolkit, CUDA Runtime, and all associated APIs;\n\nCUDA-X libraries and modules, including but not limited to cuDNN, cuBLAS, cuSPARSE,\n\ncuFFT, cuTENSOR, cuGraph, cuQuantum, and NCCL; TensorRT, Triton Inference Server, and\n\nother deep learning inference optimization tools; NVIDIA SDK Manager and related deployment\n\nand configuration tools; NVIDIA AI Enterprise, including any included models, NIM\n\nmicroservices, and management utilities; NVIDIA Base Command, Base Command Platform, and\n\nBase Command Manager, including any software components used for managing multi-GPU\n\nclusters or DGX infrastructure; NVIDIA Omniverse, including Omniverse Kit, Omniverse Code,\n\nand extensions for rendering, physics simulation, and synthetic data generation; NVIDIA Isaac\n\nSDK and Isaac Sim, including simulation, perception, planning, and robotics middleware layers;\n\nNVIDIA Drive, including but not limited to DriveWorks, Drive OS, Drive Sim, and associated\n\nautonomous vehicle development toolchains; NVIDIA Clara, including Clara Train, Clara Deploy,\n\nClara Parabricks, and other Clara health, genomics, or imaging tools; NVIDIA NGC (NVIDIA\n\nGPU Cloud), including containerized applications, pretrained models, frameworks, and pipelines\n\f Case 7:26-mc-00323-DC Document 1-6 Filed 08/18/26 Page 13 of 20\n\n\n\n\nmade available through NGC; NVIDIA AI Foundation tools, models, and APIs, including\n\nfoundation models, model training pipelines, retrieval-augmented generation (RAG) systems, or\n\nguardrails; and any other software products, services, packages, APIs, SDKs, or libraries\n\ndeveloped or licensed by NVIDIA that provide, rely on, or facilitate GPU acceleration.\n\n 3. The term \u201cLitigation\u201d means Neural AI, LLC v. NVIDIA Corporation, No. 7:24-cv-\n\n00221-ADA-DTG, filed in the United States District Court for the Western District of Texas on\n\nSeptember 13, 2024, including any and all counterclaims asserted by NVIDIA against Neural AI.\n\n 4. The terms \u201cand\u201d and \u201cor\u201d are not intended to be read disjunctively but rather\n\nconjunctively unless the context of a particular request clearly indicates otherwise. \u201cOr\u201d should be\n\nunderstood to include and encompass \u201cand\u201d; and \u201cand\u201d should be understood to include and\n\nencompass \u201cor.\u201d\n\n 5. The terms \u201cany\u201d or \u201ceach\u201d should be understood to include and encompass \u201call.\u201d\n\n 6. The terms \u201cAsserted Patents\u201d and \u201cPatents-in-Suit\u201d mean U.S. Patent Nos.\n\n8,648,867, RE49,461, and RE48,438. Each reference to the Asserted Patents is intended to include\n\nthe application on which it issued and its entire prosecution history. Any term in these requests\n\nthat is also a claim term in the Asserted Patents is to be accorded its plain and ordinary meaning\n\nas understood in the Asserted Patents and receive any construction determined by the Court.\n\n 7. The term \u201cCommunication(s)\u201d means any transmission of information by any\n\nmeans or medium, including without limitation: (a) any written letter, memorandum, or other\n\ndocument of any kind by mail, courier, other delivery services, telecopy, facsimile, telegraph,\n\nelectronic mail, voicemail, or any other means; (b) any telephone call, whether or not such call\n\nwas by chance or prearranged, formal or informal; and (c) any conversation or meeting between\n\ntwo or more persons, whether or not such contact was by chance or prearranged, formal or\n\f Case 7:26-mc-00323-DC Document 1-6 Filed 08/18/26 Page 14 of 20\n\n\n\n\ninformal.\n\n 8. The terms \u201cconcerning,\u201d \u201crelated to\u201d or \u201crelating to\u201d, and \u201cregarding\u201d and any\n\nvariation of these terms mean analyzing, alluding to, concerning, considering, commenting on,\n\nconsulting, comprising, containing, contradicting, describing, dealing with, discussing,\n\nestablishing, evidencing, identifying, involving, noting, recording, reporting on, relating to,\n\nreflecting, referring to, regarding, stating, showing, studying, mentioning, memorializing, or\n\npertaining to, directly or indirectly, in whole or in part.\n\n 9. The term \u201cCPU(s)\u201d means Central Processing Unit(s).\n\n 10. The term \u201cDocument(s)\u201d shall have the broadest meaning possible under Federal\n\nRules 26 and 34 and shall include without limitation: documents, Electronically Stored\n\nInformation, communications in written, electronic, and recorded form, and tangible things. A\n\ndraft or non-identical copy of a document shall be considered a separate document within the\n\nmeaning of the term \u201cdocument.\u201d Any comment, notation, or other marking shall be sufficient to\n\ndistinguish documents that are otherwise similar in appearance and to make them separate\n\ndocuments for purposes of your response. Any preliminary form, intermediate form, superseded\n\nversion, or amendment of any document is to be considered a separate document.\n\n 11. The term \u201cGPU(s)\u201d means Graphics Processing Unit(s).\n\n 12. The terms \u201cinclude\u201d and \u201cincluding\u201d mean including without limitation.\n\n 13. The term \u201cNeural AI,\u201d \u201cNAI,\u201d or \u201cPlaintiff\u201d means Plaintiff Neural AI, LLC.\n\n 14. The term \u201cNVIDIA\u201d means Defendant NVIDIA Corporation, its predecessors,\n\npresent and former directors, officers, accountants, affiliates, attorneys, partners, managers, agents,\n\nemployees, representatives, in-house and outside counsel, and any other person or entity acting on\n\nbehalf of or under control of Defendant NVIDIA Corporation.\n\f Case 7:26-mc-00323-DC Document 1-6 Filed 08/18/26 Page 15 of 20\n\n\n\n\n 15. The term \u201cperson(s)\u201d means and includes natural persons and formal or informal\n\nentities and organizations, including public and private corporations, partnerships, professional\n\ncorporations, limited liability companies, business trusts, banking institutions, associations, firms,\n\njoint ventures, commissions, bureaus, departments, and any other legal entity, including\n\nany divisions, subsidiaries, departments, and other units thereof.\n\n 16. The term \u201cSource Code\u201d means human-readable instructions written in a\n\nprogramming language, including all comments, annotations, declarations, functions, classes, and\n\nother components used to define the behavior of a software program. For purposes of these\n\ninterrogatories, \u201cSource Code\u201d includes all associated files necessary to understand, compile, and\n\nexecute the code, such as scripts, header files, makefiles, configuration files, and documentation.\n\nUnless otherwise stated, \u201cSource Code\u201d includes all versions and revisions relevant to the time\n\nperiods and subject matter described in each interrogatory.\n\n 17. The term \u201cThird Party\u201d or \u201cThird Parties\u201d means any Person other than You,\n\nNVIDIA, and Neural AI.\n\n 18. The terms \u201cYou,\u201d \u201cYour,\u201d or \u201cCoreWeave\u201d refer to CoreWeave, Inc., including but\n\nnot limited to its predecessors, successors, parents, subsidiaries, divisions, affiliates, and all past\n\nor present directors, officers, partners, managers, employees, contractors, agents, representatives,\n\naccountants, consultants, in-house and outside counsel, and any other person or entity acting or\n\npurporting to act on its behalf or subject to its control. This definition expressly includes, without\n\nlimitation, The Atlantic Crypto Corporation LLC, Atlantic Crypto Corporation, Conductor\n\nTechnologies, Inc., and any other CoreWeave parent, subsidiary, affiliate, or other related entity\n\nthat has used, licensed, deployed, evaluated, or integrated NVIDIA Hardware and/or NVIDIA\n\nSoftware.\n\f Case 7:26-mc-00323-DC Document 1-6 Filed 08/18/26 Page 16 of 20\n\n\n\n\n 19. The use of the singular form of any word includes the plural and vice versa.\n\n 20. These Requests seek the production of all documents, electronically stored\n\ninformation (\u201cESI\u201d), and tangible things in your possession, custody, or control, as that phrase is\n\nused in Federal Rule of Civil Procedure 34, as of the date of compliance with this subpoena and\n\nthat come into your possession, custody, or control at any time prior to production. This includes\n\nmaterials held by You directly, as well as by Your affiliates, subsidiaries, agents, representatives,\n\nor any other person or entity acting on Your behalf.\n\n 21. If You are aware of the existence (past or present) of any responsive documents,\n\nESI, or tangible items that are not in Your current possession, custody, or control, You must\n\nidentify such materials and provide:\n\n a. A description of the item(s);\n\n b. The name and contact information of the person or entity currently believed\n\n to have possession, custody, or control; and\n\n c. The reason You are unable to produce the material(s).\n\n 22. If You believe that no responsive documents, ESI, or tangible things exist in\n\nresponse to a particular request, You must state so in writing with respect to that request.\n\n 23. If You withhold any document, ESI, or portion thereof based on a claim of attorney-\n\nclient privilege, work product doctrine, or any other legal protection, You must produce a privilege\n\nlog that complies with Federal Rule of Civil Procedure 26(b)(5).\n\n 24. You must produce all documents and ESI: as they are kept in the usual course of\n\nbusiness or organized and labeled to correspond to the categories in this subpoena, as required\n\nunder FRCP 34(b)(2)(E); in their native electronic format (with original metadata intact) wherever\n\npossible, or as searchable, OCR-scanned PDFs with corresponding load files; with complete\n\f Case 7:26-mc-00323-DC Document 1-6 Filed 08/18/26 Page 17 of 20\n\n\n\n\nfamily groupings (e.g., attachments must be produced with their parent emails/documents); and in\n\nthe same folders or directories in which they were maintained, preserving original file structures\n\nand naming conventions.\n\n 25. You must maintain and produce a record of the source of each document or ESI\n\nitem produced, including:\n\n a. The file path or directory location;\n\n b. The name of the custodian (individual, team, or department) from whose\n files the document was collected;\n\n c. The system or platform (e.g., email server, shared drive, cloud service) from\n which the document was obtained.\n\nThis information may be provided in metadata load files, a source log, or other mutually agreed\n\nformat. This instruction is consistent with Federal Rule of Civil Procedure 34(b)(2)(E) and\n\nproportional discovery principles under Rule 26(b)(1). If any of the above information is not\n\nreasonably available or unduly burdensome to collect, You must so state and explain the basis for\n\nthat assertion.\n\n 26. For all ESI, You must preserve and produce standard metadata fields, including but\n\nnot limited to: filename, filepath, author, date created, date last modified, recipients, sender,\n\nsubject line (for emails), and document type. You must not degrade or alter metadata through\n\nprocessing or production.\n\n 27. You are under a continuing obligation to supplement or correct Your production if\n\nYou discover or obtain additional responsive materials prior to the close of discovery or the\n\nresolution of this matter.\n\n 28. Unless otherwise stated, the relevant period is from September 13, 2018 to the\n\npresent.\n\n 29. Unless otherwise stated, all requests herein are limited to documents, electronically\n\f Case 7:26-mc-00323-DC Document 1-6 Filed 08/18/26 Page 18 of 20\n\n\n\n\nstored information, and tangible things that relate to NVIDIA GPU-Acceleration Hardware or\n\nNVIDIA GPU-Acceleration Software that were:\n\n a. purchased, acquired, licensed, used, implemented, deployed, tested, or\n evaluated within the United States, or\n\n b. purchased, acquired, licensed, or used for the purpose of supporting,\n enabling, or operating any facility, system, team, data center, personnel,\n product, service, customer, or business activity located in or directed toward\n the United States.\n\nThis instruction is intended to encompass both U.S.-based activity and non-U.S. activity that\n\ndirectly supports or enables U.S. operations or usage.\n\n REQUESTS FOR PRODUCTION OF DOCUMENTS\n\n1. Documents sufficient to identify all types of NVIDIA GPU-Acceleration Hardware purchased,\n\n acquired, or deployed by You.\n\n2. Documents sufficient to identify the quantity, identity, and price of NVIDIA GPU-\n\n Acceleration Hardware (including model numbers) purchased, deployed, tested, or used by\n\n You.\n\n3. Documents sufficient to identify all types of NVIDIA GPU-Acceleration Software acquired,\n\n licensed, or used by You, including from the NGC catalog, NVIDIA AI Enterprise, or\n\n otherwise.\n\n4. Documents sufficient to identify the quantity and identity of NVIDIA GPU-Acceleration\n\n Software (including model numbers) acquired, licensed, or used by You.\n\n5. Documents sufficient to identify any products, features, or services offered by You that\n\n depended on NVIDIA GPU-Acceleration Software or NVIDIA GPU-Acceleration Hardware.\n\f Case 7:26-mc-00323-DC Document 1-6 Filed 08/18/26 Page 19 of 20\n\n\n\n\n6. Documents sufficient to identify all agreements, license terms, purchase orders, or other\n\n transactional documents relating to the acquisition or use of any NVIDIA GPU-Acceleration\n\n Hardware or NVIDIA GPU-Acceleration Software between You and NVIDIA, and the terms\n\n of those agreements.\n\n7. Technical documentation, architectural diagrams, source code excerpts, or internal\n\n presentations sufficient to show how You implemented, incorporated, or otherwise used any\n\n NVIDIA GPU-Acceleration Software in any GPU-accelerated system.\n\n8. Source Code, configuration files, or implementation artifacts sufficient to show how NVIDIA\n\n GPU-Acceleration Software was integrated into Your systems, applications, or software\n\n pipelines.\n\n9. Documents sufficient to show how Your application-layer software invokes or interacts with\n\n NVIDIA GPU-Acceleration Software components, including the types of workloads, models,\n\n or applications executed using NVIDIA GPU-Acceleration Software.\n\n10. Internal development notes, version control records, Git repositories, commit logs, or related\n\n documents sufficient to show all derivative or modified source code created by You based on,\n\n incorporating, extending, or wrapping NVIDIA GPU-Acceleration Software.\n\n11. Documents sufficient to show all uses of NVLink, MIG (Multi-Instance GPU), or any GPU\n\n orchestration software used in conjunction with NVIDIA GPU-Acceleration Software.\n\n12. Communications between You and NVIDIA relating to the setup, integration, customization,\n\n support, or use of any NVIDIA GPU-Acceleration Software.\n\f Case 7:26-mc-00323-DC Document 1-6 Filed 08/18/26 Page 20 of 20\n\n\n\n\n13. Internal documents, presentations, or reports reflecting the performance benefits, functional\n\n improvements, or business value derived from using NVIDIA GPU-Acceleration Software and\n\n NVIDIA GPU-Acceleration Hardware.\n\n14. Revenue, usage, or subscription data for Your services or software platforms that relied on\n\n NVIDIA GPU-Acceleration Software.\n\n15. Benchmark results, technical evaluations, or cost-benefit analyses relating to Your use of\n\n NVIDIA GPU-Acceleration Software and NVIDIA GPU-Acceleration Hardware.\n\n16. Marketing, customer-facing, or internal communications describing or referencing Your\n\n reliance on NVIDIA GPU-Acceleration Software and NVIDIA GPU-Acceleration Hardware\n\n or toolkits for performance, scalability, or innovation.\n\n17. Documents sufficient to identify any third-party software, libraries, or frameworks that were\n\n used alongside or integrated with NVIDIA GPU-Acceleration Software.\n\n18. Documents sufficient to show how NVIDIA GPU-Acceleration Software interacted with other\n\n vendors\u2019 frameworks or toolchains.\n\n19. Internal documentation, including but not limited to wiki pages, collaborative documentation\n\n platforms, engineering knowledge bases, or similar repositories, sufficient to show the design,\n\n development, architecture, technical functionality, or operation of any GPU-accelerated\n\n software, system, or pipeline that uses, incorporates, interfaces with, or was developed in\n\n connection with any NVIDIA GPU-Acceleration Software.\n\n20. All documents and communications between You and NVIDIA, or between You and any Third\n\n Party, referring or relating to Neurala, Inc., Neural AI, or the Litigation, including but not\n\n limited to emails, memoranda, contracts, or agreements.\n\f","ocr_status":1,"date_upload":"2026-08-20T10:23:19.665818-07:00","document_number":"1","attachment_number":6,"pacer_doc_id":"181037219949","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 5","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622538/","id":490622538,"tags":[],"absolute_url":"/docket/74666997/1/7/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.414503-07:00","date_modified":"2026-08-23T01:50:32.103592-07:00","sha1":"c55db5a8ae768827eda7b27e7c55a797e61b5784","page_count":2,"file_size":71643,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.7.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.7.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-7 Filed 08/18/26 Page 1 of 2\n\n\n\n\n EXHIBIT\n\n 6\n\f Case 7:26-mc-00323-DC Document 1-7 Filed 08/18/26 Page 2 of 2\n\n\n\n\n AFFIDAVIT OF SERVICE\n UNITED STATES DISTRICT COURT\n Western District of Texas\n Case Number: 7:24-CV-00221-ADA-\n DTG\n\n Plaintiff:\n Neural Al, LLC\n VS.\n Defendant:\n Nvidia Corporation\n\n For:\n Mark D. Siegmund\n\n Received by Anthony Collins on the 16th day of October, 2025 at 10:16 am to be served on Registered\n Agent for CoreWeave, Inc. National Registered Agents, 1999 Bryan Street, Suite 900, Dallas, Dallas\n County, TX 75201.\n\n I, Anthony Collins, being duly sworn, depose and say that on the 16th day of October, 2025 at 2:55 pm, I:\n\n Executed service by hand delivering a true copy of the Subpoena to Produce Documents, Information,\n or Objects or to Permit Inspection of Premises in a Civil Action; Plaintiff Neural Al, LLC's Notice of\n Service of Subpoena To Coreweave, Inc. (Coreweave); and First Amended Complaint for Patent\n Infringement to: Haile Greenlee , an authorized acceptance agent employed by Registered Agent\n National Registered Agents, Inc., who is authorized to accept service of process for CoreWeave, Inc. ,\n at the address of: 1999 Bryan Street, Suite 900, Dallas, Dallas County, TX 75201, and informed said\n person of the contents therein, in compliance with state statutes.\n\n\n\n \"I certify that I am over the age of 18, have no interest in the above action, and am a Certified Process\n Server in good standing in the judicial circuit in which the process was served. I have personal knowledge\n of the facts set forth in this affidavit, and they are true and correct.\"\n\n\n\n\n Anthony Collins\n PSC-357 Expires 12/31/2025\n Subscribed and Sworn to before me on the 17th day\n of October, 2025 by the affiant who is personally Lexitas\n known to me. 1235 Broadway\n 2nd Floor\n /1,tc )kkav New York, NY 10001\n NOTARY PUBLIC (718) 672-1117\n\n Our Job Serial Number: ONT-2025008959\n Ref: 25283782\n '''''\"''' ERIC JACOB HARRIS\n-:' .,'1,3:t:;-at.,1Notary Public, State of Texas\n ,\" Comm. Expires 08-12-2029 Copyright \u00a9 1992-2025 DreamBuilt Software, LLC. - Process Server's Toolbox V9.0e\n -4,P,T,1\u2022\u2018\u2018 Notary ID 135527875\n\n\n III IIII1 III IIIIIIIIIllIIIIIIIIIIII III\n\f","ocr_status":1,"date_upload":"2026-08-20T10:23:17.677728-07:00","document_number":"1","attachment_number":7,"pacer_doc_id":"181037219950","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 6","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622539/","id":490622539,"tags":[],"absolute_url":"/docket/74666997/1/8/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.435475-07:00","date_modified":"2026-08-23T02:13:37.924935-07:00","sha1":"20e7c58697e38de22693576e7fddba78005028a3","page_count":38,"file_size":234899,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.8.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.8.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 1 of 38\n\n\n\n\n EXHIBIT\n\n 7\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 2 of 38\n\n\n\n\n UNITED STATES DISTRICT COURT\n WESTERN DISTRICT OF TEXAS\n MIDLAND/ODESSA DIVISION\n\n\nNEURAL AI, LLC,\n\n Plaintiff,\n Case No. 7:24-CV-00221-ADA-DTG\n v.\n\nNVIDIA CORPORATION,\n\n Defendant.\n\n\n\n NON-PARTY COREWEAVE, INC.\u2019S OBJECTIONS AND RESPONSES TO PLAINTIFF\n NEURAL AI, LLC\u2019S SUBPOENA TO PRODUCE DOCUMENTS, INFORMATION OR\n OBJECTS\n\n Pursuant to Federal Rule of Civil Procedure 45, non-party CoreWeave, Inc.\n\n (\u201cCoreWeave\u201d), by and through its undersigned counsel, hereby provides the following\n\n objections and responses to the Subpoena to Produce Documents, Information, or Objects, dated\n\n October 15, 2025 (\u201cSubpoena\u201d), issued by Plaintiff Neural AI, LLC (\u201cNeural AI\u201d) in the above-\n\n captioned matter.\n\n GENERAL OBJECTIONS\n\n 1. The following General Objections apply to each and every Request for Production\n\n of Documents (\u201cRequest\u201d) listed in Exhibit A of the Subpoena, and are incorporated by reference\n\n into each individual response as if set forth fully therein. CoreWeave objects to each and every\n\n Request to the extent that it seeks information or documents protected by any applicable\n\n privilege, including but not limited to the attorney-client privilege, the work-product doctrine or\n\n immunity, the joint defense/common interest privilege, and any other applicable privilege,\n\n immunity, or exemption from discovery as outlined in the Federal Rules of Civil Procedure and\n\n 1\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 3 of 38\n\n\n\n\napplicable law. For the sake of clarity, CoreWeave hereby asserts such privileges and/or\n\nexemptions. Any inadvertent disclosures or production of information and/or documents shall\n\nnot be deemed a waiver of any privilege with respect to such information or documents or any\n\nwork product doctrine or immunity that may attach thereto.\n\n 2. CoreWeave objects to each and every Request to the extent it purports to require\n\nthe disclosure of trade secrets or other confidential financial, commercial, strategic, or\n\nproprietary information of third parties. CoreWeave further objects to each and every Definition,\n\nInstruction, and Request to the extent it purports to require CoreWeave to disclose or produce\n\ninformation in violation of a legal or contractual obligation to a third party of nondisclosure or\n\nconfidentiality. Such information will not be disclosed unless the terms of the obligation have\n\nbeen satisfied to permit such disclosure. Further, CoreWeave will only produce such information\n\nsubject to the terms of an appropriate Protective Order to ensure the confidentiality of such\n\ninformation, documents, or materials.\n\n 3. CoreWeave objects to each and every Request to the extent it seeks information\n\nor documents: (1) not relevant to the subject matter of the case; (2) not proportional to the needs\n\nof the case; (3) where the burden or expense outweighs its likely benefit; (4) without providing a\n\nreasonable time period for information sought; or (5) otherwise beyond the scope of relevant\n\ndiscovery.\n\n 4. CoreWeave objects to each and every Request to the extent it seeks duplicative or\n\ncumulative information or documents, on the grounds that such Requests are overly broad,\n\nunduly burdensome, and seek information that is neither relevant to the subject matter of this\n\ncase nor proportional to its needs.\n\n\n\n\n 2\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 4 of 38\n\n\n\n\n 5. CoreWeave objects to any Request that seeks information which either has been\n\nsought or could be sought from NVIDIA or from another source that is more convenient or less\n\nburdensome.\n\n 6. CoreWeave objects to each and every Request to the extent it calls for\n\ninformation that is not ascertainable by means of a reasonably diligent search, including without\n\nlimitation information that is not maintained by CoreWeave in the normal course of business or\n\nthat is no longer maintained by CoreWeave.\n\n 7. CoreWeave further objects to each and every Definition and Request to the extent\n\nthe requested information is already in Neural AI\u2019s possession, is publicly available, or can be\n\nobtained from another source that is more convenient or less burdensome.\n\n 8. CoreWeave objects to each and every Request to the extent it calls for a legal\n\nopinion or conclusion.\n\n 9. CoreWeave objects to each and every Definition, Instruction, and Request to the\n\nextent it seeks information or identification of information not within CoreWeave\u2019s possession,\n\ncustody, or control, or it refers to persons, entities, or events not known to CoreWeave, on the\n\ngrounds that such Definitions, Instructions, and Requests: (1) seek to require more of\n\nCoreWeave than any obligation imposed by law; (2) subject CoreWeave to unreasonable and\n\nundue burden and expense; and (3) seek to impose upon CoreWeave an obligation to investigate\n\nor discover information or materials from third parties or sources that are equally accessible to\n\nNeural AI and/or equally obtainable from more convenient sources.\n\n 10. CoreWeave objects to each and every Definition, Instruction, and Request to the\n\nextent it seeks to impose burdens on CoreWeave that are inconsistent with or not otherwise\n\nauthorized by the Federal Rules of Civil Procedure or any other Orders governing this action.\n\n 3\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 5 of 38\n\n\n\n\n 11. CoreWeave objects to each and every Definition, Instruction, and Request to the\n\nextent it seeks identification of \u201cany\u201d and \u201call\u201d information that refers or relates to a particular\n\nsubject on the grounds of overbreadth, undue burden, and expense.\n\n 12. CoreWeave objects to each and every Request as vague, ambiguous, overly broad,\n\nunduly burdensome to the extent it seeks information that is not relevant to the subject matter of\n\nthis action and/or fails to provide a reasonable time period for documents sought or provides an\n\narbitrary time period.\n\n 13. CoreWeave objects to each and every Request to the extent it uses terms that are\n\nnot defined or understood, or are vaguely or ambiguously defined, and therefore, fail to identify\n\nwith reasonable particularity the information sought. CoreWeave will not speculate as to the\n\nmeaning to ascribe such terms.\n\n 14. CoreWeave objects to each and every Request to the extent it calls for legal\n\nopinion or conclusion, or requires an expert opinion.\n\n 15. CoreWeave objects to the definition of \u201cNVIDIA GPU-Acceleration Hardware\u201d\n\nas vague, ambiguous, overly broad, and unduly burdensome. The definition encompasses an\n\nexpansive and undefined universe of NVIDIA products, including \u201cany and all variations\u201d of the\n\nhundreds of examples listed in the subpoena. CoreWeave objects to each and every Request\n\nusing this term to the extent it fails to describe the information sought with reasonable\n\nparticularity and instead improperly shifts the burden to CoreWeave, a non-party, to identify\n\nwhich of its products or services use any of these numerous NVIDIA devices. Such an obligation\n\nwould require extensive analysis and mapping of CoreWeave\u2019s hardware environment and is\n\nunduly burdensome and disproportionate under Federal Rule of Civil Procedure 45. CoreWeave\n\nfurther objects to the extent this definition seeks information on hardware outside the scope of\n\n 4\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 6 of 38\n\n\n\n\nthis litigation, as such requests are irrelevant and not proportional to the needs of the case, and\n\nimpose an undue burden or a burden that exceeds that contemplated by the Federal Rules of Civil\n\nProcedure. CoreWeave will interpret this term as referring to NVIDIA hardware for GPU\n\nacceleration as CoreWeave understands it for purposes of responding, but will not undertake an\n\nexhaustive identification of all NVIDIA hardware potentially implicated by the definition.\n\n 16. CoreWeave objects to the definition of \u201cNVIDIA GPU-Acceleration Software\u201d as\n\nvague, ambiguous, overly broad, and unduly burdensome. The definition encompasses an\n\nexpansive and undefined universe of NVIDIA software, libraries, toolkits, APIs, SDKs,\n\nplatforms, orchestration environments, cloud services, and application frameworks, including\n\n\u201cany other\u201d products developed or licensed by NVIDIA that \u201cprovide, rely on, or facilitate GPU\n\nacceleration\u201d beyond the dozens of examples listed in the subpoena. CoreWeave objects to each\n\nand every Request using this term to the extent it fails to describe the information sought with\n\nreasonable particularity and instead improperly shifts the burden to CoreWeave, a non-party, to\n\nidentify which of its products or services use any of these numerous NVIDIA software products.\n\nSuch an obligation would require extensive analysis and mapping of CoreWeave\u2019s software\n\nstack and is unduly burdensome and disproportionate under Federal Rule of Civil Procedure 45.\n\nCoreWeave further objects to the extent this definition seeks information on software outside the\n\nscope of this litigation, as such requests are irrelevant and not proportional to the needs of the\n\ncase, and impose an undue burden or a burden that exceeds that contemplated by the Federal\n\nRules of Civil Procedure. CoreWeave will interpret this term as referring to NVIDIA software\n\nfor GPU acceleration as CoreWeave understands it for purposes of responding, but will not\n\nundertake an exhaustive identification of all NVIDIA software potentially implicated by the\n\ndefinition.\n\n 5\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 7 of 38\n\n\n\n\n 17. CoreWeave objects to the definitions of \u201cand,\u201d \u201cor,\u201d \u201cany,\u201d and \u201ceach\u201d as vague,\n\nambiguous, overly broad and unduly burdensome to the extent they purport to give meanings\n\nthat are different from the ordinary English meanings.\n\n 18. CoreWeave objects to the definition of \u201cAsserted Patents\u201d and \u201cPatents-in-Suit\u201d\n\nas vague, ambiguous, overly broad, particularly with respect to the phrase \u201c[e]ach reference to\n\nthe Asserted Patents is intended to include the application on which it issued and its entire\n\nprosecution history.\u201d CoreWeave further objects to this definition to the extent it calls for a legal\n\nconclusion and places undue burden upon CoreWeave, a non-party, to investigate and identify\n\npatent applications that are not asserted in, and not relevant to, this case. CoreWeave will\n\nrespond to these Requests with respect to U.S. Patent Nos. 8,648,867; RE49,461; and RE48,438,\n\nwhich are the only patents specifically identified in the Definitions.\n\n 19. CoreWeave objects to Definition and Instruction No. 6 to the extent it purports to\n\nimpose a burden on CoreWeave, a non-party, to identify which terms in the Requests are claim\n\nterms in the Asserted Patents and to determine or assign a \u201cplain and ordinary meaning as\n\nunderstood in the Asserted Patents.\u201d CoreWeave objects to each and every Request to the extent\n\nit purports to define any term or phrase used in claims of the Asserted Patents.\n\n 20. CoreWeave objects to the definitions of \u201cconcerning,\u201d \u201crelated to,\u201d \u201crelating to,\u201d\n\nand \u201cregarding\u201d and any variation thereof as vague, ambiguous, overly broad and inherently\n\nsubjective. CoreWeave further objects to the definitions as unduly burdensome. The definitions\n\nencompass an indeterminate and expansive range of concepts and synonyms, imposing an\n\nunreasonable obligation on CoreWeave to identify and interpret every possible variation or\n\nnuance of these terms. CoreWeave further objects to the extent these definitions purport to give\n\n\n\n\n 6\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 8 of 38\n\n\n\n\nmeanings that are different from the ordinary English meanings or broaden the scope of\n\ndiscovery beyond what is relevant or proportional to the needs of the case.\n\n 21. CoreWeave objects to the definition of \u201cDocument(s)\u201d as vague, ambiguous,\n\noverly broad and unduly burdensome. CoreWeave further objects to this definition to the extent\n\nit purports to give a meaning that is different from the ordinary English meaning. CoreWeave\n\nfurther objects to any definition or instruction that purports to impose obligations on CoreWeave\n\nto search across Electronically Stored Information (\u201cESI\u201d) or other sources that are not\n\nreasonably accessible due to undue burden or cost. See Definitions and Instructions Nos. 10, 20-\n\n26. Such requirements are overbroad, cumulative, disproportionate to the needs of the case, and\n\nunduly burdensome.\n\n 22. CoreWeave objects to the definitions of \u201cinclude\u201d and \u201cincluding\u201d as vague,\n\nambiguous, overly broad and unduly burdensome to the extent they purport to give meanings\n\nthat are different from the ordinary English meanings.\n\n 23. CoreWeave objects to the definition of \u201cNVIDIA\u201d as overly broad to the extent\n\nthat it includes persons or entities that are separate and distinct from NVIDIA. CoreWeave\n\nfurther objects to the definition of \u201cNVIDIA\u201d as vague, ambiguous, overly broad, unduly\n\nburdensome, and seeking the disclosure of information that is not relevant to the subject matter\n\nof the case and not proportional to the needs of the case. For example, the definition purports to\n\ninclude \u201cits predecessors\u201d and \u201cany other person or entity acting on behalf of or under the control\n\nof Defendant NVIDIA Corporation.\u201d CoreWeave objects to the definition because it would\n\nrequire CoreWeave to make a determination about whether an entity satisfies this definition, or\n\nwould require CoreWeave to have knowledge of matters beyond its custody and control.\n\n\n\n\n 7\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 9 of 38\n\n\n\n\n 24. CoreWeave objects to the definition of \u201cperson\u201d as vague, ambiguous, overly\n\nbroad and unduly burdensome to the extent it purports to give meanings that are different from\n\nthe ordinary English meanings.\n\n 25. CoreWeave objects to the definition of \u201cSource Code\u201d as vague, ambiguous,\n\noverly broad and unduly burdensome to the extent it purports to give meanings that are different\n\nfrom the ordinary English meanings.\n\n 26. CoreWeave objects to the definitions of \u201cYou,\u201d \u201cYour,\u201d and \u201cCoreWeave\u201d as\n\noverly broad to the extent that they include persons or entities that are separate and distinct from\n\nCoreWeave, including predecessors, successors, parents, affiliates, related entities, and \u201cany\n\nother person or entity acting or purporting to act on its behalf or subject to its control.\u201d\n\nCoreWeave further objects to the inclusion of \u201cThe Atlantic Crypto Corporation LLC, Atlantic\n\nCrypto Corporation, Conductor Technologies, Inc.\u201d individually and collectively, as well as any\n\ndissolved or separate entities that are distinct from CoreWeave and/or not within CoreWeave\u2019s\n\npossession, custody, or control. CoreWeave further objects to these definitions as vague,\n\nambiguous, overly broad, unduly burdensome, and seeking the disclosure of information that is\n\nnot relevant to the subject matter of the case and not proportional to the needs of the case,\n\nincluding because they are not limited by time. CoreWeave objects to these definitions because\n\nthey would require CoreWeave to make a determination about whether an entity satisfies this\n\ndefinition, or would require CoreWeave to have knowledge of matters beyond its custody or\n\ncontrol. CoreWeave responds on its behalf only.\n\n 27. CoreWeave objects to Definition and Instruction No. 20 to the extent it purports\n\nto require CoreWeave, a non-party, to search across \u201call\u201d ESI, including materials held by\n\n\u201caffiliates, subsidiaries, agents, representatives\u201d or other persons or entities outside of\n\n 8\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 10 of 38\n\n\n\n\nCoreWeave\u2019s possession, custody, or control. CoreWeave further objects to this instruction to\n\nthe extent it purports to require CoreWeave to search for ESI or other sources that are not\n\nreasonably accessible due to undue burden or cost. Such requirements are overbroad, cumulative,\n\ndisproportionate to the needs of the case and unduly burdensome. CoreWeave objects to this\n\ninstruction to the extent that it seeks to expand the scope of discovery beyond what is relevant or\n\nnecessary.\n\n 28. CoreWeave objects to Definition and Instruction No. 21 as overly broad, unduly\n\nburdensome, and seeking the disclosure of information that is not relevant to the subject matter\n\nof this case and not proportional to the needs of the case. CoreWeave further objects to the extent\n\nthis instruction imposes an undue burden or a burden that exceeds that contemplated by the\n\nFederal Rule of Civil Procedure 45(e)(1).\n\n 29. CoreWeave objects to Definition and Instruction No. 23 seeking a privilege log as\n\noverly broad, unduly burdensome, and seeking the disclosure of information that is not relevant\n\nto the subject matter of this case and not proportional to the needs of the case. CoreWeave\n\nfurther objects to the extent this instruction imposes an undue burden or a burden that exceeds\n\nthat contemplated by the Federal Rule of Civil Procedure 45(e)(2).\n\n 30. CoreWeave objects to Definition and Instruction No. 25 seeking, among other\n\nthings, a source log as overly broad, unduly burdensome, and seeking the disclosure of\n\ninformation that is not relevant to the subject matter of this case and not proportional to the needs\n\nof the case. Federal Rule of Civil Procedure 34(b)(2)(E) does not impose a duty upon non-parties\n\nto \u201cproduce a record of the source of each document or ESI item.\u201d CoreWeave further objects to\n\nthe extent this instruction imposes an undue burden or a burden that exceeds that contemplated\n\nby the Federal Rule of Civil Procedure 45(e)(1).\n\n 9\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 11 of 38\n\n\n\n\n 31. CoreWeave objects to Definition and Instruction No. 27 to the extent it purports\n\nto impose a burden on CoreWeave, a non-party, to supplement its responses to these Requests.\n\n 32. CoreWeave objects to Definition and Instruction No. 29 as overly broad, unduly\n\nburdensome, and seeking the disclosure of information that is not relevant to the subject matter\n\nof this case and not proportional to the needs of the case.\n\n 33. CoreWeave objects to each and every Request as overbroad and unduly\n\nburdensome to the extent that it requests information outside of a time period and geographic\n\nlocation relevant to the underlying action.\n\n 34. CoreWeave objects to each and every Request to the extent it calls for\n\nCoreWeave to prepare documents and/or things that do not already exist, or calls for documents\n\nand/or things in a format other than that in which they are ordinarily kept by CoreWeave.\n\nCoreWeave will not create new documents or things to respond to any Request.\n\n 35. A response that CoreWeave is willing to provide responsive non-privileged\n\ninformation or documents does not mean that such information or documents exist, or that such\n\ninformation or documents, if they exist, are admissible, relevant or proportional to the needs of\n\nthe case.\n\n 36. CoreWeave incorporates by reference the foregoing General Objections in its\n\nspecific response to each and every Request. CoreWeave may repeat a General Objection for\n\nemphasis or for some other reason. The failure to repeat any such objection with respect to a\n\nparticular Request does not waive that objection. Any specific objections to the following\n\nRequests are in addition to, and not in lieu of, the foregoing General Objections. CoreWeave\n\ndoes not waive its right to amend its objections.\n\n\n\n\n 10\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 12 of 38\n\n\n\n\n RESPONSE TO DOCUMENT REQUESTS\n\nREQUEST FOR PRODUCTION NO. 1:\n\n Documents sufficient to identify all types of NVIDIA GPU-Acceleration Hardware\n\npurchased, acquired, or deployed by You.\n\nRESPONSE TO REQUEST FOR PRODUCTION NO. 1:\n\n CoreWeave incorporates by reference the foregoing General Objections as though fully\n\nset forth herein. CoreWeave objects to this Request as overly broad, unduly burdensome, and\n\nseeking the disclosure of information that is not relevant to this action. CoreWeave objects to this\n\nRequest to the extent it seeks information or documents that are not proportional to the needs of\n\nthe case, and where the burden or expense outweighs its likely benefit. CoreWeave objects to\n\nthis Request to the extent it purports to impose a burden on CoreWeave, a non-party, to produce\n\ndocuments that are a matter of public record, or are otherwise equally available to Neural AI or\n\nobtainable from another source that is more convenient or less burdensome, including NVIDIA,\n\na party to this litigation. CoreWeave objects to this Request to the extent it seeks documents not\n\nwithin its possession, custody, or control. CoreWeave expressly incorporates herein its more\n\ndetailed objection to the definition of \u201cNVIDIA GPU-Acceleration Hardware,\u201d set forth in\n\nParagraph 15 above. CoreWeave objects to this Request as vague, ambiguous, overly broad, and\n\nunduly burdensome in its use of the phrase \u201cpurchased, acquired, or deployed by You.\u201d\n\nCoreWeave further objects to the extent the Request seeks materials that are cumulative,\n\nirrelevant, disproportionate to the needs of the case, or impose an undue burden to locate and\n\nproduce. CoreWeave objects to this Request to the extent it seeks information or documents\n\nprotected by the attorney-client privilege, work product doctrine or immunity, joint defense\n\nprivilege, common interest doctrine, and/or similar privilege.\n\n\n 11\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 13 of 38\n\n\n\n\n Subject to and without waiving the foregoing General and Specific Objections,\n\nCoreWeave responds that it will not search for or produce documents reflecting acquisition or\n\npurchase records, as such information is more appropriately obtained from NVIDIA and/or Dell\n\nas the source of those records. Based on its understanding of this Request, CoreWeave will\n\nproduce responsive, non-privileged documents sufficient to identify CoreWeave commercial\n\nproducts that use NVIDIA hardware for GPU acceleration, to the extent such documents exist,\n\nare reasonably accessible within CoreWeave\u2019s possession, custody, or control, and can be found\n\nafter a reasonable search.\n\nREQUEST FOR PRODUCTION NO. 2:\n\n Documents sufficient to identify the quantity, identity, and price of NVIDIA GPU-\n\nAcceleration Hardware (including model numbers) purchased, deployed, tested, or used by You.\n\nRESPONSE TO REQUEST FOR PRODUCTION NO. 2:\n\n CoreWeave incorporates by reference the foregoing General Objections as though fully\n\nset forth herein. CoreWeave objects to this Request as overly broad, unduly burdensome, and\n\nseeking the disclosure of information that is not relevant to this action. CoreWeave objects to this\n\nRequest to the extent it seeks information or documents that are not proportional to the needs of\n\nthe case, and where the burden or expense outweighs its likely benefit. CoreWeave objects to\n\nthis Request to the extent it purports to impose a burden on CoreWeave, a non-party, to produce\n\ndocuments that are a matter of public record, or are otherwise equally available to Neural AI or\n\nobtainable from another source that is more convenient or less burdensome, including NVIDIA,\n\na party to this litigation. CoreWeave objects to this Request to the extent it seeks documents not\n\nwithin its possession, custody, or control. CoreWeave expressly incorporates herein its more\n\ndetailed objection to the definition of \u201cNVIDIA GPU-Acceleration Hardware,\u201d set forth in\n\n 12\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 14 of 38\n\n\n\n\nParagraph 15 above. CoreWeave objects to this Request as vague, ambiguous, overly broad, and\n\nunduly burdensome in its use of the phrase \u201cpurchased, deployed, tested, or used by You.\u201d\n\nCoreWeave further objects to the extent the Request seeks materials that are cumulative,\n\nirrelevant, or impose an undue burden to locate and produce. CoreWeave objects to this Request\n\nto the extent it calls for information which is confidential, or proprietary to, or the trade secrets\n\nof, a third party, or which CoreWeave is under an obligation and/or duty to a third party not to\n\ndisclose. CoreWeave objects to this Request to the extent it seeks information or documents\n\nprotected by the attorney-client privilege, work product doctrine or immunity, joint defense\n\nprivilege, common interest doctrine, and/or similar privilege.\n\n Subject to and without waiving the foregoing General and Specific Objections,\n\nCoreWeave responds that it will not search for or produce documents reflecting purchase\n\nrecords, as such information is more appropriately obtained from NVIDIA and/or Dell as the\n\nsource of those records. Based on its understanding of this Request, CoreWeave will produce\n\nresponsive, non-privileged documents sufficient to identify CoreWeave commercial products\n\nthat use NVIDIA hardware for GPU acceleration, to the extent such documents exist, are\n\nreasonably accessible within CoreWeave\u2019s possession, custody, or control, and can be found\n\nafter a reasonable search.\n\nREQUEST FOR PRODUCTION NO. 3:\n\n Documents sufficient to identify all types of NVIDIA GPU-Acceleration Software\n\nacquired, licensed, or used by You, including from the NGC catalog, NVIDIA AI Enterprise, or\n\notherwise.\n\n\n\n\n 13\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 15 of 38\n\n\n\n\nRESPONSE TO REQUEST FOR PRODUCTION NO. 3:\n\n CoreWeave incorporates by reference the foregoing General Objections as though fully\n\nset forth herein. CoreWeave objects to this Request as overly broad, unduly burdensome, and\n\nseeking the disclosure of information that is not relevant to this action. CoreWeave objects to this\n\nRequest to the extent it seeks information or documents that are not proportional to the needs of\n\nthe case, and where the burden or expense outweighs its likely benefit. CoreWeave objects to\n\nthis Request to the extent it purports to impose a burden on CoreWeave, a non-party, to produce\n\ndocuments that are a matter of public record, or are otherwise equally available to Neural AI or\n\nobtainable from another source that is more convenient or less burdensome, including NVIDIA,\n\na party to this litigation. CoreWeave objects to this Request to the extent it seeks documents not\n\nwithin its possession, custody, or control. CoreWeave expressly incorporates herein its more\n\ndetailed objection to the definition of \u201cNVIDIA GPU-Acceleration Software,\u201d set forth in\n\nParagraph 16 above. CoreWeave objects to this Request as vague, ambiguous, overly broad, and\n\nunduly burdensome in its use of the phrase \u201cacquired, licensed, or used by You.\u201d CoreWeave\n\nfurther objects to the extent the Request seeks materials that are cumulative, irrelevant, or impose\n\nan undue burden to locate and produce. CoreWeave objects to this Request to the extent it calls\n\nfor information which is confidential, or proprietary to, or the trade secrets of, a third party, or\n\nwhich CoreWeave is under an obligation and/or duty to a third party not to disclose. CoreWeave\n\nobjects to this Request to the extent it seeks information or documents protected by the attorney-\n\nclient privilege, work product doctrine or immunity, joint defense privilege, common interest\n\ndoctrine, and/or similar privilege.\n\n Subject to and without waiving the foregoing General and Specific Objections,\n\nCoreWeave responds that it will not search for or produce documents reflecting acquisition or\n\n 14\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 16 of 38\n\n\n\n\nlicensing records, as such information is more appropriately obtained from NVIDIA and/or Dell\n\nas the source of those records. Based on its understanding of this Request, CoreWeave will\n\nproduce responsive, non-privileged documents sufficient to identify CoreWeave commercial\n\nproducts that use NVIDIA software for GPU acceleration, to the extent such documents exist, are\n\nreasonably accessible within CoreWeave\u2019s possession, custody, or control, and can be found\n\nafter a reasonable search.\n\nREQUEST FOR PRODUCTION NO. 4:\n\n Documents sufficient to identify the quantity and identity of NVIDIA GPU-Acceleration\n\nSoftware (including model numbers) acquired, licensed, or used by You.\n\nRESPONSE TO REQUEST FOR PRODUCTION NO. 4:\n\n CoreWeave incorporates by reference the foregoing General Objections as though fully\n\nset forth herein. CoreWeave objects to this Request as overly broad, unduly burdensome, and\n\nseeking the disclosure of information that is not relevant to this action. CoreWeave objects to this\n\nRequest to the extent it seeks information or documents that are not proportional to the needs of\n\nthe case, and where the burden or expense outweighs its likely benefit. CoreWeave objects to\n\nthis Request to the extent it purports to impose a burden on CoreWeave, a non-party, to produce\n\ndocuments that are a matter of public record, or are otherwise equally available to Neural AI or\n\nobtainable from another source that is more convenient or less burdensome, including NVIDIA,\n\na party to this litigation. CoreWeave objects to this Request to the extent it seeks documents not\n\nwithin its possession, custody, or control. CoreWeave expressly incorporates herein its more\n\ndetailed objection to the definition of \u201cNVIDIA GPU-Acceleration Software,\u201d set forth in\n\nParagraph 16 above. CoreWeave objects to this Request as vague, ambiguous, overly broad, and\n\nunduly burdensome in its use of the phrase \u201cacquired, licensed, or used by You.\u201d CoreWeave\n\n 15\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 17 of 38\n\n\n\n\nfurther objects to the extent the Request seeks materials that are cumulative, irrelevant, or impose\n\nan undue burden to locate and produce. CoreWeave objects to this Request to the extent it calls\n\nfor information which is confidential, or proprietary to, or the trade secrets of, a third party, or\n\nwhich CoreWeave is under an obligation and/or duty to a third party not to disclose. CoreWeave\n\nobjects to this Request to the extent it seeks information or documents protected by the attorney-\n\nclient privilege, work product doctrine or immunity, joint defense privilege, common interest\n\ndoctrine, and/or similar privilege.\n\n Subject to and without waiving the foregoing General and Specific Objections,\n\nCoreWeave responds that it will not search for or produce documents reflecting acquisition or\n\nlicensing records, as such information is more appropriately obtained from NVIDIA and/or Dell\n\nas the source of those records. Based on its understanding of this Request, CoreWeave will\n\nproduce responsive, non-privileged documents sufficient to identify CoreWeave commercial\n\nproducts that use NVIDIA software for GPU acceleration, to the extent such documents exist, are\n\nreasonably accessible within CoreWeave\u2019s possession, custody, or control, and can be found\n\nafter a reasonable search.\n\nREQUEST FOR PRODUCTION NO. 5:\n\n Documents sufficient to identify any products, features, or services offered by You that\n\ndepended on NVIDIA GPU-Acceleration Software or NVIDIA GPU-Acceleration Hardware.\n\nRESPONSE TO REQUEST FOR PRODUCTION NO. 5:\n\n CoreWeave incorporates by reference the foregoing General Objections as though fully\n\nset forth herein. CoreWeave objects to this Request as overly broad, unduly burdensome, and\n\nseeking the disclosure of information that is not relevant to this action. CoreWeave objects to this\n\nRequest to the extent it seeks information or documents that are not proportional to the needs of\n\n 16\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 18 of 38\n\n\n\n\nthe case, and where the burden or expense outweighs its likely benefit. CoreWeave objects to\n\nthis Request to the extent it purports to impose a burden on CoreWeave, a non-party, to produce\n\ndocuments that are a matter of public record, or are otherwise equally available to Neural AI or\n\nobtainable from another source that is more convenient or less burdensome, including NVIDIA,\n\na party to this litigation. CoreWeave objects to this Request to the extent it seeks documents not\n\nwithin its possession, custody, or control. CoreWeave expressly incorporates herein its more\n\ndetailed objection to the definitions of \u201cNVIDIA GPU-Acceleration Software\u201d and \u201cNVIDIA\n\nGPU-Acceleration Hardware,\u201d set forth in Paragraphs 15 and 16 above. CoreWeave objects to\n\nthis Request as vague, ambiguous, overly broad, and unduly burdensome in its use of the phrase\n\n\u201cdepended on.\u201d CoreWeave further objects to the extent the Request seeks materials that are\n\ncumulative, irrelevant, disproportionate to the needs of the case, or impose an undue burden to\n\nlocate and produce. CoreWeave objects to this Request to the extent it seeks information or\n\ndocuments protected by the attorney-client privilege, work product doctrine or immunity, joint\n\ndefense privilege, common interest doctrine, and/or similar privilege.\n\n Subject to and without waiving the foregoing General and Specific Objections,\n\nCoreWeave responds that, based on its understanding of this Request, CoreWeave will produce\n\nresponsive, non-privileged documents sufficient to identify CoreWeave commercial products\n\nthat use NVIDIA hardware or software for GPU acceleration, to the extent such documents exist,\n\nare reasonably accessible within CoreWeave\u2019s possession, custody, or control, and can be found\n\nafter a reasonable search.\n\nREQUEST FOR PRODUCTION NO. 6:\n\n Documents sufficient to identify all agreements, license terms, purchase orders, or other\n\ntransactional documents relating to the acquisition or use of any NVIDIA GPU-Acceleration\n\n 17\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 19 of 38\n\n\n\n\nHardware or NVIDIA GPU-Acceleration Software between You and NVIDIA, and the terms of\n\nthose agreements.\n\nRESPONSE TO REQUEST FOR PRODUCTION NO. 6:\n\n CoreWeave incorporates by reference the foregoing General Objections as though fully\n\nset forth herein. CoreWeave objects to this Request as overly broad, unduly burdensome, and\n\nseeking the disclosure of information that is not relevant to this action. CoreWeave objects to this\n\nRequest to the extent it seeks information or documents that are not proportional to the needs of\n\nthe case, and where the burden or expense outweighs its likely benefit. CoreWeave objects to\n\nthis Request to the extent it purports to impose a burden on CoreWeave, a non-party, to produce\n\ndocuments that are a matter of public record, or are otherwise equally available to Neural AI or\n\nobtainable from another source that is more convenient or less burdensome, including NVIDIA,\n\na party to this litigation. CoreWeave objects to this Request to the extent it seeks documents not\n\nwithin its possession, custody, or control. CoreWeave expressly incorporates herein its more\n\ndetailed objection to the definitions of \u201cNVIDIA GPU-Acceleration Hardware\u201d and \u201cNVIDIA\n\nGPU-Acceleration Software,\u201d set forth in Paragraphs 15 and 16 above. CoreWeave objects to\n\nthis Request as vague, ambiguous, overly broad, and unduly burdensome in its use of the terms\n\n\u201cagreements,\u201d \u201cacquisition,\u201d \u201cuse,\u201d and the phrase \u201cother transactional documents.\u201d CoreWeave\n\nfurther objects to the extent the Request seeks materials that are cumulative, irrelevant, or impose\n\nan undue burden to locate and produce. For example, the Request uses the term \u201call.\u201d\n\nCoreWeave objects to this Request to the extent it seeks information or documents protected by\n\nthe attorney-client privilege, work product doctrine or immunity, joint defense privilege,\n\ncommon interest doctrine, and/or similar privilege.\n\n\n\n\n 18\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 20 of 38\n\n\n\n\n Subject to and without waiving the foregoing General and Specific Objections,\n\nCoreWeave responds that it will not search for or produce licensing or purchase records between\n\nCoreWeave and NVIDIA, as such information is more appropriately obtained from NVIDIA as\n\nthe source of those records.\n\nREQUEST FOR PRODUCTION NO. 7:\n\n Technical documentation, architectural diagrams, source code excerpts, or internal\n\npresentations sufficient to show how You implemented, incorporated, or otherwise used any\n\nNVIDIA GPU-Acceleration Software in any GPU-accelerated system.\n\nRESPONSE TO REQUEST FOR PRODUCTION NO. 7:\n\n CoreWeave incorporates by reference the foregoing General Objections as though fully\n\nset forth herein. CoreWeave objects to this Request as overly broad, unduly burdensome, and\n\nseeking the disclosure of information that is not relevant to this action. CoreWeave objects to this\n\nRequest to the extent it seeks information or documents that are not proportional to the needs of\n\nthe case, and where the burden or expense outweighs its likely benefit. CoreWeave objects to\n\nthis Request to the extent it purports to impose a burden on CoreWeave, a non-party, to produce\n\ndocuments that are a matter of public record, or are otherwise equally available to Neural AI or\n\nobtainable from another source that is more convenient or less burdensome, including NVIDIA,\n\na party to this litigation. CoreWeave objects to this Request to the extent it seeks documents not\n\nwithin its possession, custody, or control. CoreWeave expressly incorporates herein its more\n\ndetailed objection to the definition of \u201cNVIDIA GPU-Acceleration Software,\u201d set forth in\n\nParagraph 16 above. CoreWeave objects to this Request as vague, ambiguous, overly broad, and\n\nunduly burdensome in its use of the phrases \u201cor otherwise used\u201d and \u201cany GPU-accelerated\n\nsystem.\u201d CoreWeave further objects to the extent the Request seeks materials that are\n\n 19\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 21 of 38\n\n\n\n\ncumulative, irrelevant, or impose an undue burden to locate and produce. CoreWeave objects to\n\nthe Request to the extent it seeks source code excerpts or other highly sensitive, proprietary\n\nmaterials, which are unnecessary to satisfy the stated purpose of this Request. CoreWeave\n\nobjects to this Request to the extent it seeks information or documents protected by the attorney-\n\nclient privilege, work product doctrine or immunity, joint defense privilege, common interest\n\ndoctrine, and/or similar privilege.\n\n Subject to and without waiving the foregoing General and Specific Objections,\n\nCoreWeave responds that, based on its understanding of this Request, CoreWeave will produce\n\nresponsive, non-privileged high-level technical documentation sufficient to demonstrate how\n\nCoreWeave may have implemented or incorporated NVIDIA software for GPU acceleration in\n\nits commercial products, to the extent such documents exist, are reasonably accessible within\n\nCoreWeave\u2019s possession, custody, or control, and can be found after a reasonable search.\n\nREQUEST FOR PRODUCTION NO. 8:\n\n Source Code, configuration files, or implementation artifacts sufficient to show how\n\nNVIDIA GPU-Acceleration Software was integrated into Your systems, applications, or\n\nsoftware pipelines.\n\nRESPONSE TO REQUEST FOR PRODUCTION NO. 8:\n\n CoreWeave incorporates by reference the foregoing General Objections as though fully\n\nset forth herein. CoreWeave objects to this Request as overly broad, unduly burdensome, and\n\nseeking the disclosure of information that is not relevant to this action. CoreWeave objects to this\n\nRequest to the extent it seeks information or documents that are not proportional to the needs of\n\nthe case, and where the burden or expense outweighs its likely benefit. CoreWeave objects to\n\nthis Request to the extent it purports to impose a burden on CoreWeave, a non-party, to produce\n\n 20\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 22 of 38\n\n\n\n\ndocuments that are a matter of public record, or are otherwise equally available to Neural AI or\n\nobtainable from another source that is more convenient or less burdensome, including NVIDIA,\n\na party to this litigation. CoreWeave objects to this Request to the extent it seeks documents not\n\nwithin its possession, custody, or control. CoreWeave expressly incorporates herein its more\n\ndetailed objection to the definition of \u201cNVIDIA GPU-Acceleration Software,\u201d set forth in\n\nParagraph 16 above. CoreWeave objects to this Request as vague, ambiguous, overly broad, and\n\nunduly burdensome in its use of the phrase \u201cYour systems, applications, or software pipelines.\u201d\n\nCoreWeave further objects to the extent the Request seeks materials that are cumulative,\n\nirrelevant, or impose an undue burden to locate and produce. CoreWeave objects to the Request\n\nto the extent it seeks source code, configuration files, or implementation artifacts, which are\n\nhighly sensitive, proprietary, and unnecessary to satisfy the stated purpose of this Request.\n\nCoreWeave objects to this Request to the extent it seeks information or documents protected by\n\nthe attorney-client privilege, work product doctrine or immunity, joint defense privilege,\n\ncommon interest doctrine, and/or similar privilege.\n\n Subject to and without waiving the foregoing General and Specific Objections,\n\nCoreWeave responds that, based on its understanding of this Request, CoreWeave will produce\n\nresponsive, non-privileged high-level technical documentation sufficient to demonstrate how\n\nCoreWeave may have integrated NVIDIA software for GPU acceleration in its commercial\n\nproducts, to the extent such documents exist, are reasonably accessible within CoreWeave\u2019s\n\npossession, custody, or control, and can be found after a reasonable search.\n\n\n\n\n 21\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 23 of 38\n\n\n\n\nREQUEST FOR PRODUCTION NO. 9:\n\n Documents sufficient to show how Your application-layer software invokes or interacts\n\nwith NVIDIA GPU-Acceleration Software components, including the types of workloads,\n\nmodels, or applications executed using NVIDIA GPU-Acceleration Software.\n\nRESPONSE TO REQUEST FOR PRODUCTION NO. 9:\n\n CoreWeave incorporates by reference the foregoing General Objections as though fully\n\nset forth herein. CoreWeave objects to this Request as overly broad, unduly burdensome, and\n\nseeking the disclosure of information that is not relevant to this action. CoreWeave objects to this\n\nRequest to the extent it seeks information or documents that are not proportional to the needs of\n\nthe case, and where the burden or expense outweighs its likely benefit. CoreWeave objects to\n\nthis Request to the extent it purports to impose a burden on CoreWeave, a non-party, to produce\n\ndocuments that are a matter of public record, or are otherwise equally available to Neural AI or\n\nobtainable from another source that is more convenient or less burdensome, including NVIDIA,\n\na party to this litigation. CoreWeave objects to this Request to the extent it seeks documents not\n\nwithin its possession, custody, or control. CoreWeave expressly incorporates herein its more\n\ndetailed objection to the definition of \u201cNVIDIA GPU-Acceleration Software,\u201d set forth in\n\nParagraph 16 above. CoreWeave objects to this Request as vague, ambiguous, overly broad, and\n\nunduly burdensome in its use of the terms \u201cinvokes,\u201d \u201cinteracts,\u201d \u201cworkloads,\u201d \u201cmodels,\u201d\n\n\u201capplications,\u201d \u201cexecuted,\u201d and the phrase \u201cNVIDIA GPU-Acceleration Software components.\u201d\n\nCoreWeave further objects to the extent the Request seeks materials that are cumulative,\n\nirrelevant, or impose an undue burden to locate and produce. CoreWeave objects to this Request\n\nto the extent it seeks information or documents protected by the attorney-client privilege, work\n\n\n\n\n 22\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 24 of 38\n\n\n\n\nproduct doctrine or immunity, joint defense privilege, common interest doctrine, and/or similar\n\nprivilege.\n\n Subject to and without waiving the foregoing General and Specific Objections,\n\nCoreWeave responds that, based on its understanding of this Request, CoreWeave will produce\n\nresponsive, non-privileged high-level technical documentation sufficient to demonstrate how\n\nCoreWeave application-layer software included in its commercial products may interact with\n\nNVIDIA software for GPU acceleration, to the extent such documents exist, are reasonably\n\naccessible within CoreWeave\u2019s possession, custody, or control, and can be found after a\n\nreasonable search.\n\nREQUEST FOR PRODUCTION NO. 10:\n\n Internal development notes, version control records, Git repositories, commit logs, or\n\nrelated documents sufficient to show all derivative or modified source code created by You\n\nbased on, incorporating, extending, or wrapping NVIDIA GPU-Acceleration Software.\n\nRESPONSE TO REQUEST FOR PRODUCTION NO. 10:\n\n CoreWeave incorporates by reference the foregoing General Objections as though fully\n\nset forth herein. CoreWeave objects to this Request as overly broad, unduly burdensome, and\n\nseeking the disclosure of information that is not relevant to this action. CoreWeave objects to this\n\nRequest to the extent it seeks information or documents that are not proportional to the needs of\n\nthe case, and where the burden or expense outweighs its likely benefit. CoreWeave objects to\n\nthis Request to the extent it purports to impose a burden on CoreWeave, a non-party, to produce\n\ndocuments that are a matter of public record, or are otherwise equally available to Neural AI or\n\nobtainable from another source that is more convenient or less burdensome, including NVIDIA,\n\na party to this litigation. CoreWeave objects to this Request to the extent it seeks documents not\n\n 23\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 25 of 38\n\n\n\n\nwithin its possession, custody, or control. CoreWeave expressly incorporates herein its more\n\ndetailed objection to the definition of \u201cNVIDIA GPU-Acceleration Software,\u201d set forth in\n\nParagraph 16 above. CoreWeave objects to this Request as vague, ambiguous, overly broad, and\n\nunduly burdensome in its use of the phrase \u201call derivative and modified source code,\u201d and the\n\nterms \u201cbased on,\u201d \u201cincorporating,\u201d \u201cextending,\u201d and \u201cwrapping.\u201d CoreWeave further objects to\n\nthe extent the Request seeks materials that are cumulative, irrelevant, or impose an undue burden\n\nto locate and produce. CoreWeave objects to the Request to the extent it seeks source code,\n\nversion control notes, Git repositories, or commit logs, which are highly sensitive, proprietary,\n\nand unnecessary to satisfy the stated purpose of this Request. CoreWeave objects to this Request\n\nto the extent it seeks information or documents protected by the attorney-client privilege, work\n\nproduct doctrine or immunity, joint defense privilege, common interest doctrine, and/or similar\n\nprivilege.\n\n Subject to and without waiving the foregoing General and Specific Objections,\n\nCoreWeave responds that it is willing to meet and confer regarding the scope and relevance of\n\nthis Request.\n\nREQUEST FOR PRODUCTION NO. 11:\n\n Documents sufficient to show all uses of NV Link, MIG (Multi-Instance GPU), or any\n\nGPU orchestration software used in conjunction with NVIDIA GPU-Acceleration Software.\n\nRESPONSE TO REQUEST FOR PRODUCTION NO. 11:\n\n CoreWeave incorporates by reference the foregoing General Objections as though fully\n\nset forth herein. CoreWeave objects to this Request as overly broad, unduly burdensome, and\n\nseeking the disclosure of information that is not relevant to this action. CoreWeave objects to this\n\nRequest to the extent it seeks information or documents that are not proportional to the needs of\n\n 24\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 26 of 38\n\n\n\n\nthe case, and where the burden or expense outweighs its likely benefit. CoreWeave objects to\n\nthis Request to the extent it purports to impose a burden on CoreWeave, a non-party, to produce\n\ndocuments that are a matter of public record, or are otherwise equally available to Neural AI or\n\nobtainable from another source that is more convenient or less burdensome, including NVIDIA,\n\na party to this litigation. CoreWeave objects to this Request to the extent it seeks documents not\n\nwithin its possession, custody, or control. CoreWeave expressly incorporates herein its more\n\ndetailed objection to the definition of \u201cNVIDIA GPU-Acceleration Software,\u201d set forth in\n\nParagraph 16 above. CoreWeave objects to this Request as vague, ambiguous, overly broad, and\n\nunduly burdensome in its use of phrase \u201cany GPU orchestration software.\u201d CoreWeave further\n\nobjects to the extent the Request seeks materials that are cumulative, irrelevant, or impose an\n\nundue burden to locate and produce. For example, the Request uses the term \u201call.\u201d CoreWeave\n\nobjects to this Request to the extent it seeks information or documents protected by the attorney-\n\nclient privilege, work product doctrine or immunity, joint defense privilege, common interest\n\ndoctrine, and/or similar privilege.\n\n Subject to and without waiving the foregoing General and Specific Objections,\n\nCoreWeave responds that, based on its understanding of this Request, CoreWeave will produce\n\nresponsive, non-privileged documents sufficient to identify whether CoreWeave utilized NV\n\nLink or MIG in conjunction with NVIDIA software for GPU acceleration in its commercial\n\nproducts, to the extent such documents exist, are reasonably accessible within CoreWeave\u2019s\n\npossession, custody, or control, and can be found after a reasonable search.\n\nREQUEST FOR PRODUCTION NO. 12:\n\n Communications between You and NVIDIA relating to the setup, integration,\n\ncustomization, support, or use of any NVIDIA GPU-Acceleration Software.\n\n 25\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 27 of 38\n\n\n\n\nRESPONSE TO REQUEST FOR PRODUCTION NO. 12:\n\n CoreWeave incorporates by reference the foregoing General Objections as though fully\n\nset forth herein. CoreWeave objects to this Request as overly broad, unduly burdensome, and\n\nseeking the disclosure of information that is not relevant to this action. CoreWeave objects to this\n\nRequest to the extent it seeks information or documents that are not proportional to the needs of\n\nthe case, and where the burden or expense outweighs its likely benefit. CoreWeave objects to\n\nthis Request to the extent it purports to impose a burden on CoreWeave, a non-party, to produce\n\ndocuments that are a matter of public record, or are otherwise equally available to Neural AI or\n\nobtainable from another source that is more convenient or less burdensome, including NVIDIA,\n\na party to this litigation. CoreWeave objects to this Request to the extent it seeks documents not\n\nwithin its possession, custody, or control. CoreWeave expressly incorporates herein its more\n\ndetailed objection to the definition of \u201cNVIDIA GPU-Acceleration Software,\u201d set forth in\n\nParagraph 16 above. CoreWeave objects to this Request as vague, ambiguous, overly broad, and\n\nunduly burdensome in its use of terms \u201ccommunications,\u201d \u201csetup,\u201d \u201cintegration,\u201d\n\n\u201ccustomization,\u201d and \u201csupport.\u201d CoreWeave further objects to the extent the Request seeks\n\nmaterials that are cumulative, irrelevant, or impose an undue burden to locate and produce.\n\nCoreWeave objects to this Request to the extent it seeks information or documents protected by\n\nthe attorney-client privilege, work product doctrine or immunity, joint defense privilege,\n\ncommon interest doctrine, and/or similar privilege.\n\n Subject to and without waiving the foregoing General and Specific Objections,\n\nCoreWeave responds that it will not search for or produce documents reflecting communications\n\nwith NVIDIA, as such information is more appropriately obtained from NVIDIA.\n\n\n\n\n 26\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 28 of 38\n\n\n\n\nREQUEST FOR PRODUCTION NO. 13:\n\n Internal documents, presentations, or reports reflecting the performance benefits,\n\nfunctional improvements, or business value derived from using NVIDIA GPU-Acceleration\n\nSoftware and NVIDIA GPU-Acceleration Hardware.\n\nRESPONSE TO REQUEST FOR PRODUCTION NO. 13:\n\n CoreWeave incorporates by reference the foregoing General Objections as though fully\n\nset forth herein. CoreWeave objects to this Request as overly broad, unduly burdensome, and\n\nseeking the disclosure of information that is not relevant to this action. CoreWeave objects to this\n\nRequest to the extent it seeks information or documents that are not proportional to the needs of\n\nthe case, and where the burden or expense outweighs its likely benefit. CoreWeave objects to\n\nthis Request to the extent it purports to impose a burden on CoreWeave, a non-party, to produce\n\ndocuments that are a matter of public record, or are otherwise equally available to Neural AI or\n\nobtainable from another source that is more convenient or less burdensome, including NVIDIA,\n\na party to this litigation. CoreWeave objects to this Request to the extent it seeks documents not\n\nwithin its possession, custody, or control. CoreWeave expressly incorporates herein its more\n\ndetailed objection to the definitions of \u201cNVIDIA GPU-Acceleration Hardware\u201d and \u201cNVIDIA\n\nGPU-Acceleration Software,\u201d set forth in Paragraphs 15 and 16 above. CoreWeave objects to\n\nthis Request as vague, ambiguous, overly broad, and unduly burdensome in its use of the phrase\n\n\u201cbusiness value.\u201d CoreWeave further objects to the extent the Request seeks materials that are\n\ncumulative, irrelevant, or impose an undue burden to locate and produce. CoreWeave objects to\n\nthis Request to the extent it calls for information which is confidential, or proprietary to, or the\n\ntrade secrets of, a third party, or which CoreWeave is under an obligation and/or duty to a third\n\nparty not to disclose. CoreWeave objects to this Request to the extent it seeks information or\n\n 27\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 29 of 38\n\n\n\n\ndocuments protected by the attorney-client privilege, work product doctrine or immunity, joint\n\ndefense privilege, common interest doctrine, and/or similar privilege.\n\n Subject to and without waiving the foregoing General and Specific Objections,\n\nCoreWeave responds that it will not search for or produce documents that may be responsive to\n\nthis Request, as such information is more appropriately obtained from NVIDIA.\n\nREQUEST FOR PRODUCTION NO. 14:\n\n Revenue, usage, or subscription data for Your services or software platforms that relied\n\non NVIDIA GPU-Acceleration Software.\n\nRESPONSE TO REQUEST FOR PRODUCTION NO. 14:\n\n CoreWeave incorporates by reference the foregoing General Objections as though fully\n\nset forth herein. CoreWeave objects to this Request as overly broad, unduly burdensome, and\n\nseeking the disclosure of information that is not relevant to this action. CoreWeave objects to this\n\nRequest to the extent it seeks information or documents that are not proportional to the needs of\n\nthe case, and where the burden or expense outweighs its likely benefit. CoreWeave objects to\n\nthis Request to the extent it purports to impose a burden on CoreWeave, a non-party, to produce\n\ndocuments that are a matter of public record, or are otherwise equally available to Neural AI or\n\nobtainable from another source that is more convenient or less burdensome, including NVIDIA,\n\na party to this litigation. CoreWeave objects to this Request to the extent it seeks documents not\n\nwithin its possession, custody, or control. CoreWeave expressly incorporates herein its more\n\ndetailed objection to the definition of \u201cNVIDIA GPU-Acceleration Software,\u201d set forth in\n\nParagraph 16 above. CoreWeave objects to this Request as vague, ambiguous, overly broad, and\n\nunduly burdensome in its use of the phrase \u201crelied on.\u201d CoreWeave further objects to the extent\n\nthe Request seeks materials that are cumulative, irrelevant, or impose an undue burden to locate\n\n 28\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 30 of 38\n\n\n\n\nand produce. CoreWeave objects to this Request to the extent it calls for information which is\n\nconfidential, or proprietary to, or the trade secrets of, a third party, or which CoreWeave is under\n\nan obligation and/or duty to a third party not to disclose. CoreWeave objects to this Request to\n\nthe extent it seeks information or documents protected by the attorney-client privilege, work\n\nproduct doctrine or immunity, joint defense privilege, common interest doctrine, and/or similar\n\nprivilege.\n\n Subject to and without waiving the foregoing General and Specific Objections,\n\nCoreWeave responds that it is willing to meet and confer regarding the scope and relevance of\n\nthis Request.\n\nREQUEST FOR PRODUCTION NO. 15:\n\n Benchmark results, technical evaluations, or cost-benefit analyses relating to Your use of\n\nNVIDIA GPU-Acceleration Software and NVIDIA GPU-Acceleration Hardware.\n\nRESPONSE TO REQUEST FOR PRODUCTION NO. 15:\n\n CoreWeave incorporates by reference the foregoing General Objections as though fully\n\nset forth herein. CoreWeave objects to this Request as overly broad, unduly burdensome, and\n\nseeking the disclosure of information that is not relevant to this action. CoreWeave objects to this\n\nRequest to the extent it seeks information or documents that are not proportional to the needs of\n\nthe case, and where the burden or expense outweighs its likely benefit. CoreWeave objects to\n\nthis Request to the extent it purports to impose a burden on CoreWeave, a non-party, to produce\n\ndocuments that are a matter of public record, or are otherwise equally available to Neural AI or\n\nobtainable from another source that is more convenient or less burdensome, including NVIDIA,\n\na party to this litigation. CoreWeave objects to this Request to the extent it seeks documents not\n\nwithin its possession, custody, or control. CoreWeave expressly incorporates herein its more\n\n 29\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 31 of 38\n\n\n\n\ndetailed objection to the definitions of \u201cNVIDIA GPU-Acceleration Hardware\u201d and \u201cNVIDIA\n\nGPU-Acceleration Software,\u201d set forth in Paragraphs 15 and 16 above. CoreWeave objects to\n\nthis Request as vague, ambiguous, overly broad, and unduly burdensome in its use of the phrase\n\n\u201crelied on.\u201d CoreWeave further objects to the extent the Request seeks materials that are\n\ncumulative, irrelevant, or impose an undue burden to locate and produce. CoreWeave objects to\n\nthis Request to the extent it calls for information which is confidential, or proprietary to, or the\n\ntrade secrets of, a third party, or which CoreWeave is under an obligation and/or duty to a third\n\nparty not to disclose. CoreWeave objects to this Request to the extent it seeks information or\n\ndocuments protected by the attorney-client privilege, work product doctrine or immunity, joint\n\ndefense privilege, common interest doctrine, and/or similar privilege.\n\n Subject to and without waiving the foregoing General and Specific Objections,\n\nCoreWeave responds that it will not search for or produce documents that may be responsive to\n\nthis Request, as such information is more appropriately obtained from NVIDIA.\n\nREQUEST FOR PRODUCTION NO. 16:\n\n Marketing, customer-facing, or internal communications describing or referencing Your\n\nreliance on NVIDIA GPU-Acceleration Software and NVIDIA GPU-Acceleration Hardware or\n\ntoolkits for performance, scalability, or innovation.\n\nRESPONSE TO REQUEST FOR PRODUCTION NO. 16:\n\n CoreWeave incorporates by reference the foregoing General Objections as though fully\n\nset forth herein. CoreWeave objects to this Request as overly broad, unduly burdensome, and\n\nseeking the disclosure of information that is not relevant to this action. CoreWeave objects to this\n\nRequest to the extent it seeks information or documents that are not proportional to the needs of\n\nthe case, and where the burden or expense outweighs its likely benefit. CoreWeave objects to\n\n 30\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 32 of 38\n\n\n\n\nthis Request to the extent it purports to impose a burden on CoreWeave, a non-party, to produce\n\ndocuments that are a matter of public record, or are otherwise equally available to Neural AI or\n\nobtainable from another source that is more convenient or less burdensome, including NVIDIA,\n\na party to this litigation. CoreWeave objects to this Request to the extent it seeks documents not\n\nwithin its possession, custody, or control. CoreWeave expressly incorporates herein its more\n\ndetailed objection to the definitions of \u201cNVIDIA GPU-Acceleration Hardware\u201d and \u201cNVIDIA\n\nGPU-Acceleration Software,\u201d set forth in Paragraphs 15 and 16 above. CoreWeave objects to\n\nthis Request as vague, ambiguous, overly broad, and unduly burdensome in its use of the phrases\n\n\u201creliance on\u201d and \u201ctoolkits for performance, scalability, or innovation.\u201d CoreWeave further\n\nobjects to the extent the Request seeks materials that are cumulative, irrelevant, or impose an\n\nundue burden to locate and produce. CoreWeave objects to this Request to the extent it calls for\n\ninformation which is confidential, or proprietary to, or the trade secrets of, a third party, or which\n\nCoreWeave is under an obligation and/or duty to a third party not to disclose. CoreWeave objects\n\nto this Request to the extent it seeks information or documents protected by the attorney-client\n\nprivilege, work product doctrine or immunity, joint defense privilege, common interest doctrine,\n\nand/or similar privilege.\n\n Subject to and without waiving the foregoing General and Specific Objections,\n\nCoreWeave responds that, based on its understanding of this Request, CoreWeave will produce\n\nresponsive, non-privileged marketing materials referencing the use of NVIDIA hardware or\n\nsoftware for GPU acceleration in CoreWeave\u2019s commercial products, to the extent such\n\ndocuments exist, are reasonably accessible within CoreWeave\u2019s possession, custody, or control,\n\nand can be found after a reasonable search.\n\n\n\n\n 31\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 33 of 38\n\n\n\n\nREQUEST FOR PRODUCTION NO. 17:\n\n Documents sufficient to identify any third-party software, libraries, or frameworks that\n\nwere used alongside or integrated with NVIDIA GPU-Acceleration Software.\n\nRESPONSE TO REQUEST FOR PRODUCTION NO. 17:\n\n CoreWeave incorporates by reference the foregoing General Objections as though fully\n\nset forth herein. CoreWeave objects to this Request as overly broad, unduly burdensome, and\n\nseeking the disclosure of information that is not relevant to this action. CoreWeave objects to this\n\nRequest to the extent it seeks information or documents that are not proportional to the needs of\n\nthe case, and where the burden or expense outweighs its likely benefit. CoreWeave objects to\n\nthis Request to the extent it purports to impose a burden on CoreWeave, a non-party, to produce\n\ndocuments that are a matter of public record, or are otherwise equally available to Neural AI or\n\nobtainable from another source that is more convenient or less burdensome, including NVIDIA,\n\na party to this litigation. CoreWeave objects to this Request to the extent it seeks documents not\n\nwithin its possession, custody, or control. CoreWeave expressly incorporates herein its more\n\ndetailed objection to the definitions of \u201cNVIDIA GPU-Acceleration Software,\u201d set forth in\n\nParagraph 16 above. CoreWeave objects to this Request as vague, ambiguous, overly broad, and\n\nunduly burdensome in its use of the phrase \u201cany third-party software, libraries, or frameworks\n\nthat were used alongside or integrated with NVIDIA GPU-Acceleration Software,\u201d including\n\nbecause the Request is facially not limited to use or integration by CoreWeave. CoreWeave\n\nfurther objects to the extent the Request seeks materials that are cumulative, irrelevant, or impose\n\nan undue burden to locate and produce. CoreWeave objects to this Request to the extent it seeks\n\ninformation or documents protected by the attorney-client privilege, work product doctrine or\n\nimmunity, joint defense privilege, common interest doctrine, and/or similar privilege.\n\n 32\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 34 of 38\n\n\n\n\n On the basis of the foregoing General and Specific Objections, CoreWeave will not\n\nsearch for or produce documents that may be responsive to this Request.\n\nREQUEST FOR PRODUCTION NO. 18:\n\n Documents sufficient to show how NVIDIA GPU-Acceleration Software interacted with\n\nother vendors' frameworks or toolchains.\n\nRESPONSE TO REQUEST FOR PRODUCTION NO. 18:\n\n CoreWeave incorporates by reference the foregoing General Objections as though fully\n\nset forth herein. CoreWeave objects to this Request as overly broad, unduly burdensome, and\n\nseeking the disclosure of information that is not relevant to this action. CoreWeave objects to this\n\nRequest to the extent it seeks information or documents that are not proportional to the needs of\n\nthe case, and where the burden or expense outweighs its likely benefit. CoreWeave objects to\n\nthis Request to the extent it purports to impose a burden on CoreWeave, a non-party, to produce\n\ndocuments that are a matter of public record, or are otherwise equally available to Neural AI or\n\nobtainable from another source that is more convenient or less burdensome, including NVIDIA,\n\na party to this litigation. CoreWeave objects to this Request to the extent it seeks documents not\n\nwithin its possession, custody, or control. CoreWeave expressly incorporates herein its more\n\ndetailed objection to the definitions of \u201cNVIDIA GPU-Acceleration Software,\u201d set forth in\n\nParagraph 16 above. CoreWeave objects to this Request as vague, ambiguous, overly broad, and\n\nunduly burdensome in its use of the phrase \u201cother vendors\u2019 frameworks or toolchains,\u201d including\n\nbecause the Request is facially not relevant to CoreWeave\u2019s conduct. CoreWeave further objects\n\nto the extent the Request seeks materials that are cumulative, irrelevant, or impose an undue\n\nburden to locate and produce. CoreWeave objects to this Request to the extent it seeks\n\n\n\n\n 33\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 35 of 38\n\n\n\n\ninformation or documents protected by the attorney-client privilege, work product doctrine or\n\nimmunity, joint defense privilege, common interest doctrine, and/or similar privilege.\n\n On the basis of the foregoing General and Specific Objections, CoreWeave will not\n\nsearch for or produce documents that may be responsive to this Request.\n\nREQUEST FOR PRODUCTION NO. 19:\n\n Internal documentation, including but not limited to wiki pages, collaborative\n\ndocumentation platforms, engineering knowledge bases, or similar repositories, sufficient to\n\nshow the design, development, architecture, technical functionality, or operation of any GPU-\n\naccelerated software, system, or pipeline that uses, incorporates, interfaces with, or was\n\ndeveloped in connection with any NVIDIA GPU-Acceleration Software.\n\nRESPONSE TO REQUEST FOR PRODUCTION NO. 19:\n\n CoreWeave incorporates by reference the foregoing General Objections as though fully\n\nset forth herein. CoreWeave objects to this Request as overly broad, unduly burdensome, and\n\nseeking the disclosure of information that is not relevant to this action. CoreWeave objects to this\n\nRequest to the extent it seeks information or documents that are not proportional to the needs of\n\nthe case, and where the burden or expense outweighs its likely benefit. CoreWeave objects to\n\nthis Request to the extent it purports to impose a burden on CoreWeave, a non-party, to produce\n\ndocuments that are a matter of public record, or are otherwise equally available to Neural AI or\n\nobtainable from another source that is more convenient or less burdensome, including NVIDIA,\n\na party to this litigation. CoreWeave objects to this Request to the extent it seeks documents not\n\nwithin its possession, custody, or control. CoreWeave expressly incorporates herein its more\n\ndetailed objection to the definitions of \u201cNVIDIA GPU-Acceleration Software,\u201d set forth in\n\nParagraph 16 above. CoreWeave objects to this Request as vague, ambiguous, overly broad, and\n\n 34\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 36 of 38\n\n\n\n\nunduly burdensome in its use of the phrase \u201cany GPU-accelerated software, system, or pipeline,\u201d\n\nincluding because the Request is not limited to use or development by CoreWeave. CoreWeave\n\nfurther objects to the extent the Request seeks materials that are cumulative, irrelevant, or impose\n\nan undue burden to locate and produce. CoreWeave objects to this Request to the extent it seeks\n\ninformation or documents protected by the attorney-client privilege, work product doctrine or\n\nimmunity, joint defense privilege, common interest doctrine, and/or similar privilege.\n\n On the basis of the foregoing General and Specific Objections, CoreWeave will not\n\nsearch for or produce documents that may be responsive to this Request.\n\nREQUEST FOR PRODUCTION NO. 20:\n\n All documents and communications between You and NVIDIA, or between You and any\n\nThird Party, referring or relating to Neurala, Inc., Neural AI, or the Litigation, including but not\n\nlimited to emails, memoranda, contracts, or agreements.\n\nRESPONSE TO REQUEST FOR PRODUCTION NO. 20:\n\n CoreWeave incorporates by reference the foregoing General Objections as though fully\n\nset forth herein. CoreWeave objects to this Request as overly broad, unduly burdensome, and\n\nseeking the disclosure of information that is not relevant to this action. CoreWeave objects to this\n\nRequest to the extent it seeks information or documents that are not proportional to the needs of\n\nthe case, and where the burden or expense outweighs its likely benefit. CoreWeave objects to\n\nthis Request to the extent it purports to impose a burden on CoreWeave, a non-party, to produce\n\ndocuments that are obtainable from another source that is more convenient or less burdensome,\n\nincluding NVIDIA, a party to this litigation. CoreWeave objects to this Request as overly broad,\n\nunduly burdensome, and disproportionate to the needs of the case to the extent it seeks \u201call\n\ndocuments and communications\u201d between CoreWeave and any Third Party. CoreWeave objects\n\n 35\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 37 of 38\n\n\n\n\nto this Request to the extent it seeks information or documents protected by the attorney-client\n\nprivilege, work product doctrine or immunity, joint defense privilege, common interest doctrine,\n\nand/or similar privilege.\n\n On the basis of the foregoing General and Specific Objections, CoreWeave will not\n\nsearch for or produce documents that may be responsive to this Request.\n\n\n\nDated: December 1, 2025 /s/ Olivia T. Nguyen_____________\n\n Olivia T. Nguyen\n FISH AND RICHARDSON P.C.\n 500 Arguello Street, Suite 400\n Redwood City, CA 94063\n Telephone: (650) 839-5070\n Facsimile: (650) 839-5071\n onguyen@fr.com\n\n Adam Kessel\n FISH AND RICHARDSON P.C.\n One Marina Park Drive, Suite 1700\n Boston, MA 02210\n Telephone: (617) 542-5070\n Facsimile: (617) 542-8906\n kessel@fr.com\n\n ATTORNEYS FOR NON-PARTY\n COREWEAVE, INC.\n\n\n\n\n 36\n\f Case 7:26-mc-00323-DC Document 1-8 Filed 08/18/26 Page 38 of 38\n\n\n\n\n CERTIFICATE OF SERVICE\n\n The undersigned hereby certifies that a true and correct copy of the above and foregoing\n\ndocument has been served on December 1, 2025, via electronic mail to the following counsel of\n\nrecord:\n\nTLaiche@susmangodfrey.com\nRMagni@susmangodfrey.com\nTLusztig@susmangodfrey.com\nBMelton@susmangodfrey.com\nMTribble@susmangodfrey.com\nEPortuguese@susmangodfrey.com\nSDrezdzon@susmangodfrey.com\nEGrant@susmangodfrey.com\n /s/ Olivia T. Nguyen\n Olivia T. Nguyen\n\n\n\n\n 37\n\f","ocr_status":1,"date_upload":"2026-08-20T10:23:23.963930-07:00","document_number":"1","attachment_number":8,"pacer_doc_id":"181037219951","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 7","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622540/","id":490622540,"tags":[],"absolute_url":"/docket/74666997/1/9/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.462001-07:00","date_modified":"2026-08-23T01:29:02.738148-07:00","sha1":"90fcf57e97c907e85a4fc5aebe10b3452269fd8c","page_count":13,"file_size":1756529,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.9.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.9.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-9 Filed 08/18/26 Page 1 of 13\n\n\n\n\n EXHIBIT\n\n 8\n\f Case 7:26-mc-00323-DC Document 1-9 Filed 08/18/26 Page 2 of 13\n\n\n\n\n UNITED STATES DISTRICT COURT\n WESTERN DISTRICT OF TEXAS\n MIDLAND/ODESSA DIVISION\n\n\nNEURAL AI, LLC,\n\n Plaintiff, Civil Action No. 7:24-cv-00221-ADA-DTG\n\n v. JURY TRIAL DEMANDED\n\nNVIDIA CORPORATION,\n\n Defendant.\n\n\n PLAINTIFF NEURAL AI, LLC\u2019S NOTICE OF SERVICE\n OF SUBPOENA TO COREWEAVE, INC.\n\n PLEASE TAKE NOTICE that Plaintiff Neural AI, LLC (\u201cNeural AI\u201d) will serve a\n\nSubpoena for Testimony on CoreWeave, Inc. (\u201cCoreWeave\u201d), attached hereto as Attachment 1.\n\nDated: June 24, 2026\n\n\n Respectfully submitted,\n\n /s/ Emily Portuguese\n Max L. Tribble\n Texas State Bar 20213950\n Brian D. Melton\n Texas State Bar 24010620\n Rocco Magni\n Texas State Bar 24092745\n Samuel Drezdzon\n Texas State Bar 24117374\n SUSMAN GODFREY L.L.P.\n 1000 Louisiana\n Suite 5100\n Houston, TX 77002\n Telephone: (713) 651-9366\n Facsimile: (713) 654-6666\n mtribble@susmangodfrey.com\n bmelton@susmangodfrey.com\n rmagni@susmangodfrey.com\n\fCase 7:26-mc-00323-DC Document 1-9 Filed 08/18/26 Page 3 of 13\n\n\n\n\n sdrezdzon@susmangodfrey.com\n\n Tamar Lusztig\n NY State Bar 5125174\n Emily Portuguese\n NY State Bar 5920327\n One Manhattan West, 50th Floor\n New York, NY 10001\n tlusztig@susmangodfrey.com\n eportuguese@susmangodfrey.com\n\n Tanner Laiche\n WA State Bar 5125174\n 401 Union Street, Suite 3000\n Seattle, WA 98101\n tlaiche@susmangodfrey.com\n\n Mark D. Siegmund\n Texas State Bar No. 24117055\n CHERRY JOHSON SIEGMUND\n JAMES PC\n Bridgeview Center\n 7901 Fish Pond Road, 2nd Floor\n Waco, Texas 76710\n msiegmund@cjsjlaw.com\n\n Max Ciccarelli\n Texas State Bar No. 00787242\n CICCARELLI LAW FIRM LLC\n 100 N. 6th Street, Suite 502\n Waco, Texas 76701\n Max@CiccarelliLawFirm.com\n\n Attorneys for Plaintiff Neural AI, LLC\n\f Case 7:26-mc-00323-DC Document 1-9 Filed 08/18/26 Page 4 of 13\n\n\n\n\n CERTIFICATE OF SERVICE\n\n\n I certify that on June 24, 2026 a true and correct copy of Neural AI\u2019s Subpoena for\n\nTestimony on CoreWeave has been served all counsel of record electronically.\n\n\n /s/ Emily Portuguese\n Emily Portuguese\n\fCase 7:26-mc-00323-DC Document 1-9 Filed 08/18/26 Page 5 of 13\n\n\n\n\n Attachment 1\n\f Case 7:26-mc-00323-DC Document 1-9 Filed 08/18/26 Page 6 of 13\n AO 88A (Rev. 02/14) Subpoena to Testify at a Deposition in a Civil Action\n\n\n UNITED STATES DISTRICT COURT\n for the\n Western District of __________\n __________ Texas\n\n NeuralAl,\n Nerual AI,LLC\n LLC )\n Plaintiff )\n v. ) Civil Action No. 7:24-cv-00221-ADA-DTG\n NVIDIA Corporation )\n )\n Defendant )\n\n SUBPOENA TO TESTIFY AT A DEPOSITION IN A CIVIL ACTION\n CoreWeave, Inc.\n To: Google LLC\n c/o National Registered Agents, 1999 Bryan St., Ste. 900, Dallas, TX 75201\n c/o Corporation Service Company DBA CSC- Lawyers Inc, 211 E. 7th Street, Suite 620, Austin, TX 78701\n (Name of person to whom this subpoena is directed)\n\n Testimony: YOU ARE COMMANDED to appear at the time, date, and place set forth below to testify at a\n deposition to be taken in this civil action. If you are an organization, you must designate one or more officers, directors,\n or managing agents, or designate other persons who consent to testify on your behalf about the following matters, or\n those set forth in an attachment:\n See Exhibit A.\n\n\n Place: Planet Depos - Downtown Austin c/o Lexitas Legal, Date and Time:\n 100 Congress Ave, Ste. 2000, Austin, TX 78701 07/21/2026 9:00 am\n\n\n The deposition will be recorded by this method: audio, video, and stenographic means\n\n 0 Production: You, or your representatives, must also bring with you to the deposition the following documents,\n electronically stored information, or objects, and must permit inspection, copying, testing, or sampling of the\n material:\n\n\n\n\n The following provisions of Fed. R. Civ. P. 45 are attached \u2013 Rule 45(c), relating to the place of compliance;\n Rule 45(d), relating to your protection as a person subject to a subpoena; and Rule 45(e) and (g), relating to your duty to\n respond to this subpoena and the potential consequences of not doing so.\n\n Date: 06/24/2026\n CLERK OF COURT\n OR\n /s/ Emily Portuguese\n Signature of Clerk or Deputy Clerk Attorney\u2019s signature\n\n The name, address, e-mail address, and telephone number of the attorney representing (name of party)\n Neural Al, LLC , who issues or requests this subpoena, are:\n Emily Portuguese, Susman Godfrey LLP, One Manhattan West, 50th Floor, New York, New York 10001\neportuguese\u00aesusmangodfi'ey.com, 212-729-2082\n Notice to the person who issues or requests this subpoena\n If this subpoena commands the production of documents, electronically stored information, or tangible things before\n trial, a notice and a copy of the subpoena must be served on each party in this case before it is served on the person to\n whom it is directed. Fed. R. Civ. P. 45(a)(4).\n\f Case 7:26-mc-00323-DC Document 1-9 Filed 08/18/26 Page 7 of 13\nAO 88A (Rev. 02/14) Subpoena to Testify at a Deposition in a Civil Action (Page 2)\n\nCivil Action No. 7:24-cv-00221-ADA-DTG\n\n PROOF OF SERVICE\n (This section should not be filed with the court unless required by Fed. R. Civ. P. 45.)\n\n I received this subpoena for (name of individual and title, if any)\non (date) .\n\n 0 I served the subpoena by delivering a copy to the named individual as follows:\n\n\n on (date) ; or\n\n 0 I returned the subpoena unexecuted because:\n .\n\n Unless the subpoena was issued on behalf of the United States, or one of its officers or agents, I have also\n tendered to the witness the fees for one day\u2019s attendance, and the mileage allowed by law, in the amount of\n $ .\n\nMy fees are $ for travel and $ for services, for a total of $ 0.00 .\n\n\n I declare under penalty of perjury that this information is true.\n\n\nDate:\n Server\u2019s signature\n\n\n\n Printed name and title\n\n\n\n\n Server\u2019s address\n\nAdditional information regarding attempted service, etc.:\n\f Case 7:26-mc-00323-DC Document 1-9 Filed 08/18/26 Page 8 of 13\n\nAO 88A (Rev. 02/14) Subpoena to Testify at a Deposition in a Civil Action (Page 3)\n\n Federal Rule of Civil Procedure 45 (c), (d), (e), and (g) (Effective 12/1/13)\n(c) Place of Compliance. (i) disclosing a trade secret or other confidential research, development,\n or commercial information; or\n (1) For a Trial, Hearing, or Deposition. A subpoena may command a (ii) disclosing an unretained expert\u2019s opinion or information that does\nperson to attend a trial, hearing, or deposition only as follows: not describe specific occurrences in dispute and results from the expert\u2019s\n (A) within 100 miles of where the person resides, is employed, or study that was not requested by a party.\nregularly transacts business in person; or (C) Specifying Conditions as an Alternative. In the circumstances\n (B) within the state where the person resides, is employed, or regularly described in Rule 45(d)(3)(B), the court may, instead of quashing or\ntransacts business in person, if the person modifying a subpoena, order appearance or production under specified\n (i) is a party or a party\u2019s officer; or conditions if the serving party:\n (ii) is commanded to attend a trial and would not incur substantial (i) shows a substantial need for the testimony or material that cannot be\nexpense. otherwise met without undue hardship; and\n (ii) ensures that the subpoenaed person will be reasonably compensated.\n (2) For Other Discovery. A subpoena may command:\n (A) production of documents, electronically stored information, or (e) Duties in Responding to a Subpoena.\ntangible things at a place within 100 miles of where the person resides, is\nemployed, or regularly transacts business in person; and (1) Producing Documents or Electronically Stored Information. These\n (B) inspection of premises at the premises to be inspected. procedures apply to producing documents or electronically stored\n information:\n(d) Protecting a Person Subject to a Subpoena; Enforcement. (A) Documents. A person responding to a subpoena to produce documents\n must produce them as they are kept in the ordinary course of business or\n (1) Avoiding Undue Burden or Expense; Sanctions. A party or attorney must organize and label them to correspond to the categories in the demand.\nresponsible for issuing and serving a subpoena must take reasonable steps (B) Form for Producing Electronically Stored Information Not Specified.\nto avoid imposing undue burden or expense on a person subject to the If a subpoena does not specify a form for producing electronically stored\nsubpoena. The court for the district where compliance is required must information, the person responding must produce it in a form or forms in\nenforce this duty and impose an appropriate sanction\u2014which may include which it is ordinarily maintained or in a reasonably usable form or forms.\nlost earnings and reasonable attorney\u2019s fees\u2014on a party or attorney who (C) Electronically Stored Information Produced in Only One Form. The\nfails to comply. person responding need not produce the same electronically stored\n information in more than one form.\n (2) Command to Produce Materials or Permit Inspection. (D) Inaccessible Electronically Stored Information. The person\n (A) Appearance Not Required. A person commanded to produce responding need not provide discovery of electronically stored information\ndocuments, electronically stored information, or tangible things, or to from sources that the person identifies as not reasonably accessible because\npermit the inspection of premises, need not appear in person at the place of of undue burden or cost. On motion to compel discovery or for a protective\nproduction or inspection unless also commanded to appear for a deposition, order, the person responding must show that the information is not\nhearing, or trial. reasonably accessible because of undue burden or cost. If that showing is\n (B) Objections. A person commanded to produce documents or tangible made, the court may nonetheless order discovery from such sources if the\nthings or to permit inspection may serve on the party or attorney designated requesting party shows good cause, considering the limitations of Rule\nin the subpoena a written objection to inspecting, copying, testing, or 26(b)(2)(C). The court may specify conditions for the discovery.\nsampling any or all of the materials or to inspecting the premises\u2014or to\nproducing electronically stored information in the form or forms requested. (2) Claiming Privilege or Protection.\nThe objection must be served before the earlier of the time specified for (A) Information Withheld. A person withholding subpoenaed information\ncompliance or 14 days after the subpoena is served. If an objection is made, under a claim that it is privileged or subject to protection as trial-preparation\nthe following rules apply: material must:\n (i) At any time, on notice to the commanded person, the serving party (i) expressly make the claim; and\nmay move the court for the district where compliance is required for an (ii) describe the nature of the withheld documents, communications, or\norder compelling production or inspection. tangible things in a manner that, without revealing information itself\n (ii) These acts may be required only as directed in the order, and the privileged or protected, will enable the parties to assess the claim.\norder must protect a person who is neither a party nor a party\u2019s officer from (B) Information Produced. If information produced in response to a\nsignificant expense resulting from compliance. subpoena is subject to a claim of privilege or of protection as\n trial-preparation material, the person making the claim may notify any party\n (3) Quashing or Modifying a Subpoena. that received the information of the claim and the basis for it. After being\n notified, a party must promptly return, sequester, or destroy the specified\n (A) When Required. On timely motion, the court for the district where information and any copies it has; must not use or disclose the information\ncompliance is required must quash or modify a subpoena that: until the claim is resolved; must take reasonable steps to retrieve the\n information if the party disclosed it before being notified; and may promptly\n (i) fails to allow a reasonable time to comply; present the information under seal to the court for the district where\n (ii) requires a person to comply beyond the geographical limits compliance is required for a determination of the claim. The person who\nspecified in Rule 45(c); produced the information must preserve the information until the claim is\n (iii) requires disclosure of privileged or other protected matter, if no resolved.\nexception or waiver applies; or\n (iv) subjects a person to undue burden. (g) Contempt.\n (B) When Permitted. To protect a person subject to or affected by a The court for the district where compliance is required\u2014and also, after a\nsubpoena, the court for the district where compliance is required may, on motion is transferred, the issuing court\u2014may hold in contempt a person\nmotion, quash or modify the subpoena if it requires: who, having been served, fails without adequate excuse to obey the\n subpoena or an order related to it.\n\n\n For access to subpoena materials, see Fed. R. Civ. P. 45(a) Committee Note (2013).\n\f Case 7:26-mc-00323-DC Document 1-9 Filed 08/18/26 Page 9 of 13\n\n\n\n\n EXHIBIT A\n\n DEFINITIONS AND INSTRUCTIONS\n\n 1. The term \u201cNVIDIA GPUs\u201d means the Hopper, Ada Lovelace, Ampere, Turing,\n\nVolta, Pascal, Maxwell, Jetson, and Blackwell architectures of NVIDIA graphics processing units.\n\nFor avoidance of doubt, those architectures include the following devices: DGX line of\n\nsupercomputers and servers (including at least DGX B300, DGX B200, DGX GB200, DGX\n\nGB300, DGX Spark, DGX Station, DGX SuperPOD with GB300, DGX SuperPOD with GB200,\n\nDGX H200, DGX H100, DGX BasePOD, DGX SuperPOD with H200, DGX A100), HGX line of\n\nsupercomputers and servers (including at least HGX B300, HGX B200, HGX H100, HGX H200,\n\nEos SuperPOD), OVX line of supercomputers and servers (including at least OVX L40S), EGX\n\nline of supercomputers and servers (including at least EGX Server with Quadro RTX A6000, EGX\n\nServer with A40, EGX Server with Quadro RTX 8000, EGX Server with Quadro RTX 6000),\n\nGB300 NVL72, GB200 NVL72; Nvidia\u2019s GPU accelerators and superchips, including those with\n\nNVIDIA\u2019s Blackwell, Hopper, Ada Lovelace, Ampere, Turing, Volta, Pascal, and Maxwell GPU\n\narchitectures, including at least, RTX PRO 6000 Server Edition, RTX PRO 6000 Workstation,\n\nRTX PRO 6000 Max-Q Workstation, RTX PRO 5000, RTX PRO 4500, RTX PRO 4000, RTX\n\nPRO 3000, RTX PRO 2000, RTX PRO 1000, RTX PRO 500, GB300, GB200, H100, H200,\n\nGH200, GH100, L40, L40S, L4, RTX 6000, RTX 6000 Ada, RTX 5000, Ada, RTX 4500 Ada,\n\nRTX 4000 Ada, RTX 4000 SFF, RTX 3500, RTX 3000, RTX 2000, RTX 1000, RTX 500, RTX\n\n4090, RTX 4080 SUPER, RTX 4070 Ti SUPER, RTX 4070 SUPER, RTX 4070, RTX 4060 Ti,\n\nand RTX 4060, GeForce RTX 4090 Laptop GPU, GeForce RTX 4080 Laptop GPU, GeForce RTX\n\n4070 Laptop GPU, GeForce RTX 4060 Laptop GPU, GeForce RTX 4050 Laptop GPU, A100,\n\nA40, A30, A16, A10, A2, A800 40GB Active, RTX A6000, RTX A5500, RTX A5000, RTX\n\f Case 7:26-mc-00323-DC Document 1-9 Filed 08/18/26 Page 10 of 13\n\n\n\n\nA4500, RTX A4000, RTX A2000, RTX A2000 12GB, RTX A1000, RTX A400, RTX A5500,\n\nRTX A4500, RTX A3000 12GB, RTX A2000 8GB, RTX A1000 6GB, RTX A500, GeForce RTX\n\n3090 Ti, GeForce RTX 3090, GeForce RTX 3080 Ti, GeForce RTX 3080, GeForce RTX 3070 Ti,\n\nGeForce RTX 3070, GeForce RTX 3060 Ti, GeForce RTX 3060, GeForce RTX 3050 (8 GB),\n\nGeForce RTX 3050 (6 GB), GeForce RTX 3080 Ti Laptop GPU, GeForce RTX 3080 Laptop\n\nGPU, GeForce RTX 3070 Ti Laptop GPU, GeForce RTX 3070 Laptop GPU, GeForce RTX 3060\n\nLaptop GPU, GeForce RTX 3050 Ti Laptop GPU, GeForce RTX 3050 Laptop GPU, GeForce\n\nMX570 Laptop GPU, Tesla T4 GPUs, Quadro RTX 8000, Quadro RTX 6000, Quadro RTX 8000,\n\nQuadro RTX 6000, Quadro RTX 5000, Quadro RTX 4000, Quadro RTX 3000, Quadro T2000,\n\nT1000 8GB, T1200, Quadrio T1000, T1000 (4GB), T600, T550, T500 T400, T400 4GB, Titan\n\nRTX, GeForce RTX 2080 Ti, GeForce RTX 2080, Super, GeForce RTX 2080, GeForce RTX 2070\n\nSuper, GeForce RTX 2070, GeForce RTX 2060 Super, GeForce RTX 2060, GeForce RTX 2500,\n\nGeForce GTX 1660 Ti, GeForce GTX 1660 Super, GeForce GTX 1660, GeForce GTX 1650 Ti,\n\nGeForce GTX 1650 Super, GeForce GTX 1650 (G5), GeForce GTX 1650 (G6), GeForce GTX\n\n1650, GeForce GTX 1630, GeForce MX550, GeForce MX450, GeForce MX430, Tesla V100,\n\nQuadro GV100, Titan V GPU, Tesla P100, P40, P4, Quadro GP100, Quadro P6000, Quadro\n\nP5200, Quadro P5000, Quadro P4200, Quadro P4000, Quadro P3200, Quadro P3000, Quadro\n\nP2200, Quadro P2000, Quadro P1000, Quadro P620, Quadro P600, Quadro P520, Quadro P500,\n\nQuadro P400, Titan Xp, Titan X, GeForce GTX 1080 Ti, GeForce GTX 1080, GeForce GTX 1070\n\nTi, GeForce GTX 1070, GeForce GTX 1060, GeForce GTX 1050 Ti, GeForce GTX 1050,\n\nGeForce MX300, GeForce MX200, GeForce MX150, Tesla M60, M40, M10, Quadro M6000\n\n24GB, Quadro M6000 (12GB), Quadro M5000, Quadro M5000M, Quadro M5500, Quadro\n\nM4000, Quadro M4000M, Quadro M3000M, Quadro M2200, Quadro M2000, Quadro M2000M,\n\f Case 7:26-mc-00323-DC Document 1-9 Filed 08/18/26 Page 11 of 13\n\n\n\n\nQuadro M1200, Quadro M1000M, Quadro M620, Quadro M600M, Quadro M520, Quadro\n\nM500M, NVS 810, Tesla M6, GTX Titan X, GeForce GTX 980Ti, GeForce GTX 980, GeForce\n\nGTX 970, GeForce GTX 960, GeForce GTX 980M, GeForce GTX 970M, GeForce GTX 965M,\n\nGeForce GTX 960M, GeForce GTX 950M, GeForce GTX 750 Ti, GeForce GTX 750, GeForce\n\nMX130, and GeForce MX110; and Jetson modules, including at least the Jetson Thor Series,\n\nJetson Thor, Jetson T5000, Jetson T4000, Jetson AGX Orin Series, Jetson AGX Orin Developer\n\nKit, Jetson AGX Orin 64GB, Jetson AGX Orin Industrial, Jetson AGX Orin 32GB, Jetson Orin\n\nNX Series, Jetson Orin NX 16GB, Jetson Orin NX 8GB, Jetson Orin Nano Series, Jetson Orin\n\nNano Super Developer Kit, Jetson Orin Nano 8GB, Jetson Orin Nano 4GB, Jetson AGX Xavier\n\nSeries, Jetson AGX Xavier Industrial, Jetson AGX Xavier 64GB, Jetson AGX Xavier 32GB,\n\nJetson Xavier NX Series, Jetson Xavier NX 16GB, Jetson Xavier NX 8GB, Jetson TX2 Series,\n\nJetson TX2i, Jetson TX2, Jetson TX2 4GB, Jetson TX2 NX, Jetson Nano, any and all variations\n\nof the aforementioned products (including at least products having different options for number of\n\nGPUs).\n\n 2. The terms \u201cand\u201d and \u201cor\u201d are not intended to be read disjunctively but rather\n\nconjunctively unless the context of a particular request clearly indicates otherwise. \u201cOr\u201d should be\n\nunderstood to include and encompass \u201cand\u201d; and \u201cand\u201d should be understood to include and\n\nencompass \u201cor.\u201d\n\n 3. The terms \u201cany\u201d or \u201ceach\u201d should be understood to include and encompass \u201call.\u201d\n\n 4. The terms \u201cconcerning,\u201d \u201crelated to\u201d or \u201crelating to\u201d, and \u201cregarding\u201d and any\n\nvariation of these terms mean analyzing, alluding to, concerning, considering, commenting on,\n\nconsulting, comprising, containing, contradicting, describing, dealing with, discussing,\n\nestablishing, evidencing, identifying, involving, noting, recording, reporting on, relating to,\n\f Case 7:26-mc-00323-DC Document 1-9 Filed 08/18/26 Page 12 of 13\n\n\n\n\nreflecting, referring to, regarding, stating, showing, studying, mentioning, memorializing, or\n\npertaining to, directly or indirectly, in whole or in part.\n\n 5. The term \u201cCPU(s)\u201d means Central Processing Unit(s).\n\n 6. The term \u201cGPU(s)\u201d means Graphics Processing Unit(s).\n\n 7. The terms \u201cinclude\u201d and \u201cincluding\u201d mean including without limitation.\n\n 8. The term \u201cNVIDIA\u201d means Defendant NVIDIA Corporation, its predecessors,\n\npresent and former directors, officers, accountants, affiliates, attorneys, partners, managers, agents,\n\nemployees, representatives, in-house and outside counsel, and any other person or entity acting on\n\nbehalf of or under control of Defendant NVIDIA Corporation.\n\n 9. The term \u201cperson(s)\u201d means and includes natural persons and formal or informal\n\nentities and organizations, including public and private corporations, partnerships, professional\n\ncorporations, limited liability companies, business trusts, banking institutions, associations, firms,\n\njoint ventures, commissions, bureaus, departments, and any other legal entity, including\n\nany divisions, subsidiaries, departments, and other units thereof.\n\n 10. The term \u201cSource Code\u201d means human-readable instructions written in a\n\nprogramming language, including all comments, annotations, declarations, functions, classes, and\n\nother components used to define the behavior of a software program. For purposes of these topics,\n\n\u201cSource Code\u201d includes all associated files necessary to understand, compile, and execute the\n\ncode, such as scripts, header files, makefiles, configuration files, and documentation. Unless\n\notherwise stated, \u201cSource Code\u201d includes all versions and revisions relevant to the time periods\n\nand subject matter described in each interrogatory.\n\n 11. The terms \u201cYou,\u201d or \u201cYour\u201d refer to CoreWeave, Inc., including but not limited to\n\nits predecessors, successors, parents, subsidiaries, divisions, affiliates, and all past or present\n\f Case 7:26-mc-00323-DC Document 1-9 Filed 08/18/26 Page 13 of 13\n\n\n\n\ndirectors, officers, partners, managers, employees, contractors, agents, representatives,\n\naccountants, consultants, in-house and outside counsel, and any other person or entity acting or\n\npurporting to act on its behalf or subject to its control. This definition expressly includes, without\n\nlimitation, any CoreWeave parent, subsidiary, affiliate, or other related entity that has used,\n\nlicensed, deployed, evaluated, or integrated NVIDIA Hardware and/or NVIDIA Software.\n\n 12. The use of the singular form of any word includes the plural and vice versa.\n\n DEPOSITION TOPICS\n\n1. The NVIDIA software and libraries You use to perform computations, including but not\n\n limited to NVIDIA\u2019s Aerial, Clara Parabricks, cuBLAS, cuDNN, cuFFT, cuQuantum,\n\n cuSOLVER, cuSPARSE, Drive, DriveWorks, Holoscan, Isaac, Isaac Lab, Maxine, Memory\n\n Map, Merlin, Metropolis, Modulus, Monai, Morpheus, NeMo, PyTorch, RAPIDS, Riva,\n\n Runtime Driver, TensorFlow, TensorRT, Triton, VSS (Deepstream).\n\n2. The NVIDIA sample Source Code You use, in whole or in part, to conduct computations.\n\n3. Your customizations and/or data inputs to NVIDIA software that alter the way in which\n\n NVIDIA software performs computations and/or a description of the data input to NVIDIA\n\n software on which computations are run.\n\n4. Identification of Your software that uses NVIDIA GPUs to perform computations.\n\n5. Using Your software, the ways in which output data from a GPU computation(s), including\n\n intermediate results of GPU computations are stored, referenced by a pointer, transferred,\n\n copied, streamed, written back, returned, accumulated, reused, or made available including\n\n asynchronously from NVIDIA GPU memory to CPU memory, host memory, system memory,\n\n storage, display, network, or another memory location before, during, or in parallel with\n\n computations performed using NVIDIA GPUs.\n\f","ocr_status":1,"date_upload":"2026-08-20T10:23:22.978077-07:00","document_number":"1","attachment_number":9,"pacer_doc_id":"181037219952","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 8","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622541/","id":490622541,"tags":[],"absolute_url":"/docket/74666997/1/10/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.487884-07:00","date_modified":"2026-08-23T02:40:51.280435-07:00","sha1":"7a6e698a2d793586852b0cec2d97eabe425cdf6e","page_count":2,"file_size":67827,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.10.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.10.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-10 Filed 08/18/26 Page 1 of 2\n\n\n\n\n EXHIBIT\n\n 9\n\f Case 7:26-mc-00323-DC Document 1-10 Filed 08/18/26 Page 2 of 2\n\n\n\n\n AFFIDAVIT OF SERVICE\n UNITED STATES DISTRICT COURT\n Western District of Texas\nCase Number: 7:24-CV-00221-ADA-\nDTH\n\nPlaintiff:\nNeural Al, LLC\nVS.\nDefendant:\nNvidia Corporation\n\nFor:\nEmily Portuguese\n\nReceived by Anthony Collins on the 24th day of June, 2026 at 4:46 pm to be served on Coreweave Inc do\nCT Corporation System, 1999 Bryan St, Ste 900, Dallas, Dallas County, TX 75201.\n\nI, Anthony Collins, being duly sworn, depose and say that on the 25th day of June, 2026 at 2:55 pm, I:\n\nExecuted service by hand delivering a true copy of the Subpoena to: Al Johnson , an authorized\nacceptance agent employed by Registered Agent CT Corporation System, Inc., who is authorized to\naccept service of process for Coreweave Inc , at the address of: 1999 Bryan St, Ste 900, Dallas, Dallas\nCounty, TX 75201, and informed said person of the contents therein, in compliance with state statutes.\n\nDescription of Person Served: Age: 30s, Sex: M, Race/Skin Color: Black, Height: 5'11, Weight: 220, Hair:\nBald, Glasses: Y\n\n\"I certify that I am over the age of 18, have no interest in the above action. and authorized to serve\nprocess in the judicial circuit in which the process was served. I have personal knowledge of the facts set\nforth in this affidavit. I declare under the penalty of perjury that the foregoing is true and correct.\n\n \\PgY z, ERIC JACOB HARRIS\n Notary Public, State of Texas\n Comm. Expires 08-12-2029.\n -.7z;;;,'s Notary ID 135527875\n Anthony Collins\n PSC-357 Expires 12/31/2027\nSubscribed and Sworn to before me on the 26th day\nof June, 2026 by the affiant who is personally known Lexitas\nto me. 1235 Broadway\n 2nd Floor\n New York, NY 10001\nNOTARY PUBLIC (718) 672-1117\n\n Our Job Serial Number: ONT-2026006078\n Ref: 27255008\n\n\n\n\n Copyright \u00a9 1992-2026 DreamBuilt Software, LLC. - Process Server's Toolbox V9.0e\n\n\n\n\n IIIIIIIIIIIIIIIIIIIIII11111\n III11111\n\f","ocr_status":1,"date_upload":"2026-08-20T10:23:28.451061-07:00","document_number":"1","attachment_number":10,"pacer_doc_id":"181037219953","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 9","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622542/","id":490622542,"tags":[],"absolute_url":"/docket/74666997/1/11/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.511259-07:00","date_modified":"2026-08-23T01:50:31.267160-07:00","sha1":"60e803998d7e169cf8f1e012d79f265c47c3c16f","page_count":8,"file_size":305061,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.11.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.11.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-11 Filed 08/18/26 Page 1 of 8\n\n\n\n\n EXHIBIT\n\n 10\n\f Case 7:26-mc-00323-DC Document 1-11 Filed 08/18/26 Page 2 of 8\n\n\n Monday, August 17, 2026 at 7:16:19 PM Paci\ufb01c Daylight Time\n\nSubject: Re: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\nDate: Monday, August 17, 2026 at 7:03:01 PM Paci\ufb01c Daylight Time\nFrom: Tanner Laiche\nTo: Nick Valencia, Rocco Magni, Adam Kessel, Emily Portuguese, Neil Ramsaroop\nCC: Max Tribble, Brian Melton, Tamar Lusztig, Samuel Drezdzon, Richard Wojtczak, Rachel Hanna, Rachel Solis\n\n\nCounsel,\n\nI am following up on my message below. We have not yet received a draft declaration from Coreweave. Because our deadline is\ntomorrow, we intend to \ufb01le a motion to compel to preserve our rights and avoid any argument that the issue has been waived.\n\nIf Coreweave remains committed to resolving this dispute without motion practice, please send us a draft declaration as soon as\npossible.\n\nRegards,\n\nTanner Laiche\nSusman Godfrey LLP\n206.505.3816 | tlaiche@susmangodfrey.com\n401 Union Street | Suite 3000 | Seattle, WA 98101\nHOUSTON \u2022 LOS ANGELES \u2022 SEATTLE \u2022 NEW YORK\nThis e-mail contains privileged and con\ufb01dential information, which may be subject to the attorney-client privilege and/or attorney work product\nprotection. If you received this message in error, please notify the sender and delete it immediately.\n\n\nFrom: Tanner Laiche \nDate: Tuesday, August 11, 2026 at 9:58 AM\nTo: Nick Valencia ; Rocco Magni ; Adam Kessel ; Emily\nPortuguese ; Neil Ramsaroop \nCc: Max Tribble ; Brian Melton ; Tamar Lusztig\n; Samuel Drezdzon ; Richard Wojtczak\n; Rachel Hanna ; Rachel Solis \nSubject: Re: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\nNick,\n\nThank you for your email.\n\nAs an update, NVIDIA has agreed to extend Neural AI\u2019s deadline to \ufb01le third-party discovery motions through August 18. We would\nlike to use that additional time to try to resolve the outstanding issues.\n\nWe appreciate Coreweave's continued investigation. Please send us any proposed edits to the declaration as soon as possible so\nthat we can evaluate whether the declaration, as revised, would address the information sought by the subpoenas and avoid the\nneed for additional discovery. To that end, we would appreciate the opportunity to review any proposed revisions before the\ndeclaration is \ufb01nalized or executed. If the \ufb01nal declaration does not address material information or leaves material issues\nunclear, Neural AI reserves the right to seek that information through appropriate document or deposition discovery.\n\nGiven the timing, we would appreciate receiving your edits promptly. If we are unable to reach a resolution before the August 18\ndeadline, Neural AI will need to \ufb01le a motion to preserve its rights and avoid any argument that it waived the issue. That would not\nprevent the parties from continuing to work toward a resolution. If we subsequently reach an agreement that resolves the\noutstanding discovery, Neural AI would promptly withdraw the motion.\n\nRegards,\n\nTanner Laiche\nSusman Godfrey LLP\n206.505.3816 | tlaiche@susmangodfrey.com\n401 Union Street | Suite 3000 | Seattle, WA 98101\nHOUSTON \u2022 LOS ANGELES \u2022 SEATTLE \u2022 NEW YORK\n\n\nFrom: Nick Valencia \nDate: Monday, August 10, 2026 at 12:51 PM\n\n\n 1 of 7\n\f Case 7:26-mc-00323-DC Document 1-11 Filed 08/18/26 Page 3 of 8\n\n\nTo: Tanner Laiche ; Rocco Magni ; Adam Kessel\n; Emily Portuguese ; Neil Ramsaroop \nCc: Max Tribble ; Brian Melton ; Tamar Lusztig\n; Samuel Drezdzon ; Richard Wojtczak\n; Rachel Hanna ; Rachel Solis \nSubject: RE: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\nEXTERNAL Email\n\n\nHi Tanner,\n\nThank you for sending this over. We have shared the draft declaration with our client. We will get any proposed revisions to you as\nsoon as we have them.\n\nBest,\n\nNick Valencia\nAssociate \u25a0 Fish & Richardson P.C.\n\nT: 713 654 5325 | valencia@fr.com\n\n\nFrom: Tanner Laiche \nSent: Friday, August 7, 2026 11:52 AM\nTo: Nick Valencia ; RMagni@susmangodfrey.com; Adam Kessel ; Emily Portuguese\n; Neil Ramsaroop \nCc: Max Tribble ; bmelton@susmangodfrey.com; Tamar Lusztig ;\nSDrezdzon@susmangodfrey.com; Richard Wojtczak ; RHanna@susmangodfrey.com;\nRSolis@susmangodfrey.com\nSubject: Re: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\nCounsel,\n\nThank you for the meet and confer earlier this week. As discussed, attached is a draft declaration. CoreWeave is, of course,\nwelcome to revise the declaration as necessary to ensure it is accurate, including by identifying any issues as to which\nCoreWeave lacks suficient corporate knowledge. Assuming we can reach agreement on a declaration addressing the key issues,\nwe would withdraw the subpoenas in light of the executed declaration.\n\nPlease discuss the draft with your client and provide any proposed edits.\n\nWe are continuing to seek an extension of the August 11 deadline as it relates to third-party discovery and will update you when\nwe hear back. If we are unable to obtain an extension, we may need to \ufb01le a motion to compel solely to preserve our rights. In that\nevent, we are happy to work with you to stipulate to an extension of CoreWeave\u2019s response deadline while the parties continue\ntheir discussions, and we would voluntarily withdraw the motion if and when we reach agreement on a declaration.\n\nRegards,\n\nTanner Laiche\nSusman Godfrey LLP\n206.505.3816 | tlaiche@susmangodfrey.com\n401 Union Street | Suite 3000 | Seattle, WA 98101\nHOUSTON \u2022 LOS ANGELES \u2022 SEATTLE \u2022 NEW YORK\n\n\nFrom: Tanner Laiche \nDate: Monday, August 3, 2026 at 5:20 PM\nTo: Nick Valencia ; Rocco Magni ; Adam Kessel ; Emily\nPortuguese ; Neil Ramsaroop \nCc: Max Tribble ; Brian Melton ; Tamar Lusztig\n; Samuel Drezdzon ; Richard Wojtczak\n; Rachel Hanna ; Rachel Solis \nSubject: Re: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\nI\u2019ve circulated a calendar invite.\n\n\n 2 of 7\n\f Case 7:26-mc-00323-DC Document 1-11 Filed 08/18/26 Page 4 of 8\n\n\n\nThank you,\n\nTanner Laiche\nSusman Godfrey LLP\n206.505.3816 | tlaiche@susmangodfrey.com\n401 Union Street | Suite 3000 | Seattle, WA 98101\nHOUSTON \u2022 LOS ANGELES \u2022 SEATTLE \u2022 NEW YORK\n\n\nFrom: Nick Valencia \nDate: Monday, August 3, 2026 at 8:33 AM\nTo: Rocco Magni ; Adam Kessel ; Emily Portuguese\n; Neil Ramsaroop \nCc: Max Tribble ; Brian Melton ; Tamar Lusztig\n; Tanner Laiche ; Samuel Drezdzon\n; Richard Wojtczak ; Rachel Hanna\n; Rachel Solis \nSubject: RE: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\nEXTERNAL Email\n\n\nHi Rocco,\n\nThank you for following up. We are available to confer on Wednesday from 10am\u201312pm CT or 2pm\u20135pm. Please let us know what\ntime works best for you.\n\nBest,\n\nNick Valencia\nAssociate \u25a0 Fish & Richardson P.C.\n\nT: 713 654 5325 | valencia@fr.com\n\n\nFrom: Rocco Magni \nSent: Sunday, August 2, 2026 8:59 PM\nTo: Adam Kessel ; Emily Portuguese ; Nick Valencia ; Neil\nRamsaroop \nCc: Max Tribble ; bmelton@susmangodfrey.com; Tamar Lusztig ;\nTanner Laiche ; SDrezdzon@susmangodfrey.com; Richard Wojtczak\n; RHanna@susmangodfrey.com; RSolis@susmangodfrey.com\nSubject: Re: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\nAdam,\n\nOur discovery deadline is approaching soon. Please let us know when you can confer again this upcoming week. Thanks.\n\n--\nRocco F. Magni\nPartner | Susman Godfrey LLP\nO\ufb03ce: 713.653.7861\nCell: 512.514.3519\nFirm Bio\nThis e-mail may contain privileged and confidential information. If you received this message in error, please notify the sender and\ndelete it immediately.\nFrom: Rocco Magni \nDate: Wednesday, July 29, 2026 at 9:51 AM\nTo: Adam Kessel ; Emily Portuguese ; Nick Valencia ;\nNeil Ramsaroop \nCc: Max Tribble ; Brian Melton ; Tamar Lusztig\n; Tanner Laiche ; Samuel Drezdzon\n; Richard Wojtczak ; Rachel Hanna\n; Rachel Solis \nSubject: Re: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\n\n 3 of 7\n\f Case 7:26-mc-00323-DC Document 1-11 Filed 08/18/26 Page 5 of 8\n\n\nAdam,\n\nThese are the items we would expect Coreweave to have that relate to customer usage of Nvidia software:\n\n \u00b7 Customer support and troubleshooting records.\n Support tickets, support communications, customer Slack or Teams communications, incident reports, diagnostic\n bundles, troubleshooting records, screen-share recordings, meeting transcripts, technical-support session records,\n commands executed by CoreWeave personnel, architecture diagrams, and performance analyses, including records\n concerning NVIDIA software, GPU con\ufb01guration, GPU-memory allocation, or GPU out-of-memory conditions.\n \u00b7 Pod, container, application, and job logs.\n Pod logs, container stdout and stderr logs, application logs, Kubernetes event logs, kubelet logs, scheduler logs, Slurm\n logs, job logs, startup logs, error logs, crash logs, and out-of-memory records relating to any Relevant Workload, including\n logs identifying software names, executable names, libraries, software versions, command-line arguments, memory\n settings, memory allocation, memory reservation, or memory utilization.\n \u00b7 Kubernetes workload speci\ufb01cations.\n Current and historical Kubernetes Pod, Deployment, StatefulSet, DaemonSet, Job, and CronJob speci\ufb01cations, including\n YAML and JSON manifests and \ufb01elds identifying container images, commands, arguments, environment variables,\n resource requests, resource limits, runtime classes, mounted \ufb01les, Con\ufb01gMaps, GPU resources, and NVIDIA devices.\n \u00b7 Container-image identi\ufb01cation records.\n Records identifying container images used in connection with any Relevant Workload, including image repository, image\n name, image tag, immutable digest, source registry, base image, image-pull date, and records mapping each image to the\n applicable customer, cluster, namespace, Pod, container, node, or GPU.\n \u00b7 Con\ufb01guration \ufb01les and deployment materials.\n Con\ufb01gMaps, Helm charts, Helm values \ufb01les, Terraform \ufb01les, Kubernetes con\ufb01guration \ufb01les, deployment scripts, startup\n scripts, shell scripts, batch \ufb01les, Slurm job-submission scripts, orchestration \ufb01les, and other con\ufb01guration materials\n \u00b7 Container-runtime and OCI records.\n Containerd metadata, container runtime interface records, OCI runtime speci\ufb01cations, container-creation records,\n runtime con\ufb01guration records, image and snapshot metadata, device-mount records, library-mount records, and other\n runtime records identifying the image, executable, command, arguments, environment variables, mounted \ufb01les, or NVIDIA\n devices.\n \u00b7 Records identifying NVIDIA software used by customers.\n Records identifying NVIDIA software Coreweave makes available to/installed for its customers.\n \u00b7 Software inventories and bills of materials.\n Software bills of materials, package inventories, dependency inventories, image-scanning reports, vulnerability-scanning\n reports, software-composition analyses, package-manager outputs, or similar records identifying software, packages,\n libraries, dependencies, or versions installed in or associated with containers.\n \u00b7 Container-registry proxy and cache records.\n Container-registry proxy logs, registry access logs, image-pull logs, image-cache records, cached OCI or Docker\n manifests, cached image-layer records, layer metadata, repository records, tag records, digest records, and source-\n registry records.\n \u00b7 Kubernetes audit and API-server records.\n Kubernetes audit logs, API-server logs, API request and response records, control-plane records, and historical records\n concerning the creation, modi\ufb01cation, patching, replacement, or deletion of Pods, containers, Jobs, Con\ufb01gMaps,\n Deployments, StatefulSets, or other resources.\n \u00b7 NVIDIA process-accounting and diagnostic outputs.\n nvidia-smi outputs, nvidia-smi pmon outputs, NVML outputs, DCGM process-accounting records, GPU diagnostic\n records, GPU health records, troubleshooting captures, and similar records identifying processes, executable names,\n process IDs, GPU UUIDs, GPU assignments, or GPU memory consumed\n\n\n--\nRocco F. Magni\nPartner | Susman Godfrey LLP\nO\ufb03ce: 713.653.7861\nCell: 512.514.3519\nFirm Bio\nThis e-mail may contain privileged and confidential information. If you received this message in error, please notify the sender and\ndelete it immediately.\nFrom: Adam Kessel \nDate: Monday, July 27, 2026 at 3:10 PM\nTo: Emily Portuguese ; Nick Valencia ; Neil Ramsaroop\n\n 4 of 7\n\f Case 7:26-mc-00323-DC Document 1-11 Filed 08/18/26 Page 6 of 8\n\n\n\nCc: Rocco Magni ; Max Tribble ; Brian Melton\n; Tamar Lusztig ; Tanner Laiche\n; Samuel Drezdzon ; Richard Wojtczak\n; Rachel Hanna ; Rachel Solis \nSubject: RE: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\nEXTERNAL Email\n\n\nCounsel\u2014we haven\u2019t received the focused list of topics you agreed to prove two weeks ago, so I suggest we postpone the call we had put on\ncalendar for this afternoon until after you\u2019ve provided that list and we have had an opportunity to investigate.\n\nFrom: Emily Portuguese \nSent: Tuesday, July 14, 2026 6:28 PM\nTo: Nick Valencia ; Adam Kessel ; Neil Ramsaroop \nCc: RMagni@susmangodfrey.com; Max Tribble ; bmelton@susmangodfrey.com; Tamar Lusztig\n; Tanner Laiche ; SDrezdzon@susmangodfrey.com; Richard\nWojtczak ; RHanna@susmangodfrey.com; RSolis@susmangodfrey.com\nSubject: RE: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\nNick, I just sent an invite. Talk soon.\n\nBest,\nEmily\n\nEmily Portuguese | Susman Godfrey LLP\nOffice: 212.729.2082 Mobile: 973.487.8743\neportuguese@susmangodfrey.com\n\n\nFrom: Nick Valencia \nSent: Tuesday, July 14, 2026 6:22 PM\nTo: Emily Portuguese ; Adam Kessel ; Neil Ramsaroop \nCc: Rocco Magni ; Max Tribble ; Brian Melton\n; Tamar Lusztig ; Tanner Laiche ;\nSamuel Drezdzon ; Richard Wojtczak ; Rachel Hanna\n; Rachel Solis \nSubject: RE: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\nEXTERNAL Email\n\n\nHi Emily,\n\nWe appreciate your willingness to discuss CoreWeave\u2019s proposal and the deposition scheduling. 3:00pm Central on Thursday\nworks for us. Please send a call invite at your convenience.\n\nThank you,\n\nNick Valencia\nAssociate \u25a0 Fish & Richardson P.C.\n\nT: 713 654 5325 | valencia@fr.com\n\n\nFrom: Emily Portuguese \nSent: Tuesday, July 14, 2026 2:42 PM\nTo: Nick Valencia ; Adam Kessel ; Neil Ramsaroop \nCc: RMagni@susmangodfrey.com; Max Tribble ; bmelton@susmangodfrey.com; Tamar Lusztig\n; Tanner Laiche ; SDrezdzon@susmangodfrey.com; Richard\nWojtczak ; RHanna@susmangodfrey.com; RSolis@susmangodfrey.com\nSubject: RE: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\nHi Nick,\n\nThanks for the below emails. We are willing to discuss the deposition subpoena and CoreWeave\u2019s response, including\nregarding alternative means of providing the relevant information. We are available for a call this Thursday at 12:30pm or\n3pm Central.\n\n\n\n 5 of 7\n\f Case 7:26-mc-00323-DC Document 1-11 Filed 08/18/26 Page 7 of 8\n\n\nSimilarly, we are willing to move the deposition date from July 21 to a date in early August. Please let me know what day\nworks for CoreWeave, subject to availability of the to-be-designated witness.\n\nThanks,\nEmily\n\nEmily Portuguese | Susman Godfrey LLP\nOffice: 212.729.2082 Mobile: 973.487.8743\neportuguese@susmangodfrey.com\n\n\nFrom: Nick Valencia \nSent: Monday, July 13, 2026 5:30 PM\nTo: Emily Portuguese ; Adam Kessel ; Neil Ramsaroop \nCc: Rocco Magni ; Max Tribble ; Brian Melton\n; Tamar Lusztig ; Tanner Laiche ;\nSamuel Drezdzon ; Richard Wojtczak ; Rachel Hanna\n; Rachel Solis \nSubject: RE: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\nEXTERNAL Email\n\n\nHi Emily,\n\nJust following up on the below. CoreWeave is still evaluating whether it can identify an appropriate witness for the noticed topics\nand would appreciate the opportunity to discuss its proposal regarding alternative means of providing relevant information and\notherwise moving the July 21 deposition to early August.\n\nPlease let us know your availability for a call.\n\nThank you,\n\nNick Valencia\nAssociate \u25a0 Fish & Richardson P.C.\nT: 713 654 5325 | valencia@fr.com\n\n\nFrom: Nick Valencia\nSent: Wednesday, July 8, 2026 10:22 PM\nTo: 'Emily Portuguese' ; Adam Kessel ; Neil Ramsaroop \nCc: RMagni@susmangodfrey.com; Max Tribble ; bmelton@susmangodfrey.com; Tamar Lusztig\n; Tanner Laiche ; SDrezdzon@susmangodfrey.com; Richard\nWojtczak ; RHanna@susmangodfrey.com; RSolis@susmangodfrey.com\nSubject: RE: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\nHi Emily,\n\nI write on behalf of CoreWeave regarding Neural AI\u2019s deposition subpoena, currently set for July 21.\n\nHaving reviewed the noticed topics, most concern NVIDIA software, drivers, and libraries that CoreWeave makes available to its\ncustomers largely on a pass-through basis, rather than software CoreWeave itself developed or has unique knowledge of. As a\nnon-party, CoreWeave needs time to assess whether it can identify and prepare a designee who can meaningfully testify to the\nvarious topics.\n\nGiven that, a deposition may not be the most eficient way to get Neural AI what it needs. CoreWeave is willing to provide\ninformation about its business, potentially including a declaration, describing its role and its use of NVIDIA hardware and\nsoftware, which we expect will narrow or eliminate the need for testimony on the noticed topics. Preparing a witness on any\ntechnical details that remain will also take time given CoreWeave\u2019s non-party status.\n\nFor both reasons, we ask that the deposition be moved from July 21 to a date in early August, still within the August 11 discovery\ndeadline. CoreWeave has not yet identi\ufb01ed a witness, however, so any date would necessarily be subject to the availability of an\nappropriate witness once one is identi\ufb01ed. Nothing in this proposal is intended to waive CoreWeave\u2019s objections or its right to\nseek relief under Rule 45.\n\nPlease let us know your availability for a call this week or next week to discuss.\n\n\n 6 of 7\n\f Case 7:26-mc-00323-DC Document 1-11 Filed 08/18/26 Page 8 of 8\n\n\n\nThank you,\n\nNick Valencia\nAssociate \u25a0 Fish & Richardson P.C.\nT: 713 654 5325 | valencia@fr.com\n\n\nFrom: Emily Portuguese \nSent: Wednesday, June 24, 2026 3:18 PM\nTo: Olivia Nguyen (Left as of 4/30/2026) ; Adam Kessel ; Neil Ramsaroop \nCc: RMagni@susmangodfrey.com; Max Tribble ; bmelton@susmangodfrey.com; Tamar Lusztig\n; Tanner Laiche ; SDrezdzon@susmangodfrey.com; Richard\nWojtczak ; RHanna@susmangodfrey.com; RSolis@susmangodfrey.com\nSubject: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\n\n[This email originated outside of F&R.]\n\n\nCounsel,\n\nPlease see attached deposition subpoena in Neural AI v. NVIDIA being served on CoreWeave. Please let me know if you\nhave any questions or would like to set up a meet and confer to discuss the topics.\n\nThanks,\nEmily\n\nEmily Portuguese | Susman Godfrey LLP\nOffice: 212.729.2082 Mobile: 973.487.8743\nOne Manhattan West | 50th Floor | New York, New York 10001\nHOUSTON \u2022 LOS ANGELES \u2022 SEATTLE \u2022 NEW YORK\neportuguese@susmangodfrey.com\n\n\n\n\n****************************************************************************************************************************\nThis email message is for the sole use of the intended recipient(s) and may contain confidential and privileged\ninformation. Any unauthorized use or disclosure is prohibited. If you are not the intended recipient, please contact the\nsender by reply email and destroy all copies of the original message.\n****************************************************************************************************************************\n\n\n\n****************************************************************************************************************************\nThis email message is for the sole use of the intended recipient(s) and may contain confidential and privileged\ninformation. Any unauthorized use or disclosure is prohibited. If you are not the intended recipient, please contact the\nsender by reply email and destroy all copies of the original message.\n****************************************************************************************************************************\n\n\n\n****************************************************************************************************************************\nThis email message is for the sole use of the intended recipient(s) and may contain confidential and privileged\ninformation. Any unauthorized use or disclosure is prohibited. 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If you are not the intended recipient, please contact the\nsender by reply email and destroy all copies of the original message.\n****************************************************************************************************************************\n\n\n\n****************************************************************************************************************************\nThis email message is for the sole use of the intended recipient(s) and may contain confidential and privileged\ninformation. Any unauthorized use or disclosure is prohibited. If you are not the intended recipient, please contact the\nsender by reply email and destroy all copies of the original message.\n****************************************************************************************************************************\n\n\n\n\n 7 of 7\n\f","ocr_status":1,"date_upload":"2026-08-20T10:23:23.986741-07:00","document_number":"1","attachment_number":11,"pacer_doc_id":"181037219954","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 10","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622543/","id":490622543,"tags":[],"absolute_url":"/docket/74666997/1/12/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.532265-07:00","date_modified":"2026-08-23T01:26:50.876151-07:00","sha1":"01591c19d9d610dc95aeb50a3d8152a1aa4fd6a7","page_count":7,"file_size":273222,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.12.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.12.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-12 Filed 08/18/26 Page 1 of 7\n\n\n\n\n EXHIBIT\n\n 11\n\f Case 7:26-mc-00323-DC Document 1-12 Filed 08/18/26 Page 2 of 7\n\n\n Monday, August 17, 2026 at 7:16:58 PM Paci\ufb01c Daylight Time\n\nSubject: Re: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\nDate: Friday, August 7, 2026 at 9:52:19 AM Paci\ufb01c Daylight Time\nFrom: Tanner Laiche\nTo: Nick Valencia, Rocco Magni, Adam Kessel, Emily Portuguese, Neil Ramsaroop\nCC: Max Tribble, Brian Melton, Tamar Lusztig, Samuel Drezdzon, Richard Wojtczak, Rachel Hanna, Rachel Solis\nAttachments: Neural AI, CoreWeave Declaration Draft.docx\n\n\nCounsel,\n\nThank you for the meet and confer earlier this week. As discussed, attached is a draft declaration. CoreWeave is, of course,\nwelcome to revise the declaration as necessary to ensure it is accurate, including by identifying any issues as to which\nCoreWeave lacks su[icient corporate knowledge. Assuming we can reach agreement on a declaration addressing the key issues,\nwe would withdraw the subpoenas in light of the executed declaration.\n\nPlease discuss the draft with your client and provide any proposed edits.\n\nWe are continuing to seek an extension of the August 11 deadline as it relates to third-party discovery and will update you when\nwe hear back. If we are unable to obtain an extension, we may need to \ufb01le a motion to compel solely to preserve our rights. In that\nevent, we are happy to work with you to stipulate to an extension of CoreWeave\u2019s response deadline while the parties continue\ntheir discussions, and we would voluntarily withdraw the motion if and when we reach agreement on a declaration.\n\nRegards,\n\nTanner Laiche\nSusman Godfrey LLP\n206.505.3816 | tlaiche@susmangodfrey.com\n401 Union Street | Suite 3000 | Seattle, WA 98101\nHOUSTON \u2022 LOS ANGELES \u2022 SEATTLE \u2022 NEW YORK\n\n\nFrom: Tanner Laiche \nDate: Monday, August 3, 2026 at 5:20 PM\nTo: Nick Valencia ; Rocco Magni ; Adam Kessel ; Emily\nPortuguese ; Neil Ramsaroop \nCc: Max Tribble ; Brian Melton ; Tamar Lusztig\n; Samuel Drezdzon ; Richard Wojtczak\n; Rachel Hanna ; Rachel Solis \nSubject: Re: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\nI\u2019ve circulated a calendar invite.\n\nThank you,\n\nTanner Laiche\nSusman Godfrey LLP\n206.505.3816 | tlaiche@susmangodfrey.com\n401 Union Street | Suite 3000 | Seattle, WA 98101\nHOUSTON \u2022 LOS ANGELES \u2022 SEATTLE \u2022 NEW YORK\n\n\nFrom: Nick Valencia \nDate: Monday, August 3, 2026 at 8:33 AM\nTo: Rocco Magni ; Adam Kessel ; Emily Portuguese\n; Neil Ramsaroop \nCc: Max Tribble ; Brian Melton ; Tamar Lusztig\n; Tanner Laiche ; Samuel Drezdzon\n; Richard Wojtczak ; Rachel Hanna\n; Rachel Solis \nSubject: RE: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\nEXTERNAL Email\n\n\n\n\n 1 of 6\n\f Case 7:26-mc-00323-DC Document 1-12 Filed 08/18/26 Page 3 of 7\n\n\nHi Rocco,\n\nThank you for following up. We are available to confer on Wednesday from 10am\u201312pm CT or 2pm\u20135pm. Please let us know what\ntime works best for you.\n\nBest,\n\nNick Valencia\nAssociate \u25a0 Fish & Richardson P.C.\nT: 713 654 5325 | valencia@fr.com\n\n\nFrom: Rocco Magni \nSent: Sunday, August 2, 2026 8:59 PM\nTo: Adam Kessel ; Emily Portuguese ; Nick Valencia ; Neil\nRamsaroop \nCc: Max Tribble ; bmelton@susmangodfrey.com; Tamar Lusztig ;\nTanner Laiche ; SDrezdzon@susmangodfrey.com; Richard Wojtczak\n; RHanna@susmangodfrey.com; RSolis@susmangodfrey.com\nSubject: Re: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\nAdam,\n\nOur discovery deadline is approaching soon. Please let us know when you can confer again this upcoming week. Thanks.\n\n--\nRocco F. Magni\nPartner | Susman Godfrey LLP\nO\ufb03ce: 713.653.7861\nCell: 512.514.3519\nFirm Bio\nThis e-mail may contain privileged and confidential information. If you received this message in error, please notify the sender and\ndelete it immediately.\nFrom: Rocco Magni \nDate: Wednesday, July 29, 2026 at 9:51 AM\nTo: Adam Kessel ; Emily Portuguese ; Nick Valencia ;\nNeil Ramsaroop \nCc: Max Tribble ; Brian Melton ; Tamar Lusztig\n; Tanner Laiche ; Samuel Drezdzon\n; Richard Wojtczak ; Rachel Hanna\n; Rachel Solis \nSubject: Re: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\nAdam,\n\nThese are the items we would expect Coreweave to have that relate to customer usage of Nvidia software:\n\n \u00b7 Customer support and troubleshooting records.\n Support tickets, support communications, customer Slack or Teams communications, incident reports, diagnostic\n bundles, troubleshooting records, screen-share recordings, meeting transcripts, technical-support session records,\n commands executed by CoreWeave personnel, architecture diagrams, and performance analyses, including records\n concerning NVIDIA software, GPU con\ufb01guration, GPU-memory allocation, or GPU out-of-memory conditions.\n \u00b7 Pod, container, application, and job logs.\n Pod logs, container stdout and stderr logs, application logs, Kubernetes event logs, kubelet logs, scheduler logs, Slurm\n logs, job logs, startup logs, error logs, crash logs, and out-of-memory records relating to any Relevant Workload, including\n logs identifying software names, executable names, libraries, software versions, command-line arguments, memory\n settings, memory allocation, memory reservation, or memory utilization.\n \u00b7 Kubernetes workload speci\ufb01cations.\n Current and historical Kubernetes Pod, Deployment, StatefulSet, DaemonSet, Job, and CronJob speci\ufb01cations, including\n YAML and JSON manifests and \ufb01elds identifying container images, commands, arguments, environment variables,\n resource requests, resource limits, runtime classes, mounted \ufb01les, Con\ufb01gMaps, GPU resources, and NVIDIA devices.\n \u00b7 Container-image identi\ufb01cation records.\n\n\n 2 of 6\n\f Case 7:26-mc-00323-DC Document 1-12 Filed 08/18/26 Page 4 of 7\n\n\n Records identifying container images used in connection with any Relevant Workload, including image repository, image\n name, image tag, immutable digest, source registry, base image, image-pull date, and records mapping each image to the\n applicable customer, cluster, namespace, Pod, container, node, or GPU.\n \u00b7 Con\ufb01guration \ufb01les and deployment materials.\n Con\ufb01gMaps, Helm charts, Helm values \ufb01les, Terraform \ufb01les, Kubernetes con\ufb01guration \ufb01les, deployment scripts, startup\n scripts, shell scripts, batch \ufb01les, Slurm job-submission scripts, orchestration \ufb01les, and other con\ufb01guration materials\n \u00b7 Container-runtime and OCI records.\n Containerd metadata, container runtime interface records, OCI runtime speci\ufb01cations, container-creation records,\n runtime con\ufb01guration records, image and snapshot metadata, device-mount records, library-mount records, and other\n runtime records identifying the image, executable, command, arguments, environment variables, mounted \ufb01les, or NVIDIA\n devices.\n \u00b7 Records identifying NVIDIA software used by customers.\n Records identifying NVIDIA software Coreweave makes available to/installed for its customers.\n \u00b7 Software inventories and bills of materials.\n Software bills of materials, package inventories, dependency inventories, image-scanning reports, vulnerability-scanning\n reports, software-composition analyses, package-manager outputs, or similar records identifying software, packages,\n libraries, dependencies, or versions installed in or associated with containers.\n \u00b7 Container-registry proxy and cache records.\n Container-registry proxy logs, registry access logs, image-pull logs, image-cache records, cached OCI or Docker\n manifests, cached image-layer records, layer metadata, repository records, tag records, digest records, and source-\n registry records.\n \u00b7 Kubernetes audit and API-server records.\n Kubernetes audit logs, API-server logs, API request and response records, control-plane records, and historical records\n concerning the creation, modi\ufb01cation, patching, replacement, or deletion of Pods, containers, Jobs, Con\ufb01gMaps,\n Deployments, StatefulSets, or other resources.\n \u00b7 NVIDIA process-accounting and diagnostic outputs.\n nvidia-smi outputs, nvidia-smi pmon outputs, NVML outputs, DCGM process-accounting records, GPU diagnostic\n records, GPU health records, troubleshooting captures, and similar records identifying processes, executable names,\n process IDs, GPU UUIDs, GPU assignments, or GPU memory consumed\n\n\n--\nRocco F. Magni\nPartner | Susman Godfrey LLP\nO\ufb03ce: 713.653.7861\nCell: 512.514.3519\nFirm Bio\nThis e-mail may contain privileged and confidential information. If you received this message in error, please notify the sender and\ndelete it immediately.\nFrom: Adam Kessel \nDate: Monday, July 27, 2026 at 3:10 PM\nTo: Emily Portuguese ; Nick Valencia ; Neil Ramsaroop\n\nCc: Rocco Magni ; Max Tribble ; Brian Melton\n; Tamar Lusztig ; Tanner Laiche\n; Samuel Drezdzon ; Richard Wojtczak\n; Rachel Hanna ; Rachel Solis \nSubject: RE: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\nEXTERNAL Email\n\n\nCounsel\u2014we haven\u2019t received the focused list of topics you agreed to prove two weeks ago, so I suggest we postpone the call we had put on\ncalendar for this afternoon until after you\u2019ve provided that list and we have had an opportunity to investigate.\n\nFrom: Emily Portuguese \nSent: Tuesday, July 14, 2026 6:28 PM\nTo: Nick Valencia ; Adam Kessel ; Neil Ramsaroop \nCc: RMagni@susmangodfrey.com; Max Tribble ; bmelton@susmangodfrey.com; Tamar Lusztig\n; Tanner Laiche ; SDrezdzon@susmangodfrey.com; Richard\nWojtczak ; RHanna@susmangodfrey.com; RSolis@susmangodfrey.com\nSubject: RE: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\n\n 3 of 6\n\f Case 7:26-mc-00323-DC Document 1-12 Filed 08/18/26 Page 5 of 7\n\n\nNick, I just sent an invite. Talk soon.\n\nBest,\nEmily\n\nEmily Portuguese | Susman Godfrey LLP\nOffice: 212.729.2082 Mobile: 973.487.8743\neportuguese@susmangodfrey.com\n\n\nFrom: Nick Valencia \nSent: Tuesday, July 14, 2026 6:22 PM\nTo: Emily Portuguese ; Adam Kessel ; Neil Ramsaroop \nCc: Rocco Magni ; Max Tribble ; Brian Melton\n; Tamar Lusztig ; Tanner Laiche ;\nSamuel Drezdzon ; Richard Wojtczak ; Rachel Hanna\n; Rachel Solis \nSubject: RE: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\nEXTERNAL Email\n\n\nHi Emily,\n\nWe appreciate your willingness to discuss CoreWeave\u2019s proposal and the deposition scheduling. 3:00pm Central on Thursday\nworks for us. Please send a call invite at your convenience.\n\nThank you,\n\nNick Valencia\nAssociate \u25a0 Fish & Richardson P.C.\nT: 713 654 5325 | valencia@fr.com\n\n\nFrom: Emily Portuguese \nSent: Tuesday, July 14, 2026 2:42 PM\nTo: Nick Valencia ; Adam Kessel ; Neil Ramsaroop \nCc: RMagni@susmangodfrey.com; Max Tribble ; bmelton@susmangodfrey.com; Tamar Lusztig\n; Tanner Laiche ; SDrezdzon@susmangodfrey.com; Richard\nWojtczak ; RHanna@susmangodfrey.com; RSolis@susmangodfrey.com\nSubject: RE: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\nHi Nick,\n\nThanks for the below emails. We are willing to discuss the deposition subpoena and CoreWeave\u2019s response, including\nregarding alternative means of providing the relevant information. We are available for a call this Thursday at 12:30pm or\n3pm Central.\n\nSimilarly, we are willing to move the deposition date from July 21 to a date in early August. Please let me know what day\nworks for CoreWeave, subject to availability of the to-be-designated witness.\n\nThanks,\nEmily\n\nEmily Portuguese | Susman Godfrey LLP\nOffice: 212.729.2082 Mobile: 973.487.8743\neportuguese@susmangodfrey.com\n\n\nFrom: Nick Valencia \nSent: Monday, July 13, 2026 5:30 PM\nTo: Emily Portuguese ; Adam Kessel ; Neil Ramsaroop \nCc: Rocco Magni ; Max Tribble ; Brian Melton\n; Tamar Lusztig ; Tanner Laiche ;\nSamuel Drezdzon ; Richard Wojtczak ; Rachel Hanna\n; Rachel Solis \nSubject: RE: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\nEXTERNAL Email\n\n\n 4 of 6\n\f Case 7:26-mc-00323-DC Document 1-12 Filed 08/18/26 Page 6 of 7\n\n\n\nHi Emily,\n\nJust following up on the below. CoreWeave is still evaluating whether it can identify an appropriate witness for the noticed topics\nand would appreciate the opportunity to discuss its proposal regarding alternative means of providing relevant information and\notherwise moving the July 21 deposition to early August.\n\nPlease let us know your availability for a call.\n\nThank you,\n\nNick Valencia\nAssociate \u25a0 Fish & Richardson P.C.\nT: 713 654 5325 | valencia@fr.com\n\n\nFrom: Nick Valencia\nSent: Wednesday, July 8, 2026 10:22 PM\nTo: 'Emily Portuguese' ; Adam Kessel ; Neil Ramsaroop \nCc: RMagni@susmangodfrey.com; Max Tribble ; bmelton@susmangodfrey.com; Tamar Lusztig\n; Tanner Laiche ; SDrezdzon@susmangodfrey.com; Richard\nWojtczak ; RHanna@susmangodfrey.com; RSolis@susmangodfrey.com\nSubject: RE: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\nHi Emily,\n\nI write on behalf of CoreWeave regarding Neural AI\u2019s deposition subpoena, currently set for July 21.\n\nHaving reviewed the noticed topics, most concern NVIDIA software, drivers, and libraries that CoreWeave makes available to its\ncustomers largely on a pass-through basis, rather than software CoreWeave itself developed or has unique knowledge of. As a\nnon-party, CoreWeave needs time to assess whether it can identify and prepare a designee who can meaningfully testify to the\nvarious topics.\n\nGiven that, a deposition may not be the most e[icient way to get Neural AI what it needs. CoreWeave is willing to provide\ninformation about its business, potentially including a declaration, describing its role and its use of NVIDIA hardware and\nsoftware, which we expect will narrow or eliminate the need for testimony on the noticed topics. Preparing a witness on any\ntechnical details that remain will also take time given CoreWeave\u2019s non-party status.\n\nFor both reasons, we ask that the deposition be moved from July 21 to a date in early August, still within the August 11 discovery\ndeadline. CoreWeave has not yet identi\ufb01ed a witness, however, so any date would necessarily be subject to the availability of an\nappropriate witness once one is identi\ufb01ed. Nothing in this proposal is intended to waive CoreWeave\u2019s objections or its right to\nseek relief under Rule 45.\n\nPlease let us know your availability for a call this week or next week to discuss.\n\nThank you,\n\nNick Valencia\nAssociate \u25a0 Fish & Richardson P.C.\nT: 713 654 5325 | valencia@fr.com\n\n\nFrom: Emily Portuguese \nSent: Wednesday, June 24, 2026 3:18 PM\nTo: Olivia Nguyen (Left as of 4/30/2026) ; Adam Kessel ; Neil Ramsaroop \nCc: RMagni@susmangodfrey.com; Max Tribble ; bmelton@susmangodfrey.com; Tamar Lusztig\n; Tanner Laiche ; SDrezdzon@susmangodfrey.com; Richard\nWojtczak ; RHanna@susmangodfrey.com; RSolis@susmangodfrey.com\nSubject: Neural AI v. NVIDIA - Subpoena to CoreWeave, Inc.\n\n\n[This email originated outside of F&R.]\n\n\n\n 5 of 6\n\f Case 7:26-mc-00323-DC Document 1-12 Filed 08/18/26 Page 7 of 7\n\n\nCounsel,\n\nPlease see attached deposition subpoena in Neural AI v. NVIDIA being served on CoreWeave. Please let me know if you\nhave any questions or would like to set up a meet and confer to discuss the topics.\n\nThanks,\nEmily\n\nEmily Portuguese | Susman Godfrey LLP\nOffice: 212.729.2082 Mobile: 973.487.8743\nOne Manhattan West | 50th Floor | New York, New York 10001\nHOUSTON \u2022 LOS ANGELES \u2022 SEATTLE \u2022 NEW YORK\neportuguese@susmangodfrey.com\n\n\n\n\n****************************************************************************************************************************\nThis email message is for the sole use of the intended recipient(s) and may contain confidential and privileged\ninformation. Any unauthorized use or disclosure is prohibited. If you are not the intended recipient, please contact the\nsender by reply email and destroy all copies of the original message.\n****************************************************************************************************************************\n\n\n\n****************************************************************************************************************************\nThis email message is for the sole use of the intended recipient(s) and may contain confidential and privileged\ninformation. Any unauthorized use or disclosure is prohibited. If you are not the intended recipient, please contact the\nsender by reply email and destroy all copies of the original message.\n****************************************************************************************************************************\n\n\n\n****************************************************************************************************************************\nThis email message is for the sole use of the intended recipient(s) and may contain confidential and privileged\ninformation. Any unauthorized use or disclosure is prohibited. If you are not the intended recipient, please contact the\nsender by reply email and destroy all copies of the original message.\n****************************************************************************************************************************\n\n\n\n****************************************************************************************************************************\nThis email message is for the sole use of the intended recipient(s) and may contain confidential and privileged\ninformation. Any unauthorized use or disclosure is prohibited. If you are not the intended recipient, please contact the\nsender by reply email and destroy all copies of the original message.\n****************************************************************************************************************************\n\n\n\n\n 6 of 6\n\f","ocr_status":1,"date_upload":"2026-08-20T04:00:10.909180-07:00","document_number":"1","attachment_number":12,"pacer_doc_id":"181037219955","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 11","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622544/","id":490622544,"tags":[],"absolute_url":"/docket/74666997/1/13/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.561243-07:00","date_modified":"2026-08-23T01:39:43.900943-07:00","sha1":"2e8bf0a6b0e0bad0b8547eb8282d6e411fb941b9","page_count":6,"file_size":103794,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.13.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.13.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-13 Filed 08/18/26 Page 1 of 6\n\n\n\n\n EXHIBIT\n\n 12\n\f Case 7:26-mc-00323-DC Document 1-13 Filed 08/18/26 Page 2 of 6\n\n\n\n\n UNITED STATES DISTRICT COURT\n WESTERN DISTRICT OF TEXAS\n MIDLAND/ODESSA DIVISION\n\n\n NEURAL AI, LLC\n\n Plaintiff, Case No. 7:24-cv-00221-ADA-DTG\n v. JURY TRIAL DEMANDED\n NVIDIA CORPORATION\n\n Defendant.\n\n\n\n\n DECLARATION OF [DECLARANT NAME] REGARDING COREWEAVE, INC.\u2019S\n DEPLOYMENT AND PROVISION OF NVIDIA GPU HARDWARE AND SOFTWARE\n\n I, [DECLARANT NAME], declare as follows:\n\n 1. I am [TITLE] of CoreWeave, Inc. (\"CoreWeave\"). I am over the age of eighteen\n\nand competent to make this declaration. I make this declaration based on my personal knowledge\n\nand a reasonably diligent investigation, including consultation with employees knowledgeable\n\nabout CoreWeave's NVIDIA hardware, software, infrastructure, and customer services and review\n\nof relevant ordinary-course records.\n\n 2. I understand that this declaration is submitted in connection with the subpoenas\n\nserved on CoreWeave on October 16, 2025 and June 24, 2026, in the above-captioned action (the\n\n\u201cSubpoenas\u201d). Unless otherwise stated, capitalized terms have the meanings given in the\n\nSubpoenas, attached as Exhibit A and B.\n\n 3. The relevant period for this declaration is September 13, 2018 through the present.\n\nThis declaration concerns NVIDIA GPU-Acceleration Hardware and NVIDIA GPU-Acceleration\n\nSoftware that were sold, licensed, provided, fulfilled, integrated, deployed, supported, or used in\n\f Case 7:26-mc-00323-DC Document 1-13 Filed 08/18/26 Page 3 of 6\n\n\n\n\nthe United States, or to support or enable customers, products, services, facilities, or other business\n\nactivities located in or directed toward the United States.\n\n 4. CoreWeave is a specialized cloud service provider, NVIDIA customer, and\n\nNVIDIA partner. CoreWeave acquires NVIDIA GPUs and related NVIDIA networking and\n\nsoftware technologies, deploys and operates them in CoreWeave-controlled cloud infrastructure,\n\nand provides customers access to GPU-accelerated computing services.\n\n 5. CoreWeave installs and configures the NVIDIA GPUs and the underlying NVIDIA\n\nsoftware used with those GPUs before customers deploy their own applications, models,\n\ncontainers, data, or other higher-level software. Schedule A identifies the NVIDIA GPUs and\n\nNVIDIA software that CoreWeave deploys, installs, configures, or supports during the relevant\n\nperiod.\n\n 6. CoreWeave provides those GPU-accelerated services directly to customers that use\n\nthe NVIDIA GPUs and software for training, inference, high-performance computing, rendering,\n\nand other GPU-accelerated workloads.\n\n 7. In the ordinary course of business, CoreWeave does not modify the design or\n\nfunctionality of the NVIDIA GPUs or NVIDIA software identified in Schedule A. CoreWeave\n\ninstalls, configures, integrates, tests, deploys, operates, maintains, and supports that hardware and\n\nsoftware consistent with NVIDIA's applicable specifications, reference architectures, instructions,\n\ndocumentation, and technical guidance.\n\n 8. Customers are not required to modify the NVIDIA GPUs or the CoreWeave-\n\nprovisioned NVIDIA software to use CoreWeave's services. Customers generally supply and\n\ncontrol their own applications, models, containers, data, and other higher-level software.\n\n 9. NVIDIA provides or makes available to CoreWeave specifications, reference\n\f Case 7:26-mc-00323-DC Document 1-13 Filed 08/18/26 Page 4 of 6\n\n\n\n\narchitectures, installation and configuration instructions, driver and runtime guidance, deployment\n\ndocumentation, training, technical support, and other assistance concerning the NVIDIA GPUs\n\nand software. CoreWeave relies on those materials and assistance in deploying, operating,\n\nmaintaining, and supporting the NVIDIA hardware and software and in enabling customer use.\n\n 10. CoreWeave customers actually launch and run workloads on the NVIDIA GPUs\n\nusing the NVIDIA drivers, CUDA runtime environment, libraries, and other NVIDIA software\n\nthat CoreWeave installs, configures, or makes available as reflected in Schedule A. CoreWeave's\n\nordinary-course provisioning, scheduling, monitoring, metering, billing, and support records\n\nreflect that customer use.\n\n 11. In the ordinary course of business, CoreWeave understands that its customers also\n\nuse higher-level NVIDIA GPU-Acceleration Software, applications, libraries, and frameworks\n\nbeyond the NVIDIA software CoreWeave preinstalls or configures on the GPU servers.\n\nCoreWeave understands that customers deploy and use that additional software with the NVIDIA\n\nGPUs and underlying NVIDIA software environment provided by CoreWeave to perform their\n\nown workflows and applications.\n\n 12. In CoreWeave's standard configurations, data used for GPU computations is made\n\navailable to the host system and transferred to GPU memory for processing. During or after GPU\n\ncomputation, input data, intermediate results, or output data may remain in GPU memory or may\n\nbe transferred to CPU or host memory, storage, a network, or another GPU. CoreWeave does not\n\nmodify NVIDIA software to alter the standard data-movement functionality provided by NVIDIA.\n\n I declare under penalty of perjury under the laws of the United States of America that the\n\nforegoing is true and correct. Executed on [DATE], in [CITY, STATE].\n\n_______________________________________\n[DECLARANT NAME]\n\f Case 7:26-mc-00323-DC Document 1-13 Filed 08/18/26 Page 5 of 6\n\n\n\n\n[TITLE]\nCOREWEAVE, INC.\nSCHEDULE A\n\f Case 7:26-mc-00323-DC Document 1-13 Filed 08/18/26 Page 6 of 6\n\n\n NVIDIA GPUs AND NVIDIA SOFTWARE DEPLOYED OR CONFIGURED BY COREWEAVE\n\n\n\n CoreWeave deployment or\n NVIDIA GPU architecture and NVIDIA software installed, configured,\n configuration activity; versions, where Relevant date range.\n model or supported for use with the GPU\n maintained\n[INSERT] [INSERT] [INSERT] [INSERT]\n\n\n\n Add rows or attach additional pages as needed.\n\f","ocr_status":1,"date_upload":"2026-08-20T03:59:45.556240-07:00","document_number":"1","attachment_number":13,"pacer_doc_id":"181037219956","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 12","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622545/","id":490622545,"tags":[],"absolute_url":"/docket/74666997/1/14/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.585181-07:00","date_modified":"2026-08-23T02:13:29.352549-07:00","sha1":"a816397b6875ba5641312ec8a6b373ad8773c42d","page_count":3,"file_size":8646083,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.14.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.14.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-14 Filed 08/18/26 Page 1 of 3\n\n\n\n\n EXHIBIT\n\n 13\n\f Case 7:26-mc-00323-DC Document 1-14 Filed 08/18/26 Page 2 of 3\n CoreWeave recognized as a Visionary in the Gartner\u00ae Magic Quadrant\u2122 for Cloud AI Infrastructure. Read the report\n\n\n CoreWeave Cloud Products Solutions Pricing Resources About us Contact us Login\n\n\n\n\n Published on September 5, 2020\n\n\n\n CoreWeave + NVIDIA\n by Brian Venturo\n\n\n\n\n If you\u2019re familiar with our team at CoreWeave, you\u2019ve heard us talk a lot about three core components of our\n cloud infrastructure: an unparalleled scale of compute resources, the broadest selection of high-end NVIDIA\n GPUs on the market, and the industry\u2019s best economics. Today, as we announce that we\u2019ve formally joined the\n Cloud Service Provider Program within the NVIDIA Partner Network (NPN) as a Preferred Partner, we\u2019d like to\n share how this relationship empowers us to deliver on these promises to our clients, and why it has been an\n important part of our business for years.\n\n First, our scale. We have a large fleet of NVIDIA GPUs available on-demand in our fleet. It\u2019s not necessarily the\n volume that makes this significant, but rather the access it provides. Businesses rely on CoreWeave Cloud to run\n the compute intensive workloads that allow them to deliver client projects, hit deadlines, and accommodate\n end-user demand. Having a partner like NVIDIA ensures that we\u2019re able to provide the scale of resources that\n our clients need.\n\n Second, our selection. We maintain a broad selection of NVIDIA GPUs, because the use cases we serve require\n different compute resources. We\u2019ve designed systems that \u201cright-size\u201d workloads, so whether you\u2019re training\n ML models, running inference, rendering or pixel streaming, we can match the complexity of your project with\n the most efficient compute resources. Not more, not less: just right.\n\n And third, our pricing. Our clients find that we\u2019re up to 80% more cost-effective than our competitors. We bill\n when your experiences are ready to serve because, well, if we\u2019re going to talk about usage-based pricing, then\n you should only pay for what you actually use. Our infrastructure is designed to optimize for both performance\n and cost, combining the ideal GPU resources with a suite of value-added services out of the box.\n\n We believe in building a cloud infrastructure that puts our clients\u2019 compute-intensive workloads first. Our\n collaboration with NVIDIA has always allowed us to develop solutions with creators, innovators, and engineers in\n mind. Formally joining the NPN as a Cloud Service Provider Program partner ensures that we\u2019ll be able to\n continue doing so for years to come.\n\n\n\n\n Share this article:\n\n\n\n\n Related Blogs\n\n\n\n\n Celebrating the One Billion Runs What Comes Next: Operating and The AI Loop: Launch Day Is Day One Why AI Factories Need Proof Before Your Ag\n Milestone on Weights & Biases Evolving the Production AI Factory Production Infrastr\n\n\n 3 min read 8 min read 6 min read\n\n\n\n\n Contact us Login\n\n\n\n\nWe use cookies to enhance your browsing experience and analyze site traffic. By continuing to use our site, you consent to our use of cookies.\n\n Products Solutions AI Infrastructure Why CoreWeave Resources About Learn More\n Manage My Cookie\n\n\n GPU Compute AI Model Training Customer Stories About Us\n\f Case 7:26-mc-00323-DC Document 1-14 Filed 08/18/26 Page 3 of 3\n CPU Compute AI Inference Documentation\n CoreWeave recognized as a Visionary in the Gartner\u00ae Magic Quadrant\u2122 for Cloud AI Infrastructure. Read the report Careers\n Storage Services VFX & Rendering Status Life at CoreWeave\n Networking Services CoreWeave Cloud\n Mission Control Products Solutions Pricing Resources About\n Pricingus Contact us\n Newsroom Login\n\n Managed Services Resource Center Investor Relations\n Bare Metal Servers Events & Webinars Supplier Code of\n Platform Conduct\n\n Fleet LifeCycle Privacy Policy\n Controller Terms of Service\n Node LifeCycle Do Not Sell or Share My\n Controller Personal Information\n Tensorizer\n Observability\n\n\n\n\n \u00a9 CoreWeave.\n 290 W Mt Pleasant Ave\n Suite 4100\n Livingston, NJ 07039\n\n\n\n\nWe use cookies to enhance your browsing experience and analyze site traffic. By continuing to use our site, you consent to our use of cookies.\n\n\n Learn More\n\f","ocr_status":1,"date_upload":"2026-08-20T10:23:30.236901-07:00","document_number":"1","attachment_number":14,"pacer_doc_id":"181037219957","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 13","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622546/","id":490622546,"tags":[],"absolute_url":"/docket/74666997/1/15/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.606346-07:00","date_modified":"2026-08-23T01:50:45.863201-07:00","sha1":"f2180d4ee7dc0a0bd954def823640cfb7220fd81","page_count":3,"file_size":8475284,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.15.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.15.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-15 Filed 08/18/26 Page 1 of 3\n\n\n\n\n EXHIBIT\n\n 14\n\f Case 7:26-mc-00323-DC Document 1-15 Filed 08/18/26 Page 2 of 3\n CoreWeave recognized as a Visionary in the Gartner\u00ae Magic Quadrant\u2122 for Cloud AI Infrastructure. Read the report\n\n\n CoreWeave Cloud Products Solutions Pricing Resources About us Contact us Login\n\n\n\n\n Published on July 14, 2021 2 min read\n\n\n\n CoreWeave Becomes NVIDIA\u2019s\n First Elite Cloud Services Provider\n for Compute\n by Max Hjelm\n\n\n\n\n Spe\u00b7cial\u00b7ized: characterized by or exhibiting biological specialization especially : highly differentiated\n especially in a particular direction or for a particular end.\n\n CoreWeave is a specialized cloud, delivering access to NVIDIA GPUs on top of one of the industry\u2019s fastest and\n most flexible cloud infrastructures. We build cloud solutions for compute-intensive use cases that are up to 35x\n faster and 80% less expensive than what has become the industry norm.\n\n As we\u2019ve continued to differentiate ourselves from the large, generalized clouds, it\u2019s become clear that the VFX,\n ML, AI, Batch Processing, and Pixel Streaming use cases desperately need instant access to scale across a wide\n variety of compute, more flexibility from their cloud infrastructure, better support, and more approachable\n pricing. Specialization, in this sense, starts with providing a broad range of compute options for our clients, so\n they can find the right fit for their workloads. We\u2019ve put our money where our mouth is by building one of the\n industry\u2019s most robust offering of NVIDIA GPUs.\n\n Last September, we announced CoreWeave had joined the NVIDIA Partner Network (NPN) as a Preferred\n Cloud Services Provider (CSP). This was a meaningful first step in establishing CoreWeave\u2019s place as the first\n specialized cloud provider.\n\n Today, we\u2019re excited to share that we\u2019re the first Elite CSP for compute in the NPN program.\n\n \u201cNaming CoreWeave as our first Elite partner specialized for compute is a reflection of their ability to deliver\n world-class solutions for AI, ML, HPC and rendering use cases using the breadth of our compute resources,\u201d\n said Matt McGrigg, Director of Global Business Development for Cloud and Strategic Partners at NVIDIA.\n\n Why does it matter?\n\n A central component of the value we deliver to the industry is through our collaboration with NVIDIA. With over\n 10 NVIDIA SKUs available on CoreWeave Cloud, our clients are able to access a variety of GPU types that are\n purpose-built for their use case rather than the \u201cone size fits all\u201d approach found on many other clouds. This is a\n significant reason why we\u2019re able to deliver a performance-adjusted cost that\u2019s up to 80% less expensive than\n the large, generalized clouds.\n\n CoreWeave believes in building a cloud infrastructure that puts our clients\u2019 graphics and compute-intensive\n workloads first. This year, as we\u2019ve scaled our fleet across both the Quadro RTX and NVIDIA Ampere architecture\n GPU series - including the largest deployment of NVIDIA A40 GPUs in North America - we\u2019ve made good on that\n promise to our clients. This next phase of our collaboration with NVIDIA means that we\u2019re positioned to meet our\n clients at an even larger scale, and we can\u2019t wait to share other exciting new developments over the coming\n months.\n\n To learn more about how CoreWeave can accelerate your business\u2019 computing needs, get in touch.\n\n\n\n\n Share this article:\n\n\n\n\nWe use cookies to enhance your browsing experience and analyze site traffic. By continuing toCelebrating\n use our site, you the One\n consent Billion\n to our use of Runs\n cookies. What Comes Next: Operating and The AI Loop: Launch Day Is Day One Why AI Factories Need Proof Before Your Ag\n Milestone on Weights & Biases Evolving the Production AI Factory Production Infrastr\n Manage My Cookie\n Learn More\n\f Case 7:26-mc-00323-DC Document 1-15 Filed 08/18/26 Page 3 of 3\n 3 min read CoreWeave recognized as a Visionary\n 8 min in the Gartner\u00ae Magic Quadrant\u2122 for Cloud AI Infrastructure.6 Read\n read the report\n min read\n\n\n CoreWeave Cloud Products Solutions Pricing Resources About us Contact us Login\n\n\n\n\n Contact us Login\n\n\n\n\n Also of interest First GPUs and Managed Cloud Service Provider AI Enterprise Software Platform and Cloud Function CoreWeave + NVIDIA\n\n\n\n\n Products Solutions AI Infrastructure Why CoreWeave Resources About\n GPU Compute AI Model Training Customer Stories About Us\n CPU Compute AI Inference Documentation Careers\n Storage Services VFX & Rendering Status Life at CoreWeave\n Networking Services Mission Control Pricing Newsroom\n Managed Services Resource Center Investor Relations\n Bare Metal Servers Events & Webinars Supplier Code of\n Platform Conduct\n\n Fleet LifeCycle Privacy Policy\n Controller Terms of Service\n Node LifeCycle Do Not Sell or Share My\n Controller Personal Information\n Tensorizer\n Observability\n\n\n\n\n \u00a9 CoreWeave.\n 290 W Mt Pleasant Ave\n Suite 4100\n Livingston, NJ 07039\n\n\n\n\nWe use cookies to enhance your browsing experience and analyze site traffic. By continuing to use our site, you consent to our use of cookies.\n\n\n Learn More\n\f","ocr_status":1,"date_upload":"2026-08-20T10:23:36.044997-07:00","document_number":"1","attachment_number":15,"pacer_doc_id":"181037219958","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 14","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622547/","id":490622547,"tags":[],"absolute_url":"/docket/74666997/1/16/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.627898-07:00","date_modified":"2026-08-23T02:07:09.028366-07:00","sha1":"18c6c23491adaff6d81f7f6a966cffac0a53bd22","page_count":5,"file_size":1287377,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.16.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.16.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-16 Filed 08/18/26 Page 1 of 5\n\n\n\n\n EXHIBIT\n\n 15\n\f Case 7:26-mc-00323-DC Document 1-16 Filed 08/18/26 Page 2 of 5\n Search Newsroom\n NEWSROOM\n PLATFORMS\nPress Release\nShare\nTweet Twitter\nShare LinkedIn\nShare Facebook\nEmail\n\nNVIDIA\nAUTONOMOUS\n and CoreWeave Strengthen\n CLOUD & DATA CENTER\n Collaboration\n DEEP LEARNING & AI\n to Accelerate Buildout\n DESIGN & PRO HEALTHCARE\n of AI Factories\n HIGH PERFORMANCE SELF-DRIVING CARS\n MACHINES\n CoreWeave to Adopt NVIDIA CPU and Storage Platforms and Multiple NVIDIA Generations VISUALIZATION COMPUTING\n Expanded Relationship to Offer CoreWeave Software to Global CSPs and Enterprises\n\nJanuary 26, 2026\n\n\n\n\n GAMING &\n ENTERTAINMENT\n\n\n\n\n OTHER LINKS\n DEVELOPERS VIEW ALL PRODUCTS\n\n INDUSTRIES GPU TECHNOLOGY CONFERENCE\n\n SHOP NVIDIA BLOG\n\n DRIVERS COMMUNITY\nNVIDIA and CoreWeave, Inc. (NASDAQ: CRWV) today announced an expansion of their long-standing complementary relationship to enable CoreWeave to accelerate the buildout of more than 5 gigawatts of AI factories by 2030 to advance\nAI adoption at global\n SUPPORT scale.\n CAREERS\n\nIn addition, NVIDIA has invested $2 billion in CoreWeave Class A common stock at a purchase price of $87.20 per share. The investment reflects NVIDIA\u2019s confidence in CoreWeave\u2019s business, team and growth strategy as a cloud\n ABOUTbuilt\nplatform NVIDIA TECHNOLOGIES\n on NVIDIA infrastructure.\n\nDemand for AI continues to grow exponentially and the need for compute has never been greater. To help meet this demand, NVIDIA and CoreWeave are deepening their infrastructure, software and platform alignment. The companies intend\nto:\n\n Build AI factories developed and operated by CoreWeave using NVIDIA\u2019s leading accelerated computing platform technology to meet customer demand.\n\n Leverage NVIDIA\u2019s financial strength to accelerate CoreWeave\u2019s procurement of land, power and shell to build AI factories.\n\n Test and validate CoreWeave\u2019s AI-native software and reference architecture, including SUNK and CoreWeave Mission Control, to unlock deeper interoperability and work towards including those offerings within NVIDIA\u2019s reference\n architectures for NVIDIA\u2019s cloud partners and enterprise customers.\n\n Deploy multiple generations of NVIDIA infrastructure across CoreWeave\u2019s platform through early adoption of NVIDIA computing architectures, including the NVIDIA Rubin platform, NVIDIA Vera CPUs and NVIDIA BlueField\u00ae\n storage systems.\n\n\u201cAI is entering its next frontier and driving the largest infrastructure buildout in human history,\u201d said Jensen Huang, founder and CEO of NVIDIA. \u201cCoreWeave\u2019s deep AI factory expertise, platform software and unmatched execution velocity\nare recognized across the industry. Together, we\u2019re racing to meet extraordinary demand for NVIDIA AI factories \u2014 the foundation of the AI industrial revolution.\u201d\n\n\u201cFrom the very beginning, our collaboration has been guided by a simple conviction: AI succeeds when software, infrastructure and operations are designed together,\u201d said Michael Intrator, co-founder, chairman and CEO of CoreWeave.\n\u201cNVIDIA is the leading and most requested computing platform at every phase of AI \u2014 from pre-training to post-training \u2014 and Blackwell provides the lowest cost architecture for inference. This expanded collaboration underscores the\nstrength of demand we are seeing across our customer base and the broader market signals as AI systems move into large-scale production.\u201d\n\nThe collaboration builds on CoreWeave\u2019s purpose-built cloud, software and operational expertise, extending proven capabilities that enable customers to run the most demanding AI workloads efficiently, reliably and at scale.\n\nAbout NVIDIA\nNVIDIA (NASDAQ: NVDA) is the world leader in AI and accelerated computing.\n\nAbout CoreWeave\nCoreWeave is The Essential Cloud for AI\u2122. Built for pioneers by pioneers, CoreWeave delivers a platform of technology, tools, and teams that enables innovators to move at the pace of innovation, building and scaling AI with confidence.\nTrusted by leading AI labs, startups, and global enterprises, CoreWeave serves as a force multiplier by combining superior infrastructure performance with deep technical expertise to accelerate breakthroughs. Established in\n2017, CoreWeave completed its public listing on Nasdaq (CRWV) in March 2025. Learn more at https://coreweave.com/.\n\nNVIDIA Forward-Looking Statements\nCertain statements in this press release including, but not limited to, statements as to: AI entering its next frontier and driving the largest infrastructure buildout in human history; together, NVIDIA and CoreWeave racing to meet extraordinary\ndemand for NVIDIA AI factories\u2014the foundation of the AI industrial revolution; the benefits, impact, and performance of NVIDIA\u2019s products, services, and technologies; expectations with respect to the expansion of the relationship between\nNVIDIA and CoreWeave; expectations with respect to technology developments; expectations with respect to demand for AI; and other statements that are not historical facts are forward-looking statements within the meaning of Section 27A\nof the Securities Act of 1933, as amended, and Section 21E of the Securities Exchange Act of 1934, as amended, which are subject to the \u201csafe harbor\u201d created by those sections based on management\u2019s beliefs and assumptions and on\ninformation currently available to management and are subject to risks and uncertainties that could cause results to be materially different than expectations. Important factors that could cause actual results to differ materially include: global\neconomic and political conditions; NVIDIA\u2019s reliance on third parties to manufacture, assemble, package and test NVIDIA\u2019s products; the impact of technological development and competition; development of new products and technologies or\nenhancements to NVIDIA\u2019s existing product and technologies; market acceptance of NVIDIA\u2019s products or NVIDIA\u2019s partners\u2019 products; design, manufacturing or software defects; changes in consumer preferences or demands; changes in\nindustry standards and interfaces; unexpected loss of performance of NVIDIA\u2019s products or technologies when integrated into systems; and changes in applicable laws and regulations, as well as other factors detailed from time to time in the\nmost recent reports NVIDIA files with the Securities and Exchange Commission, or SEC, including, but not limited to, its annual report on Form 10-K and quarterly reports on Form 10-Q. Copies of reports filed with the SEC are posted on the\ncompany\u2019s website and are available from NVIDIA without charge. These forward-looking statements are not guarantees of future performance and speak only as of the date hereof, and, except as required by law, NVIDIA disclaims any\nobligation to update these forward-looking statements to reflect future events or circumstances.\n\n\u00a9 2026 NVIDIA Corporation. All rights reserved. NVIDIA, the NVIDIA logo and BlueField are trademarks and/or registered trademarks of NVIDIA Corporation in the U.S. and other countries. Other company and product names may be\ntrademarks of the respective companies with which they are associated. Features, pricing, availability and specifications are subject to change without notice.\n\nCoreWeave Forward-Looking Statements\nThis press release contains \u201cforward-looking statements\u201d within the meaning of applicable securities laws. These statements include statements related to the following: the expansion of the relationship between CoreWeave and NVIDIA;\nbuilding more than 5 gigawatts of AI factories by 2030; the possible inclusion of CoreWeave\u2019s software within NVIDIA\u2019s reference architectures for its cloud partners and enterprise customers; and the deployment of multiple generations\nof NVIDIA infrastructure across CoreWeave\u2019s platform. These forward-looking statements are only predictions of future events and may differ materially from actual results due to a variety of factors. The risks and uncertainties that could\ncause actual results to differ from the results predicted are more fully detailed in CoreWeave\u2019s filings with the \u201cSEC\u201d under the heading \u201cRisk Factors,\u201d including in its Quarterly Report on Form 10-Q filed with the SEC for the quarter ended\nSeptember 30, 2025, copies of which may be obtained by visiting CoreWeave\u2019s Investor Relations website at https://investors.coreweave.com or the SEC\u2019s website at www.sec.gov. Forward-looking statements speak only as of the date the\nstatements are made and are based on information available to CoreWeave at the time those statements are made and/or management\u2019s good faith belief as of that time with respect to future events. Such statements are subject to the terms and\nconditions of the collaboration framework and future execution of additional agreements and/or order forms and the satisfaction of certain conditions relating to matters described herein. Such agreements may not be completed or\nmay contain different terms than those currently contemplated. CoreWeave assumes no obligation to update forward-looking statements to reflect events or circumstances after the date they were made, except as required by law.\n\nMedia Contacts\nCorporate Communications\nNVIDIA Corporation\npress@nvidia.com\nToshiya Hari\nInvestor Relations\nNVIDIA Corporation\ntoshiyah@nvidia.com\nCoreWeave Media\npress@coreweave.com\nCoreWeave Investor Relations\n\f Case 7:26-mc-00323-DC Document 1-16 Filed 08/18/26 Page 3 of 5\n Investor-Relations@coreweave.com\n\n Downloads NEWSROOM\n PLATFORMS\n Download Press Release\nPress Release\nShare\nTweet\n More Twitter\n News\nShare LinkedIn\nShare Facebook\nEmail\n\n\n AUTONOMOUS CLOUD & DATA CENTER DEEP LEARNING & AI DESIGN & PRO HEALTHCARE HIGH PERFORMANCE SELF-DRIVING CARS\n MACHINES VISUALIZATION COMPUTING\n\n\n\n\n GAMING &\n ENTERTAINMENT\n\n\n\n\n OTHER LINKS\n NVIDIA Guarantees\n DEVELOPERS SB PRODUCTS\n VIEW ALL Energy's PORTS-Pike Technology Campus in Ohio to Exclusively Host NVIDIA AI Compute\n\n August 17, 2026\n INDUSTRIES GPU TECHNOLOGY CONFERENCE\n\n SHOP NVIDIA BLOG\n\n DRIVERS COMMUNITY\n\n SUPPORT CAREERS\n\n ABOUT NVIDIATECHNOLOGIES\n\n\n\n\n NVIDIA Partners With Apollo, BlackRock, Blackstone, Brookfield, Goldman Sachs and KKR to Establish AI Compute Infrastructure Financing Platforms to Mobilize Over $500 Billion of Third-\n Party Capital\n\n August 10, 2026\n\n\n\n\n NVIDIA Sets Conference Call for Second-Quarter Financial Results\n\n July 29, 2026\n\n\n\n\n Ilya Sutskever\u2019s Safe Superintelligence Inc. and NVIDIA Announce Long-Term Strategic Partnership\n\f Case 7:26-mc-00323-DC Document 1-16 Filed 08/18/26 Page 4 of 5\nJuly 27, 2026\n\n\n NEWSROOM\n PLATFORMS\nPress Release\nShare\nTweet Twitter\nShare LinkedIn\nShare Facebook\nEmail\n\n\n AUTONOMOUS CLOUD & DATA CENTER DEEP LEARNING & AI DESIGN & PRO HEALTHCARE HIGH PERFORMANCE SELF-DRIVING CARS\n MACHINES VISUALIZATION COMPUTING\n\n\n\n\nNVIDIA Expands NVIDIA Agent Toolkit With NVIDIA PhysicsNeMo and CUDA-X Libraries to Transform How the World Engineers, Designs and Builds\n GAMING &\nJuly 26, 2026\n ENTERTAINMENT\nAbout NVIDIA\nNVIDIA (NASDAQ: NVDA) is the world leader in AI and accelerated computing.\n\nAbout\n OTHER CoreWeave\n LINKS\nCoreWeave is The Essential Cloud for AI\u2122. Built for pioneers by pioneers, CoreWeave delivers a platform of technology, tools, and teams that enables innovators to move at the pace of innovation, building and scaling AI with confidence.\n DEVELOPERS\nTrusted by leadingVIEW ALL\n AI labs, PRODUCTS\n startups, and global enterprises, CoreWeave serves as a force multiplier by combining superior infrastructure performance with deep technical expertise to accelerate breakthroughs. Established in\n2017, CoreWeave completed its public listing on Nasdaq (CRWV) in March 2025. Learn more at https://coreweave.com/.\n INDUSTRIES\nNVIDIA GPU TECHNOLOGY\n Forward-Looking Statements CONFERENCE\nCertain statements in this press release including, but not limited to, statements as to: AI entering its next frontier and driving the largest infrastructure buildout in human history; together, NVIDIA and CoreWeave racing to meet extraordinary\ndemand\n SHOP for NVIDIA AI factories\u2014the\n NVIDIA BLOG foundation of the AI industrial revolution; the benefits, impact, and performance of NVIDIA\u2019s products, services, and technologies; expectations with respect to the expansion of the relationship between\nNVIDIA and CoreWeave; expectations with respect to technology developments; expectations with respect to demand for AI; and other statements that are not historical facts are forward-looking statements within the meaning of Section 27A\nof the Securities Act of 1933, as amended, and Section 21E of the Securities Exchange Act of 1934, as amended, which are subject to the \u201csafe harbor\u201d created by those sections based on management\u2019s beliefs and assumptions and on\n DRIVERS currently\ninformation COMMUNITY\n available to management and are subject to risks and uncertainties that could cause results to be materially different than expectations. Important factors that could cause actual results to differ materially include: global\neconomic and political conditions; NVIDIA\u2019s reliance on third parties to manufacture, assemble, package and test NVIDIA\u2019s products; the impact of technological development and competition; development of new products and technologies or\nenhancements\n SUPPORT to NVIDIA\u2019s\n CAREERS existing product and technologies; market acceptance of NVIDIA\u2019s products or NVIDIA\u2019s partners\u2019 products; design, manufacturing or software defects; changes in consumer preferences or demands; changes in\nindustry standards and interfaces; unexpected loss of performance of NVIDIA\u2019s products or technologies when integrated into systems; and changes in applicable laws and regulations, as well as other factors detailed from time to time in the\nmost recent reports NVIDIA files with the Securities and Exchange Commission, or SEC, including, but not limited to, its annual report on Form 10-K and quarterly reports on Form 10-Q. Copies of reports filed with the SEC are posted on the\n ABOUT NVIDIA\ncompany\u2019s websiteTECHNOLOGIES\n and are available from NVIDIA without charge. These forward-looking statements are not guarantees of future performance and speak only as of the date hereof, and, except as required by law, NVIDIA disclaims any\nobligation to update these forward-looking statements to reflect future events or circumstances.\n\n\u00a9 2026 NVIDIA Corporation. All rights reserved. NVIDIA, the NVIDIA logo and BlueField are trademarks and/or registered trademarks of NVIDIA Corporation in the U.S. and other countries. Other company and product names may be\ntrademarks of the respective companies with which they are associated. Features, pricing, availability and specifications are subject to change without notice.\n\nCoreWeave Forward-Looking Statements\nThis press release contains \u201cforward-looking statements\u201d within the meaning of applicable securities laws. These statements include statements related to the following: the expansion of the relationship between CoreWeave and NVIDIA;\nbuilding more than 5 gigawatts of AI factories by 2030; the possible inclusion of CoreWeave\u2019s software within NVIDIA\u2019s reference architectures for its cloud partners and enterprise customers; and the deployment of multiple generations\nof NVIDIA infrastructure across CoreWeave\u2019s platform. These forward-looking statements are only predictions of future events and may differ materially from actual results due to a variety of factors. The risks and uncertainties that could\ncause actual results to differ from the results predicted are more fully detailed in CoreWeave\u2019s filings with the \u201cSEC\u201d under the heading \u201cRisk Factors,\u201d including in its Quarterly Report on Form 10-Q filed with the SEC for the quarter ended\nSeptember 30, 2025, copies of which may be obtained by visiting CoreWeave\u2019s Investor Relations website at https://investors.coreweave.com or the SEC\u2019s website at www.sec.gov. Forward-looking statements speak only as of the date the\nstatements are made and are based on information available to CoreWeave at the time those statements are made and/or management\u2019s good faith belief as of that time with respect to future events. Such statements are subject to the terms and\nconditions of the collaboration framework and future execution of additional agreements and/or order forms and the satisfaction of certain conditions relating to matters described herein. Such agreements may not be completed or\nmay contain different terms than those currently contemplated. CoreWeave assumes no obligation to update forward-looking statements to reflect events or circumstances after the date they were made, except as required by law.\n\n\nMedia Contacts\nGlobal contacts for media inquiries.\n\nAll Contacts\n\nStay Informed\nNewsroom updates delivered to your inbox.\n\nSubscribe\n\f Case 7:26-mc-00323-DC Document 1-16 Filed 08/18/26 Page 5 of 5\n Corporate Information Get Involved\n NEWSROOM\n About NVIDIA Forums\n PLATFORMS\nPress Release Corporate Overview Careers\nShare\nTweet Twitter Technologies Developer Home\nShare LinkedIn\nShare Facebook NVIDIA Research Join the Developer Program\nEmail\n Investors NVIDIA Partner Network\n\n AUTONOMOUS CLOUD & DATA CENTER\n Social Responsibility DEEP LEARNING & AI NVIDIADESIGN\n Inception& PRO HEALTHCARE HIGH PERFORMANCE SELF-DRIVING CARS\n MACHINES NVIDIA Foundation VISUALIZATION\n Resources for Venture Capitalists COMPUTING\n\n Venture Capital (NVentures)\n\n Technical Training\n\n Training for IT Professionals\n\n Professional Services for Data Science\n\n GAMING &\n ENTERTAINMENTNews & Events\n\n\n Newsroom\n OTHER LINKS NVIDIA Blog\n DEVELOPERS VIEW ALL PRODUCTS\n NVIDIA Technical Blog\n\n Webinars\n INDUSTRIES GPU TECHNOLOGY CONFERENCE\n\n Stay Informed\n SHOP NVIDIA BLOG\n Events Calendar\n DRIVERS COMMUNITY\n NVIDIA GTC\n\n SUPPORT CAREERS\n NVIDIA On-Demand\n\n ABOUT NVIDIATECHNOLOGIES\n\n\n\n Sign Up for NVIDIA News Follow NVIDIA\n Subscribe\n\n\n\n\n USA - United States\n\n Privacy Policy Your Privacy Choices Manage Settings Terms of Service Accessibility Corporate Policies Product Security Contact\n\n Copyright \u00a9 2026 NVIDIA Corporation\n\f","ocr_status":1,"date_upload":"2026-08-20T10:23:40.093634-07:00","document_number":"1","attachment_number":16,"pacer_doc_id":"181037219959","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 15","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622548/","id":490622548,"tags":[],"absolute_url":"/docket/74666997/1/17/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.644726-07:00","date_modified":"2026-08-23T02:36:23.596189-07:00","sha1":"2f47408e0990a0da5686d4a3fa39469aef96ffcc","page_count":5,"file_size":2086390,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.17.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.17.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-17 Filed 08/18/26 Page 1 of 5\n\n\n\n\n EXHIBIT\n\n 16\n\f Case 7:26-mc-00323-DC Document 1-17 Filed 08/18/26 Page 2 of 5\n CoreWeave recognized as a Visionary in the Gartner\u00ae Magic Quadrant\u2122 for Cloud AI Infrastructure. Read the report\n\n\n CoreWeave Cloud Products Solutions Pricing Resources About us Contact us Login\n\n\n\n\n Open roles Come build the future with us.\n\n Our diverse, expanding team is always looking for new talent. See our open in-\n office, hybrid, and remote tech jobs\u2014and apply to your perfect fit today.\n\n Explore CoreWeave culture \u2192\n\n Notice on recruitment fraud \u2192\n\n\n\n\n Openings in Europe \u2192\n Openings in Canada \u2192\n Openings in APAC \u2192\n Openings at Weights & Biases \u2192\n\n\n\n\n Search for jobs or keywords\n\n\n Location Team Sort by: Relevance\n\n\n\n 30 Jobs\n\n Data Center\nWe use cookies to enhance your browsing experience and analyze site traffic. By continuing to use our site, you consent to our use of cookies.\n Data Center Technician - Afton, TX\n Afton, TX - DC Learn More\n Manage My Cookies Se\n\f Case 7:26-mc-00323-DC Document 1-17 Filed 08/18/26 Page 3 of 5\n Engineering CoreWeave recognized as a Visionary in the Gartner\u00ae Magic Quadrant\u2122 for Cloud AI Infrastructure. Read the report\n\n\n CoreWeave Cloud Products Solutions Pricing Resources About us Contact us Login\n Fleet Engineering Project Manager, Data Center\n Dallas, TX\n\n Operations Engineer, Fleet Reliability\n Bellevue, WA / New York, NY / Plano, TX - DC / Richmond, VA - DC / Sunnyvale, CA / Washington, DC\n\n Operations Engineering Manager, Fleet Reliability\n Dallas, TX / Livingston, NJ / New York, NY / Sunnyvale, CA / Washington, DC\n\n Staff Storage Engineer, File & Block\n Bellevue, WA / Dallas, TX / Livingston, NJ / New York, NY / San Francisco, CA / Sunnyvale, CA\n\n Staff Storage Engineer, File & Block\n Bellevue, WA / Dallas, TX / Livingston, NJ / New York, NY / San Francisco, CA / Sunnyvale, CA\n\n Staff Storage Engineer, File & Block\n Bellevue, WA / Dallas, TX / Livingston, NJ / New York, NY / San Francisco, CA / Sunnyvale, CA\n\n\n\n Finance\n Director of Controllership Transformation\n Dallas, TX\n\n Director, Operations Accounting Enablement - Fixed Assets\n Dallas, TX\n\n Director, Operations Accounting - Supply Chain\n Dallas, TX\n\n Inventory Accounting Manager, Operations\n Dallas, TX\n\n Manager, Corporate Development (M & A) Accounting\n Dallas, TX / New York, NY / Sunnyvale, CA\n\n Manager, Data Center Operations Accounting\n Dallas, TX\n\n Operations Accounting - Inventory Manager\n Dallas, TX\n\n Senior Accountant, Accounts Payable\n Dallas, TX\n\n Senior Accountant, Debt Accounting\n Dallas, TX\n\n Senior Accountant - Leases\n Dallas, TX\n\n Senior Associate, SEC Reporting & Technical Accounting\n Dallas, TX\n\n Senior Manager, Joint Venture & VIE\n Dallas, TX / New York, NY / Sunnyvale, CA\n\n Senior Manager, Operations Accounting Data Center Infrastructure\n Dallas, TX\n\n Senior Manager, Operations Accounting - Fixed Assets\n Dallas, TX\n\n Senior Manager, Technical Accounting\n Dallas, TX / New York, NY / Seattle, WA / Sunnyvale, CA\n\n\nWe use cookies to enhance your browsing experience and analyze site traffic. By continuing to use our site, you consent to our use of cookies.\n Global Field Organization\n Learn More\n\f Case 7:26-mc-00323-DC Document 1-17 Filed 08/18/26 Page 4 of 5\n CoreWeave recognized as a Visionary in the Gartner\u00ae Magic Quadrant\u2122 for Cloud AI Infrastructure. Read the report\n Solution Specialist, Infrastructure\n Bellevue, WA / Dallas, TX / Livingston, NJ / New York, NY / San Francisco, CA / Sunnyvale, CA\n CoreWeave Cloud Products Solutions Pricing Resources About us Contact us Login\n\n\n\n Marketing\n Senior Front End Web Developer\n Bellevue, WA / Dallas, TX / Livingston, NJ / New York, NY / San Francisco, CA / Sunnyvale, CA\n\n Sr. Website UI/UX Designer\n Bellevue, WA / Dallas, TX / Livingston, NJ / New York, NY / San Francisco, CA / Sunnyvale, CA\n\n\n\n People\n Learning Partner- Technical Development\n Bellevue, WA / Dallas, TX / Sunnyvale, CA\n\n Learning Partner- Technical Development\n Bellevue, WA / Dallas, TX / Sunnyvale, CA\n\n People Program Manager\n Dallas, TX\n\n\n\n Strategic Financing\n Manager, Utility & Energy\n Bellevue, WA / Dallas, TX / Livingston, NJ / New York, NY / Sunnyvale, CA\n\n\n\n Supply Chain & Capacity Operations\n Inventory Control Specialist - Denton, TX\n Denton, TX - DC\n\n\n\n\n Contact us Login\n\n\n\n\n Products Solutions AI Infrastructure Why CoreWeave Resources About\n GPU Compute AI Model Training Customer Stories About Us\n CPU Compute AI Inference Documentation Careers\n Storage Services VFX & Rendering Status Life at CoreWeave\n Networking Services Mission Control Pricing Newsroom\n Managed Services Resource Center Investor Relations\n Bare Metal Servers Events & Webinars Supplier Code of\n Platform Conduct\n\n Fleet LifeCycle Privacy Policy\n Controller Terms of Service\n Node LifeCycle Do Not Sell or Share My\n Controller Personal Information\n Tensorizer\n Observability\n\n\n\n\nWe use cookies to enhance your browsing experience and analyze site traffic. By continuing to use our site, you consent to our use of cookies.\n\n\n Learn More\n\f Case 7:26-mc-00323-DC Document 1-17 Filed 08/18/26 Page 5 of 5\n CoreWeave recognized as a Visionary in the Gartner\u00ae Magic Quadrant\u2122 for Cloud AI Infrastructure. Read the report\n\n \u00a9 CoreWeave.\n 290 W Mt Pleasant Ave CoreWeave Cloud Products Solutions Pricing Resources About us Contact us Login\n Suite 4100\n Livingston, NJ 07039\n\n\n\n\nWe use cookies to enhance your browsing experience and analyze site traffic. By continuing to use our site, you consent to our use of cookies.\n\n\n Learn More\n\f","ocr_status":1,"date_upload":"2026-08-20T10:23:40.773879-07:00","document_number":"1","attachment_number":17,"pacer_doc_id":"181037219960","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 16","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622549/","id":490622549,"tags":[],"absolute_url":"/docket/74666997/1/18/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.665224-07:00","date_modified":"2026-08-23T08:21:45.591362-07:00","sha1":"1ecfd8c405c5a53243d33188ff1788980089152d","page_count":8,"file_size":807355,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.18.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.18.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-18 Filed 08/18/26 Page 1 of 8\n\n\n\n\n EXHIBIT\n\n 17\n\f Case 7:26-mc-00323-DC Document 1-18 Filed 08/18/26 Page 2 of 8\n Don Huffines\n Texas Comptroller of Public Accounts\n\n\n Taxes\nData Centers in Texas\n\nFollowing are lists of all registered Qualifying Data Centers and Qualifying Large Data Center Projects in Texas.\n\n\n Registered Qualifying Data Center Projects\n\n 0-9\n A\n B\n C\n D\n E\n F\n G\n H\n I\n J\n K\n L\n M\n N\n O\n P\n Q\n R\n S\n T\n U\n V\n W\n X\n Y\n\n\n\n\n Z\n\f Case 7:26-mc-00323-DC Document 1-18 Filed 08/18/26 Page 3 of 8\n Z\n\n Effective Owner Registratio Occupant Registrati Operator Registration Exemption E\nData Center Date Owner Name n Number Occupant Name on Number Operator Name Number nd Date\n\n1102 McKinzie LLC Data Cente 02/23/202 1102 McKinzie LLC DC832828-OW1 1102 McKinzie LLC DC832828-OC1 1102 McKinzie LLC DC832828-OP1\nr 4\n\n1242 McKinzie LLC Data Cente 06/11/202 1242 McKinzie LLC DC778911-OW1 1242 McKinzie LLC DC778911-OC1 1102 McKinzie LLC DC778911-OP1\nr 4\n\n3301 Hibbetts Road Data Cente 02/20/202 Coreweave, Inc. DC481494-OC1\nr 4 Core Scientific, Inc. DC481494-OP1\n Coreweave Compute Acquisition DC481494-OP2\n Co. II. LLC DC481494-OP3\n CCAC IV.II, LLC\n\nALE60 Data Center 01/01/202 COPT San Antonio LP DC046706-OW1 Amazon Data Services Inc. DC046706-OC1 Amazon Data Services Inc. DC046706-OP1\n 1\n\nALE61 Data Center 01/01/202 Amazon Data Services Inc. DC271710-OW1 Amazon Data Services Inc. DC271710-OC1 Amazon Data Services Inc. DC271710-OP1\n 1\n\nALE62 Data Center 01/01/202 Amazon Data Services Inc. DC470569-OW1 Amazon Data Services Inc. DC470569-OC1 Amazon Data Services Inc. DC470569-OP1\n 1\n\nAustin Data Center 2 LLC 01/15/202 Austin Data Center 2 LLC DC106300-OW1 Design, LLC DC106300-OC1 Google, LLC DC106300-OP1\n 5\n\nBastrop Project One 12/06/202 Ocean Blockchain LLC DC737649-OW1 Ocean Blockchain LLC DC737649-OC1 Ocean Blockchain LLC DC737649-OP1\n 3\n\nBexar 1 07/24/202 Amazon Data Services, Inc. DC463597-OW1 Amazon Data Services, Inc. DC463597-OC1 Amazon Data Services, Inc. DC463597-OP1\n 6\n\nC1 Dallas - Allen (LOT 1) LLC 11/01/202 C1 Dallas - Allen (LOT 1) LLC DC719806-OW2 Oracle America Cloud Service DC719806-OC2\n 4 s LLC C1 Dallas - Allen (LOT 1) LLC DC719806-OP2\n Oracle America, Inc. DC719806-OP3\n\nC1 Richardson LLC Data Cente 05/08/202 C1 Richardson LLC DC037947-OW1 Coreweave, Inc. DC037947-OC1 C1 Richardson LLC DC037947-OP1\nr 5\n\nCanadian Breaks Data Center 09/05/202 Zephyr Infrastructure LLC DC536163-OW1 American Bitcoin Operating LL DC536163-OC2 Zephyr Infrastructure LLC DC536163-OP1\n 4 C\n\nCedarvale, Barslow/Pyote TX D 01/30/202 Ionic Digital Cedarvale LLC DC961705-OW1 Ionic Digital Mining LLC DC961705-OC1 Ionic Digital Mining LLC DC737649-OP1 03/15/2026\nata Center 4\n\nCipher Black Pearl LLC Data C 02/15/202 Cipher Black Pearl LLC DC470713-OW1 Cipher Black Pearl LLC DC470713-OC1 Cipher Black Pearl LLC DC470713-OP1 01/22/2026\nenter 4\n\nCipher Mining Technologies In 01/24/202 Cipher Mining Technologies Inc. DC453534-OW1 Cipher Mining Technologies In DC453534-OC1 Cipher Mining Technologies Inc. DC453534-OP1\nc. - Odessa Site 3 c.\n\nDFW 9 10/01/202 DB Data Center Red Oak, LLC DC047213-OW1 Oracle America Cloud Service DC047213-OC1 Databank Holdings LTD DC047213-OP1\n 5 s LLC\n\nDFW 10 10/01/202 DB Data Center Red Oak, LLC DC961212-OW1 Oracle America Cloud Service DC961212-OC1 Databank Holdings LTD DC961212-OP1\n 5 s LLC\n\nDFW 11 10/01/202 DB Data Center Red Oak, LLC DC018720-OW1 Oracle America Cloud Service DC018720-OC1 Databank Holdings LTD DC018720-OP1\n 5 s LLC\n\nDFW 12 10/01/202 DB Data Center Red Oak, LLC DC 358218-OW1 Oracle America Cloud Service DC 358218-OC1 Databank Holdings LTD DC358218-OP1\n 5 s LLC\n\nDFW 37 05/14/202 Digital Garland Campbell, L.P. DC310690-OW1 LinkedIn Corporation DC310690-OC1 Digital Garland Campbell, L.P. DC310690-OP1\n 5\n\nDigital Garland 06/13/202 DDI Garland, LLC DC137575-OW2 Wells Fargo Bank, NA DC137575-OC1 DDI Garland, LLC DC137575-OP2\n 2\n\nDory Creek LLC Data Center 04/03/202 Bitdeer Inc. DC470313-OW1 Dory Creek LLC DC470313-OC2 Dory Creek LLC DC470313-OP2\n 3\n\nFort Blocks LLC Data Center 01/01/202 Fort Blocks LLC DC906762-OW1 Fort Blocks LLC DC906762 - OC1 Fort Blocks LLC DC906762-OP1\n 2\n\nFort Haskell Data Center 01/16/202 Fort Haskell LLC DC112125-OW1 Fort Haskell LLC DC1125125-OC1 Fort Haskell LLC DC112125-OP1\n 4\n\nGiga Texas Datacenter 03/25/202 Tesla, Inc. DC541552-OW1 Tesla, Inc. DC541552-OC1 Tesla, Inc. DC541552-OP1 04/09/2024\n 4\n\nHackberry Data Center 12/15/202 Silver Basin Digital Infrastructure LLC DC856324-OW1 American Bitcoin Operating LL DC856324-OC1 Silver Basin Digital Infrastructure LLC LLC DC856324-OP1\n 5 C\n\nHELO1 DC 06/08/202 GALAXY HELIOS I DC589085-OW3 COREWEAVE, INC. DC589085-OC2\n 1 GALAXY HELIOS I DC589085-OP3\n Coreweave Compute Acquisition DC589085-OP4\n Co. III, LLC\n\nHockley Data Center 07/20/202 SF HOUH LLC DC591479-OW1 SF HOUH LLC DC591479-OC1 SF HOUH LLC DC591479-OP1 08/19/2024\n 4\n\nIndependence Data Center 08/20/202 Core42 Holding US LLC DC135257-OC1 Core42 Holding US LLC DC135257-OP1\n 4\n\nLancium Fort Stockton Clean 07/20/202 Lancium LLC DC649982-OW1 Lancium LLC DC649982-OC1 Lancium LLC DC649982-OP1\nCampus 2\n\nLewisville DFW38 04/01/202 DDI Lewisville, LLC DC070821-OW2 Wells Fargo Bank National Ass DC070821-OC1 DDI Lewisville, LLC DC070821-OP2\n 2 ociation\n\nLBB01 Data Center 07/10/202 ALIGNED DATA CENTERS (ABERNA DC239012-OW1 Lambda Procurement, LLC DC239012-OC1 Lambda, Inc. DC239012-OP1\n 6 THY) PROPCO, LLC\n\nLinkedIn Richardson Texas Dat 02/20/201 Collins Technology Park Partners LLC DC022785-OW1 LinkedIn Corporation DC022785-OC1 Collins Technology Park Partners LLC DC022785-OP1 02/20/2029\na Center 4\n\nLonestar Taproot LLC - Pyote 02/15/202 Lonestar Dream Inc. DC638924-OW2 Lonestar Dream Inc. DC638924-OC2 Lonestar Dream Inc. DC638924-OP2 02/25/2026\n 2\n\nLonestar Taproot LLC - Tarbus 02/15/202 Lonestar Dream Inc. DC976606-OW1 Lonestar Dream Inc. DC976606-OC1 Lonestar Dream Inc. DC976606-OP1 02/25/2026\nh 2\n\nMicrosoft Corporation 12/01/201 Microsoft Corporation DC993797-OW1 Microsoft Corporation DC993797-OC1 Microsoft Corporation DC993797-OP1\n 3\n\nMicrosoft San Antonio (SAT14) 08/18/202 Microsoft Corporation DC969263-OW1 Microsoft Corporation DC969263-OC1 Microsoft Corporation DC969263-OP1\n 1\n\nNADC 09/01/201 Microsoft Corporation DC718710-OW1 Chevron USA Inc. DC718710-OC1 McKinstry Essention, LLC DC718710-OP2 09/01/2023\n 3\n\nNTT Global Data Centers Ameri 10/20/202 NTT Global Data Centers TX, LLC DC022646-OW2 Amazon Data Services, Inc. DC022646-OC2 NTT Global Data Centers Americas, Inc. DC022646-OP2\ncas - Dallas TX2 2\n\nNTT Global Data Centers Ameri 10/01/202 NTT Global Data Centers TX, LLC DC324632-OW2 Amazon Data Services, Inc. DC324632-OC2 NTT Global Data Centers Americas, Inc. DC324632-OP3\ncas - Dallas TX3 2\n\f Case 7:26-mc-00323-DC Document 1-18 Filed 08/18/26 Page 4 of 8\nNTT Global Data Centers Ameri 04/18/202 NTT Global Data Centers TX, LLC DC101549-OW2 Amazon Data Services, Inc. DC101549-OC2 NTT Global Data Centers Americas, Inc. DC101549-OP2\ncas - Dallas TX4 4\n\nPrinceton ProjectCo LLC 06/30/202 Princeton ProjectCo LLC DC746759-OW1 Princeton ProjectCo LLC DC746759-OC1 Princeton ProjectCo LLC DC746759-OP1\n 6\n\nProject Star 05/26/202 3350 Marquis LP DC949640-OW1 3350 Marquis LP LP DC949640-OC1 3350 Marquis LP LP DC949640-OP1\n 6\n\nQTS Irving DC3 Data Center 02/09/202 QTS Irving DC3, LLC DC575604-OW1 Microsoft Corporation DC575604-OC1\n 4 QTS Irving DC3, LLC DC575604-OP1\n Quality Technology Services, LL DC575604-OP2\n C\n\nRellis Campus Data and Resea 09/15/202 Rellis Campus Data and Research Ce DC894395-OW1 Rellis Campus Data and Rese DC894395-OC1 Rellis Campus Data and Research Center DC894395-OP1\nrch Center 0 nter LLC arch Center LLC LLC\n\nSan Antonio Data Center II 05/04/201 CyrusOne LLC DC053978-OW1 Microsoft Corporation DC053978-OC1 CyrusOne LLC DC053978-OP1\n 6\n\nSan Antonio Data Center III 05/25/201 CyrusOne LLC DC086194-OW1 Microsoft Corporation DC086194-OC1 CyrusOne LLC DC086194-OP1\n 7\n\nSDC - Austin Tandem Data Cen 03/13/202 SDC - Austin LLC DC590947-OW1 Cirrascale Cloud Services, LL DC590947-OC1 SDC - Austin LLC DC590947-OP1\nter 4 C\n\nSDC DFW VIII, L.P. 03/27/202 SDC DFW VIII, L.P. DC496068-OW1 GOOGLE LLC DC496068-OC1\n 3 SDC DFW VIII, L.P. DC496068-OP1\n Jones Lang La Salle Amercias, In DC496068-OP2\n c. DC496068-OP3\n Design, LLC\n\nSDC SATB1 03/10/202 SDC SA III, L.P. DC615003-OW1 Microsoft Corporation DC615003-OC1 SDC SA III, L.P. DC615003-OP1\n 4\n\nState Farm Richardson Data C 06/01/201 JDM III SF Dallas DC LLC DC245709-OW3 State Farm Mutual Auto Ins. C DC245709-OC1 State Farm Mutual Auto Ins. Co. DC245709-OP1 06/01/2030\nenter 5 o.\n\nStream DFW VII Data Center 02/07/202 SDC DFW VII LP DC338025-OW1 OBOE LLC DC338025-OC1 SDC Technology Services, LLC DC338025-OP1\n 2\n\nStingray 06/26/202 Cipher Stingray LLC DC592871-OW1 Amazon Data Services, Inc. DC592871-OC1 Amazon Data Services, Inc. DC592871-OP1\n 6\n\nSwitch AUS 4 06/26/202 Switch, LTD DC440472-OW1 Coreweave, Inc. DC440472-OC1\n 5 Switch, LTD DC440472-OP1\n Coreweave Compute Acquistion DC440472-OP2\n Co. III, LLC DC440472-OP3\n Coreweave Financing DDTL V-V,\n LLC\n\nTemple Green Data Center 07/23/202 Rowan Moriah LLC. DC362659-OW2 Rhodium Renewables LLC DC362659-OC1 Rowan Moriah LLC. DC362659-OP2\n 1\n\nTX11 Data Center 03/06/202 Vantage Data Centers TX11, LLC DC536960-OW1 Microsoft Corporation DC536960-OC1 11/4/2025\n 4 Vantage Data Centers TX11, LLC DC536960-OP1\n Vantage Data Centers Managem DC536960-OP2\n ent Company LLC\n\nUSBTC Pecos Data Center 04/01/202 U.S. Data Lone Star, Inc. DC062205-OW1 U.S. Data Lone Star, Inc. DC062205-OC1 U.S. Data Lone Star, Inc. DC062205-OP1\n 2\n\nWalnut Springs ProjectCo LLC 06/30/202 Walnut Springs ProjectCo LLC DC822760-OW1 Walnut Springs ProjectCo LLC DC822760-OC1 Walnut Springs ProjectCo LLC DC822760-OP1\n 6\n\nWest Texas Data Center 05/04/202 WTDM OZB LLC DC132838-OW1 WTDM OZB LLC DC132838-OC1 WTDM OZB LLC DC132838-OP1\n 2 TNDS US Corp DC132838-OP2\n\nWhinstone US Data Center 06/30/202 Whinstone US Inc. DC820786-OW1 Whinstone US Inc. DC820786-OC1 Whinstone US Inc. DC820786-OP1\n 0\n\n Registered Qualifying Large Data Center Projects\n\n 0-9\n A\n B\n C\n D\n E\n F\n G\n H\n I\n J\n K\n L\n M\n N\n O\n P\n Q\n R\n S\n T\n U\n V\n W\n X\n Y\n\n\n\n\n Z\n\f Case 7:26-mc-00323-DC Document 1-18 Filed 08/18/26 Page 5 of 8\n Z\n\n Effective Owner Registration Occupant Registra Operator Registration Exemption E\nData Center Date Owner Name Number Occupant Name tion Number Operator Name Number nd Date\n\nAlamo Data Center 11/02/20 Alamo Mission LLC LD543087-OW1 Design LLC LD543087-OC1 Google LLC LD543087-OP1\n 22\n\nBeacon Point 1 Data Center 04-16-20 Beacon Point DC, LLC LD619233-OC2 Beacon Point DC, LLC LD619233-OP2\n 26 Beacon Point Commercial Property LD619233-O\n Owners Association, Inc. W5\n TX Energy Dev, LLC LD619233-O\n Beacon Point DC, LLC W6\n LD619233-O\n W7\n\nBorden County Data Center 11/11/20 Borden County DC, LLC LD179839-OW1 Borden County DC, LLC LD179839-OC1 Borden County DC, LLC LD179839-OP1\n 25\n\nBull Data Center 11/04/20 IE US Development Holdings 5 Inc. LD939441-OW1 IE US Hardware 1 Inc. LD939441-OC1 IE US Development Holdings 5 Inc. LD939441-OP1\n 24\n\nC1 Bosque I 04/07/20 Bosque Parcel 2, LLC LD646862-OW1 Google, LLC LD646862-OC1 Design, LLC LD646862-OP1\n 26\n\nC1 Bosque II LLC 04/13/20 C1 Bosque II LLC LD459723-OW1 Amazon Data Services, In LD459723-OC1 C1 Bosque II LLC LD459723-OP1\n 26 c.\n\nCedarvale, Barslow/Pyote TX Data C 03/16/20 Ionic Digital Cedarvale LLC LD449964-OW1 Nscale Ward County Borro LD449964-OC1\nenter 26 wer SPV, LLC Nscale Ward County, LLC LD449964-OP\n Ionic Digital Mining, LLC 1\n LD449964-OP\n 2\n\nChildress Data Center 08/10/20 IE US Development Holdings 3 Inc. LD926028-OW2 IE US Hardware 4 Inc. LD926028-OC2 IE US Development Holdings 3 Inc. LD926028-OP2\n 22\n\nCinco Data Center 09/11/20 Rowan Cinco LLC LD107783-OW1 Design LLC LD107783-OC1 Google LLC LD107783-OP1\n 25\n\nCipher Barber Lake LLC Data Cente 11/07/20 Cipher Barber Lake LLC LD910271-OW2 Anthropic, PBC LD910271-OC2 Fluidstack USA II INC. LD910271-OP2\nr 25\n\nCipher Black Pearl LLC Data Center 01/23/20 Cipher Black Pearl, LLC LD089477-OW1 Amazon Data Services, In LD089477-OC1 Amazon Data Services, Inc. LD089477-OP1\n 26 c.\n\nCottonwood Data Center 09/12/20 Core Scientific Inc. LD291044-OW1 Core Scientific Inc. LD291044-OC1 Core Scientific Inc. LD291044-OP1\n 25\n\nCutten Data Center 10/10/20 SF HOUC, LLC LD357799-OW1 SF HOUC, LLC LD357799-OC1 SF HOUC, LLC LD357799-OP1\n 24\n\nCyrusone LLC - Houston West III Da 01/31/20 Cyrusone LLC LD797782-OW1 Paile LLC LD797782-OC1 Cyrusone LLC LD797782-OP1\nta Center 22\n\nDenton Data Center 09/19/20 Coreweave Compute Acqui LD394824-OC2\n 24 sition Co V LLC Core Scientific, Inc. LD394824-OP\n Coreweave, Inc. 1\n LD394824-OP\n 2\n\nDFW02 LANCASTER (STACK) 10/31/20 SI DFW02A, LLC LD112589-OW1 SI DFW02A, LLC LD112589-OC1\n 25 SI DFW02A, LLC LD112589-OP\n Stack Infrastructure III TR 1\n C, LLC LD112589-OP\n 2\n\nDFW-04 Data Center 01/27/20 Aligned Data Centers (Plano) Propco, LLC LD325476-OW2 Lambda Cloud Fund II MCI LD325476-OC2 Lambda, Inc. LD325476-OP3\n 26 DAL, LLC\n\nECX AUS11-16 04/24/20 EdgeConnex MCN Austin Property 5, LLC LD344298-OW1 EdgeConnex MCN Austin LD344298-OC1 EdgeConnex MCN Austin Operatio LD344298-OP1\n 26 Operations 5, LLC ns 5, LLC\n\nECX AUS31-36 07/08/20 EdgeConnex MCN Austin Property 7, LLC LLC LD790989-OW1 EdgeConnex MCN Austin LLC LD790989-OC1 EdgeConnex MCN Austin Operatio LLC LD790989-OP1\n 26 Operations 7, LLC ns 7, LLC\n\nEDC AUSTIN, LLC 01/09/20 EDC Austin, LLC LD412491-OW1 EDC Austin, LLC LD412491-OC1 EDC Austin, LLC LD412491-OP1\n 26\n\nEDC Fort Worth, LLC 01/09/20 EDC Fort Worth, LLC LD362584-OC1 EDC Fort Worth, LLC LD362584-OC1\n 26 EDC Fort Worth, LLC LD362584-OP\n CDE Acquisitions, LLC 1\n EDC OPCO, LLC LD362584-OP\n 3\n LD362584-OP\n 2\n\nEdgeConneX AU02 07/11/20 DFW33220N, LLC LD018726-OW1 Coreweave, Inc. LD018726-OC1 DFW33220N Operations 1, LLC LD018726-OP1\n 25\n\nFermi Data Center 1 09/05/20 Fermi Equipment Holdco, L LD669160-OC1\n 25 Fermi Inc. LD669160-O LC Fermi Equipment Holdco, LD669160-OP\n Fermi Equipment Holdco, LLC W1 LLC 1\n Firebird Equipment Holdco, LLC LD669160-O\n Fermi Campus 1, LLC W2\n Fermi Warehouse, LLC LD669160-O\n Fermi High Voltage Warehouse, LLC W3\n Fermi Turbine Warehouse, LLC LD669160-O\n Fermi Mobile Gen, LLC W4\n Fermi Construction LLC LD669160-O\n W5\n LD669160-O\n W6\n LD669160-O\n W7\n LD669160-O\n W8\n LD669160-O\n W9\n\nFlamingo 08/10/20 Amazon Data Services, Inc. LD150969-OW1 Amazon Data Services, In LD150969-OC1 Amazon Data Services, Inc. LD150969-OP1\n 26 c.\n\nFluidstack Abernathy Data Center 01/20/20 FS AB LLC LD921710-OW1 Anthropic, PBC LD921710-OC1 FS AB LLC LD921710-OP1\n 26\n\nFreestone Data Center 03/24/20 C1 Freestone 1, LLC LD484797-OW2 Paile, LLC LD484797-OC1 Paile, LLC LD484797-OP1\n 26\n\nGiga Texas Datacenter 04/10/20 Tesla, Inc. LD369821-OW1 Tesla, Inc. LD369821-OC1 Tesla, Inc. LD369821-OP1\n 24\n\nGulf Horizon Data Center 05/04/20 Amazon Data Services, Inc. LD056837-OW1 Amazon Data Services, In LD056837-OC1 Amazon Data Services, Inc. LD056837-OP1\n 26 c.\n\nHEL02 DC 11/07/20 Galaxy Helios II LLC LD104412-OW1 Coreweave, Inc. LD104412-OC1\n 25 Coreweave, Inc. LD104412-OP\n Galaxy Helios II LLC 1\n LD104412-OP\n 2\n\nHockley Data Center 08/20/20 SF HOUH LLC LD470569-OW1 SF HOUH LLC LD470569-OC1 SF HOUH LLC LD470569-OP1\n 24\n\f Case 7:26-mc-00323-DC Document 1-18 Filed 08/18/26 Page 6 of 8\nHorizon 07/24/20 IE US Development Holdings 3 Inc. LD039871-OW1 IE US HARDWARE 3 LLC LD039871-OC2 IE US Development Holdings 3 Inc. LD039871-OP1\n 25\n\nHutto Data Center Campus LLC 03/10/20 Hutto Data Center Campus LLC LD370879-OW1 Design LLC LD370879-OC1 Google LLC LD370879-OP1\n 25\n\nLancium Abilene Clean Campus 05/26/20 Oracle America Cloud Serv LD565448-OC3\n 22 Lancium LLC LD565448-O ices, LLC Oracle America, Inc. LD565448-OP\n Abilene DC 1, LLC W4 Lancium LLC 3\n LD565448-O Lancium Abilene, LLC LD565448-OP\n W3 4\n LD565448-OP\n 5\n\nLancium Abilene Clean Campus II 04/17/20 Abilene DC 1, LLC LD131731-OW2 Oracle America Cloud Serv LD131731-OC2\n 26 ices, LLC Lancium Abilene, LLC LD131731-OP\n Oracle America, Inc. 2\n LD131731-OP\n 3\n\nLancium Abilene Clean Campus III 01/28/20 Abilene DC 3 LLC LD090472-OW4 Oracle America Cloud Serv LD090472-OC3\n 25 ices, LLC Oracle America, Inc. LD090472-OP\n Lancium LLC 4\n Lancium Abilene, LLC LD090472-OP\n 5\n LD090472-OP\n 6\n\nLancium Abilene Clean Campus IV 03/16/20 Abilene DC 4, LLC LD382318-OW3 Oracle America Cloud Serv LD382318-OC3\n 25 ices, LLC Oracle America, Inc. LD382318-OP\n Lancium LLC 4\n Lancium Abilene, LLC LD382318-OP\n 5\n LD382318-OP\n 6\n\nLancium Abilene Clean Campus V 03/16/20 Abilene DC 5 LLC LD579814-OW3 Oracle America Cloud Serv LD579814-OC3\n 25 ices, LLC Oracle America, Inc. LD579814-OP\n Lancium, LLC 5\n Lancium Abilene, LLC LD579814-OP\n 6\n LD579814-OP\n 7\n\nLancium Abilene Clean Campus VI 03/16/20 Abilene DC 6 LLC LD522306-OW3 Oracle America Cloud Serv LD522306-OC3\n 25 ices, LLC Oracle America, Inc. LD522306-OP\n Lancium LLC 5\n Lancium Abilene, LLC LD522306-OP\n 6\n LD522306-OP\n 7\n\nLancium Abilene Clean Campus VII 03/16/20 Abilene DC 7 LLC LD760309-OW3 Oracle America Cloud Serv LD760309-OC3\n 25 ices, LLC Oracle America, Inc. LD760309-OP\n Lancium, LLC 5\n Lancium Abilene, LLC LD760309-OP\n 6\n LD760309-OP\n 7\n\nLancium Abilene Clean Campus VIII 03/16/20 Abilene DC 8 LLC LD655815-OW3 Oracle America Cloud Serv LD655815-OC3\n 25 ices, LLC Oracle America, Inc. LD655815-OP\n Lancium, LLC 5\n Lancium Abilene, LLC LD655815-OP\n 6\n LD655815-OP\n 7\n\nLancium Clean Campus - Childress 03/25/20 Lancium LLC LD053115-OW1 Lancium LLC LD053115-OC1 Lancium LLC LD053115-OP1\n1 25\n\nLancium Clean Campus - Turkey 1 01/25/20 Lancium Turkey LLC LD264642-OW1 Lancium Turkey LLC LD264642-OC1 Lancium Turkey LLC LD264642-OP1\n 26\n\nLincoln Rackhouse 03/21/20 Coreweave, Inc. LD321266-OC1\n 23 Coreweave, Inc. LD321266-OP\n Coreweave Compute Acqu 1\n isition Co. II, LLC LD321266-OP\n 2\n\nLong Draw Data Center 04/30/20 DDH-LONESTAR-4, LLC LD502572-OW1 DDH-LONESTAR-4, LLC LD502572-OC1 DDH-LONESTAR-4, LLC LD502572-OP1\n 26\n\nMeitner Data Center 04/27/20 IP Meitner DTC, LLC LD893305-OW1 Google LLC LD893305-OC1\n 26 IP Meitner, LLC LD893305-OP\n Design, LLC 1\n Google LLC LD893305-OP\n 2\n LD893305-OP\n 3\n\nMicrosoft Corporation (SAT09 - SAT 12/15/20 Microsoft Corporation LD727073-OW1 Microsoft Corporation LD727073-OC1 Microsoft Corporation LD727073-OP1 12/15/2035\n13) 15\n\nMicrosoft Corporation (SAT 15-17) 04/04/20 Microsoft Corporation LD371323-OW1 Microsoft Corporation LD371323-OC1 Microsoft Corporation LD371323-OP1\n 23\n\nMicrosoft Corporation (SAT 80-85) 03/31/20 Microsoft Corporation LD384204-OW1 Microsoft Corporation LD384204-OC1 Microsoft Corporation LD384204-OP1\n 22\n\nMicrosoft Corporation (SAT 89-90) 04/04/20 Microsoft Corporation LD772702-OW1 Microsoft Corporation LD772702-OC1 Microsoft Corporation LD772702-OP1\n 24\n\nMilam County Data Center 12/09/20 MDC Building 1, LLC LD739472-OW3 Orion DC I, LLC LD739472-OC2 Milam County DC, LLC LD739472-OP1\n 25\n\nMilam County Data Center Phase 2 06/10/20 MDC Building 2, LLC LD449821-OW1 Orion DC I, LLC LD449821-OC1 Milam County DC, LLC LD449821-OP1\n 26\n\f Case 7:26-mc-00323-DC Document 1-18 Filed 08/18/26 Page 7 of 8\nNexus Data Centers 07/21/20 Anthropic, PBC LD738113-OC2\n 25 Nexus Data Centers, LLC LD738113-O Nexus Data Centers, LLC LD738113-OP\n Nexus Hubbard Power, LLC W5 Nexus Operations Hubbar 2\n Nexus Data Centers Hubbard LLC LD738113-O d LLC LD738113-OP\n Nexus Data Center Hubbard B1 LLC W6 Nexus Employee Holdco L 3\n Nexus Data Center Hubbard B2 LLC LD738113-O LC LD738113-OP\n Nexus Data Center Hubbard B3 LLC W7 4\n Nexus Data Center Hubbard B4 LLC LD738113-O\n Nexus Hubbard Power B1 LLC W8\n Nexus Hubbard Power B2 LLC LD738113-O\n Nexus Hubbard Power B3 LLC W9\n Nexus Hubbard Power B4 LLC LD738113-O\n Nexus Hubbard Power CFCO LLC W10\n Nexus Hubbard Power DFCO A-1 LL LD738113-O\n C W11\n Nexus Data Center Hubbard CFCO LD738113-O\n LLC W12\n LD738113-O\n W13\n LD738113-O\n W14\n LD738113-O\n W15\n LD738113-O\n W16\n LD738113-O\n W17\n LD738113-O\n W18\n\nPecos Ranch Data Center 08/10/20 Amazon Data Services, Inc. LD547974-OW1 Amazon Data Services, In LD547974-OC1 Amazon Data Services, Inc. LD547974-OP1\n 26 c.\n\nPolmer LLC Data Center 02/11/20 Polmer LLC LD292979-OW1 Polmer LLC LD292979-OC1 Polmer LLC LD292979-OP1\n 22\n\nPoolside Data Center, Pecos County 10/23/20 Poolside LF Phase 1 DC OPS, LLC LD592430-OW1 Poolside LF Phase 1 DC O LD592430-OC1 Poolside LF Phase 1 DC OPS, LLC LD592430-OP1\nI 25 PS, LLC\n\nPoolside Data Center, Pecos County 03/06/20 Poolside LF Phase 2 DC OPS, LLC LLC LD035616-OW1 Poolside LF Phase 2 DC O LLC LD035616-OC1 Poolside LF Phase 2 DC OPS, LLC LD035616-OP1\nII 26 PS, LLC\n\nPowerCampus Dallas by Lancaster 02/21/20 Lancaster Data Center Campus LP LD502133-OW1 Design, LLC LD502133-OC1 Google, LLC LD502133-OP1\nData Center Campus LP 25\n\nProject Goodnight 06/20/20 GN DC1, LLC LD246216-OC1\n 25 GN DC1, LLC LD246216-O GN DC1, LLC LD246216-OP\n GN DC2, LLC W1 GN DC2, LLC 1\n LD246216-O LD246216-OP\n W2 2\n\nProject Lightning 06/04/20 Vector Lightning, LLC LD146226-OW1 Vector Lightning, LLC LD146226-OC1\n 26 Vector Lightning Energy, L LD146226-OP\n LC 1\n Vector Power US LLC LD146226-OP\n 2\n\nProject Watertower 03/24/20 Redwood Dallas SPV, LLC LD781366-OW1 Yondr USA, LLC LD781366-OC1 Yondr USA, LLC LD781366-OP1\n 26\n\nProject Woodrow 04/15/20 Nolan Ranch DC Owner LLC LD895699-OW1 Nolan Ranch DC Owner LL LD895699-OP1 Nolan Ranch DC Owner LLC LD895699-OP1\n 26 C\n\nPyote Data Center 07/11/20 DDH (North America) Inc. LD442539-OW1 DDH (North America) Inc. LD442539-OC1 DDH (North America) Inc. LD442539-OP1\n 22\n\nRed Oak Texas Data Center 02/14/20 Microsoft Corporation LD711781-OC2 Compass Datacenters, LLC LD711781-OP2\n 22 Compass Datacenters DFW IIIA, LL LD711781-O\n C W1\n Compass Datacenters DFW III, LLC LD711781-O\n Compass Datacenters DFW IIIB, LL W2\n C LD711781-O\n Compass Datacenters DFW IIIC, LL W3\n C LD711781-O\n Compass Datacenters DFW IIID, LL W4\n C LD711781-O\n Compass Datacenters DFW IIIE, LL W5\n C LD711781-O\n W6\n\nRed Oak Texas Data Center 2 03/14/20 Microsoft Corporation LD716523-OC1 Compass Datacenters, LLC LD716523-OP1\n 24 Compass Datacenters DFW IIIJ, LL LD716523-O\n C W1\n Compass Datacenters DFW III, LLC LD716523-O\n Compass Datacenters DFW IIIF, LL W2\n C LD716523-O\n Compass Datacenters DFW IIIG, LL W3\n C LD716523-O\n Compass Datacenters DFW IIIH, LL W4\n C LD716523-O\n Compass Datacenters DFW III-I, LL W5\n C LD716523-O\n W6\n\nRiot Corsicana Data Center 08/22/20 Riot Corsicana, LLC LD575955-OW1 Riot Corsicana, LLC LD575955-OC1 Riot Corsicana, LLC LD575955-OP1\n 23\n\nRiot Corsicana Data Center I 12/12/20 Riot Platforms, Inc. LD571349-OW1 Riot Platforms, Inc. LD571349-OC1\n 25 Riot Platforms, Inc. LD571349-OP\n Riot Corsicana Data Cente 1\n r I. LLC LD571349-OP\n Riot Data Centers, LLC 3 2\n Riot Corsicana, LLC LD571349-OP\n 3\n LD571349-OP\n 4\n\nRiot Corsicana Data Center 02 05/21/20 Riot Platforms, Inc. LD184719-OW1 Riot Platforms, Inc. LD184719-OC1\n 26 Riot Platforms, Inc. LD184719-OP\n RPI Corsicana DC Holding 1\n s LLC LD184719-OP\n Riot Corsicana, LLC 2\n RPI DC Master LLC LD184719-OP\n RPI Corsicana DC Campu 3\n s LLC LD184719-OP\n RPI DFW02-01 DC LLC 4\n Riot DC Logistics LLC LD184719-OP\n 5\n LD184719-OP\n 7\n LD184719-OP\n 8\n\nRiot Rockdale 10/03/20 Riot Platforms, Inc. LD190032-OW2 Riot Platforms, Inc. LD190032-OC2\n 25 Riot Platforms, Inc. LD190032-OP\n Whinstone US, Inc. 3\n Riot Data Centers, LLC LD190032-OP\n 4\n LD190032-OP\n 5\n\f Case 7:26-mc-00323-DC Document 1-18 Filed 08/18/26 Page 8 of 8\nRiot Rockdale Data Center 1 11/18/20 Riot Platforms, Inc. LD118291-OW1 Riot Platforms, Inc. LD118291-OC1\n 25 Riot Platforms, Inc. LD118291-OP\n Riot Rockdale Data Center 1\n 1 LD118291-OP\n Riot Data Centers, LLC 2\n Whinstone, US, Inc. LD118291-OP\n 3\n LD118291-OP\n 4\n\nRiot Rockdale Data Center 2 06/01/20 Riot Platforms, Inc. LD794267-OW1 Riot Platforms, Inc. LD794267-OC1\n 26 Riot Platforms, Inc. LD794267-OP\n RPI Rockdale DC Holdings 1\n LLC LD794267-OP\n RPI DC Master LLC 2\n Whinstone US, Inc. LD794267-OP\n RPI Rockdale DC Campus 3\n LLC LD794267-OP\n RPI AUS01-0H DC LLC 4\n Riot DC Logistics, LLC LD794267-OP\n 5\n LD794267-OP\n 6\n LD794267-OP\n 7\n\nSharka Data Center 10/01/20 Sharka LLC LD693418-OW2 Design LLC LD693418-OC1 Google LLC LD693418-0P1\n 18\n\nSpectrum Data Center 05/21/20 Amazon Data Services, Inc. LD301087-OW1 Amazon Data Services, In LD301087-OC1 Amazon Data Services, Inc. LD301087-OP1\n 26 c.\n\nStampede Data Center 05/21/20 Rowan Stampede LLC LD267274-OW1 Polmer LLC LD267274-OC1 Rowan Stampede LLC LD267274-OP1\n 26\n\nSTN OD1 - Project Landman 06/18/20 RXT POWER, LLC LD784204-OC1 RXT POWER, LLC LD784204-OP1\n 26 RXT POWER, LLC LD784204-O\n STN INCORPORATED W1\n LD784204-O\n W2\n\nSweetwater II 07/15/20 IE US DEVELOPMENT HOLDINGS 7 INC. LD471220-OW1 IE US HARDWARE 1 INC. LD471220-OC1 IE US DEVELOPMENT HOLDING LD471220-OP1\n 25 S 7 INC.\n\nTemple Data Center 01/21/20 Rowan Temple LLC LD294727-OW1 Polmer LLC LD294727-OC1 Rowan Temple LLC LD294727-OP2\n 26\n\nTX11-12 Data Center 11/05/20 Oracle America Cloud Serv LD783253-OC1 Vantage Data Centers Managemen LD783253-OP1\n 25 Vantage Data Centers TX11, LLC LD783253-O ices, LLC t Company, LLC\n Vantage Data Centers TX12, LLC W1\n LD783253-O\n W2\n\nTX21-22 Data Center 11/05/20 Oracle America Cloud Serv LD521147-OC1 Vantage Data Centers Managemen LD521147-OP1\n 25 Vantage Data Centers TX21, LLC LD521147-O ices, LLC t Company, LLC\n Vantage Data Centers TX22, LLC W1\n LD521147-O\n W2\n\nTX 301 Data Center 10/08/20 Vantage Data Centers TX301, LLC LD467875-OW1 Oracle America Cloud Serv LD467875-OC1 Vantage Data Centers TX301, LLC LD467875-OP1\n 25 ices LLC\n\nTX 302 Data Center 10/08/20 Vantage Data Centers TX302, LLC LD960266-OW1 Oracle America Cloud Serv LD960266-OC1 Vantage Data Centers TX302, LLC LD960266-OP1\n 25 ices LLC\n\nTX 303 Data Center 10/08/20 Vantage Data Centers TX303, LLC LD394708-OW2 Oracle America Cloud Serv LD394708-OC1 Vantage Data Centers TX303, LLC LD394708-OP2\n 25 ices LLC\n\nTX 304 Data Center 10/08/20 Vantage Data Centers TX304, LLC LD753524-OW1 Oracle America Cloud Serv LD753524-OC1 Vantage Data Centers TX304, LLC LD753524-OP1\n 25 ices LLC\n\nTX 305 Data Center 10/08/20 Vantage Data Centers TX305, LLC LD677523-OW1 Oracle America Cloud Serv LD677523-OC1 Vantage Data Centers TX305, LLC LD677523-OP1\n 25 ices LLC\n\nTX 306 Data Center 10/08/20 Vantage Data Centers TX306, LLC LD881935-OW1 Oracle America Cloud Serv LD881935-OC1 Vantage Data Centers TX306, LLC LD881935-OP1\n 25 ices LLC\n\nTX 307 Data Center 10/08/20 Vantage Data Centers TX307, LLC LD696769-OW1 Oracle America Cloud Serv LD696769-OC1 Vantage Data Centers TX307, LLC LD696769-OP1\n 25 ices LLC\n\nTX 308 Data Center 10/08/20 Vantage Data Centers TX308, LLC LD772770-OW1 Oracle America Cloud Serv LD772770-OC1 Vantage Data Centers TX308, LLC LD772770-OP1\n 25 ices LLC\n\nTX 309 Data Center 10/08/20 Vantage Data Centers TX309, LLC LD884265-OW1 Oracle America Cloud Serv LD884265-OC1 Vantage Data Centers TX309, LLC LD884265-OP1\n 25 ices LLC\n\nTX 310 Data Center 10/08/20 Vantage Data Centers TX310, LLC LD781786-OW1 Oracle America Cloud Serv LD781786-OC2 Vantage Data Centers TX310, LLC LD781786-OP1\n 25 ices LLC\n\nWinner LLC d/b/a Ernst LLC 06/22/20 Winner LLC d/b/a Ernst LLC LD771235-OW1 Winner LLC d/b/a Ernst LL LD771235-OC1 Winner LLC d/b/a Ernst LLC LD771235-OP1 06/22/2035\n 15 C\n\nWurldwide LLC DBA Statue LLC 09/17/20 Wurldwide LLC DBA Statue LLC LD801559-OW1 Wurldwide LLC DBA Statu LD801559-OC1 Wurldwide LLC DBA Statue LLC LD801559-OP1\n 25 e LLC\n\f","ocr_status":1,"date_upload":"2026-08-20T10:23:34.340213-07:00","document_number":"1","attachment_number":18,"pacer_doc_id":"181037219961","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 17","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622550/","id":490622550,"tags":[],"absolute_url":"/docket/74666997/1/19/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.698125-07:00","date_modified":"2026-08-23T02:36:22.381991-07:00","sha1":"701c8bbc1c0f370e74cdc003090d206ddb6c1eef","page_count":18,"file_size":219096,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.19.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.19.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-19 Filed 08/18/26 Page 1 of 18\n\n\n\n\n EXHIBIT\n\n 18\n\f Case 7:26-mc-00323-DC Document 1-19 Filed 08/18/26 Page 2 of 18\n\n\n\n\n UNITED STATES DISTRICT COURT\n FOR THE WESTERN DISTRICT OF TEXAS\n MIDLAND-ODESSA DIVISION\nNEURAL AI, LLC )\n )\n )\n Plaintiff, )\nv. ) Civil Action No. 7:24-cv-00221\n )\nNVIDIA CORPORATION )\n ) JURY TRIAL DEMANDED\n )\n Defendant. )\n\n\n PLAINTIFF\u2019S AMENDED DISCLOSURE OF ASSERTED CLAIMS AND FINAL\nINFRINGEMENT CONTENTIONS PURSUANT TO THE COURT\u2019S STANDING ORDER\n GOVERNING PATENT PROCEEDINGS\n\n Pursuant to the Court\u2019s December 2, 2025 Order (Dkt. 132), the First Amended Scheduling\n\n Order (Dkt. 135), and the Parties December 29, 2025 Joint Stipulation (Dkt. 136), Plaintiff Neural\n\n AI, LLC (\u201cNeural AI\u201d or \u201cPlaintiff\u201d) provides the following Disclosure of Asserted Claims and\n\n Final Infringement Contentions (\u201cDisclosure\u201d) as to U.S. Patent Nos. 8,648,867 (\u201cthe \u2019867\n\n Patent\u201d), RE49,461 (\u201cthe \u2019461 Patent\u201d), and RE48,438 (\u201cthe \u2019438 Patent\u201d) (collectively, the\n\n \u201cAsserted Patents\u201d or \u201cPatents-in-Suit\u201d) against Defendant Nvidia Corporation (\u201cNvidia\u201d or\n\n \u201cDefendant\u201d). This Disclosure is made solely for the purpose of this action.\n\n Pursuant to the Court\u2019s December 2, 2025 Order (Dkt. 132), Plaintiff identifies source code\n\n for each accused instrumentality based on Nvidia\u2019s productions prior to November 30, 2025.\n\n Nvidia continues to produce source code on a rolling basis. Plaintiff therefore expressly reserves\n\n the right to serve additional or supplemental claim chart exhibits identifying newly produced or\n\n previously unavailable source code that satisfies the asserted claim elements, including after\n\n service of this Disclosure. Moreover, Plaintiff\u2019s investigation regarding infringement and\n\n additional potential grounds of infringement is ongoing. Nvidia\u2019s has not produced all necessary\n\n 1\n\f Case 7:26-mc-00323-DC Document 1-19 Filed 08/18/26 Page 3 of 18\n\n\n\ntechnical documents or source code sufficient to show the operation of the Accused Products, and\n\nkey categories of technical materials, including source code, remain outstanding. See, e.g., Dkt.\n\n103, 125. This Disclosure is therefore based upon information that Plaintiff has been able to obtain\n\nand review to date, together with its good-faith beliefs regarding the Accused Products and their\n\noperation, and is made without prejudice to Plaintiff\u2019s right to supplement or amend its Disclosure\n\nas additional facts are ascertained, discovery is conducted, code is reviewed, analysis is done, and\n\nresearch is completed. Plaintiff reserves the right to amend and/or supplement its infringement\n\ncontentions as additional information becomes available.\n\n For each Asserted Patent, Plaintiff identifies the following Accused Products of which it is\n\ncurrently aware. The identification of Accused Products is based on Plaintiff\u2019s research and\n\nanalysis to date, without the benefit of full discovery. Indeed, Nvidia has not yet complied with\n\nits obligation under the OGP to produce sufficient \u201ctechnical documents, including software where\n\napplicable, sufficient to show the operation of the accused product(s).\u201d See, e.g., Dkt. 103, 125.\n\nNvidia has continued to belatedly produce source code well into the fact discovery period\u2014\n\nincluding most recently on January 13, 2026\u2014and has not produced related technical documents,\n\nand Plaintiff has been required to repeatedly press Nvidia to obtain these late and piecemeal\n\nproductions. As a result, Plaintiff\u2019s current identification of Accused Products is necessarily based\n\non publicly available and otherwise accessible information. Accordingly, Plaintiff\u2019s current\n\nidentification is based on publicly available and otherwise accessible information. Plaintiff\n\nexpressly reserves the right to amend or supplement these contentions\u2014including by identifying\n\nadditional Accused Products or asserting additional bases for infringement\u2014under the applicable\n\nrules and any Court orders, including to reflect future productions by Nvidia.\n\n Accused Products. The Accused Products, as described in the accompanying Exhibits 1\u2013\n\n599 and any later-served amended or supplemental Exhibits, comprise integrated combinations of\n\n 2\n\f Case 7:26-mc-00323-DC Document 1-19 Filed 08/18/26 Page 4 of 18\n\n\n\nNvidia\u2019s software and hardware that together implement GPU-accelerated computing. These\n\ninclude Nvidia\u2019s GPU accelerators and superchips; Nvidia\u2019s computers, supercomputers, data\n\ncenters, servers, and workstations incorporating those GPUs; and the full Nvidia software stack\n\nthat operates on and controls that hardware to enable accelerated execution.\n\n Based on its present understanding of Nvidia\u2019s infringing software architecture and how\n\nthe accused functionality is implemented across Nvidia\u2019s integrated hardware and software stack,\n\nNeural AI has organized its infringement charts by Nvidia application in Exhibits 100-199. These\n\napplication charts further reference sub-charts identifying hardware described in Exhibits 1-99 as\n\nwell as software and libraries described in Exhibits 200-599. The sub charts are broken out as\n\nfollows: Exhibits 1\u201399 include hardware such as Nvidia\u2019s GPU accelerators and superchips, and\n\nNvidia\u2019s computers, supercomputers, data centers, servers, workstations that implement its GPU\n\naccelerators and superchips, coupling of some of this hardware to CPUs, as well as information on\n\nNvidia\u2019s infringing software products and CUDA code. Exhibits 100-199 include Nvidia\u2019s\n\napplication frameworks and platforms. Application frameworks and platforms processed by the\n\nhardware, in turn, call on lower-level Nvidia software. Exhibits 200\u2013299 include Nvidia\u2019s\n\nmachine-learning frameworks and inference platforms used by these applications, including\n\nPyTorch and TensorRT. Exhibits 300\u2013399 include Nvidia\u2019s neural-network primitive libraries,\n\nacceleration libraries, and functions, including cuDNN and related components. Exhibits 400\u2013499\n\ninclude Nvidia\u2019s mathematical libraries. Exhibits 500\u2013599 include low-level CUDA runtime,\n\ndriver, memory-management components, memory maps, and sub-component code used in the\n\nCUDA stack.\n\n This organization reflects Neural AI\u2019s present understanding of Nvidia\u2019s software\n\narchitecture. Nvidia has not produced a complete source-code production for any bucket or\n\ncategory, and Neural AI therefore expressly reserves the right to chart additional software,\n\n 3\n\f Case 7:26-mc-00323-DC Document 1-19 Filed 08/18/26 Page 5 of 18\n\n\n\nlibraries, or components, and to modify or supplement its chart organization and infringement\n\ntheories as discovery continues. Moreover, the charts provided within each category are\n\nrepresentative of other similar Nvidia software, libraries, and components within that same\n\ncategory. Neural AI has charted exemplar implementations rather than every produced file, and\n\nreserves the right to rely on other Nvidia software and libraries within the same category as\n\nadditional accused instrumentalities.\n\n In further details, the Accused Products include, without limitation, the following: Nvidia\u2019s\n\nGPU accelerators and superchips, including those with Nvidia\u2019s \u201cBlackwell,\u201d \u201cHopper,\u201d \u201cAda\n\nLovelace,\u201d \u201cAmpere,\u201d \u201cTuring,\u201d \u201cVolta,\u201d \u201cPascal,\u201d and \u201cMaxwell\u201d GPU architectures. These\n\nGPUs and superchips implement, and are specifically designed for, GPU-acceleration for artificial\n\nintelligence and neural networks.\n\n Nvidia\u2019s Blackwell GPUs include RTX PRO 6000 Server Edition, RTX PRO 6000\n\nWorkstation, RTX PRO 6000 Max-Q Workstation, RTX PRO 6000, RTX PRO 5000, RTX PRO\n\n4500, RTX PRO 4000, RTX PRO 3000, RTX PRO 2000, RTX PRO 1000, RTX PRO 500, RTX\n\n5090, RTX 5090 D, RTX 5080, RTX 5070 Ti, RTX 5070, RTX 5060, RTX 5060 Ti, RTX 5050,\n\nRTX 5080 Laptop, RTX 5090 Laptop, RTX 5070 Ti Laptop, RTX 5060 Laptop, RTX 5070\n\nLaptop, and RTX 5050 Laptop. In addition, Nvidia\u2019s superchips that implement GPU accelerators\n\ninclude the GB300 and GB200.\n\n Nvidia\u2019s Hopper GPUs include the H100 and H200 GPUs, including by not limited to\n\nPCle, SXM, and NVL models. In addition, Nvidia\u2019s superchips that implement GPU accelerators\n\ninclude the GH200, or Grace Hopper Superchip, which implements the Hopper-GPU architecture.\n\n Nvidia\u2019s Ada Lovelace (or Lovelace) GPUs include Nvidia Data Center GPUs, including\n\nL40, L40S, and L4 GPUs; Nvidia Workstation and Professional Laptop GPUs, including RTX\n\nAda Generations series GPUs and Laptop GPUs (including RTX 6000, RTX 6000 Ada, RTX 5000\n\n 4\n\f Case 7:26-mc-00323-DC Document 1-19 Filed 08/18/26 Page 6 of 18\n\n\n\nAda, RTX 4500 Ada, RTX 4050, RTX 4000 Ada, RTX 4000 SFF, RTX 3500, RTX 3050, RTX\n\n3000, RTX 2000, RTX 1000, RTX 500); and GeForce RTX 40 series GPUs and Laptop GPUs\n\n(RTX 4090, RTX 4080 SUPER, RTX 4070 Ti SUPER, RTX 4070 SUPER, RTX 4070, RTX 4060\n\nTi, and RTX 4060; GeForce RTX 4090 Laptop GPU, GeForce RTX 4080 Laptop GPU, GeForce\n\nRTX 4070 Laptop GPU, GeForce RTX 4060 Laptop GPU, GeForce RTX 4050 Laptop GPU).\n\n Nvidia\u2019s Ampere GPUs include Nvidia Data Center GPUs, including A100, A40, A30,\n\nA16, A10, and A2 GPUs; Nvidia Workstation and Professional Laptop GPUs, including RTX A\n\nseries GPUs and Laptop GPUs (A800 40GB Active, RTX A6000, RTX A5500, RTX A5000, RTX\n\nA4500, RTX A4000, RTX A2000, RTX A2000 12GB, RTX A1000, RTX A400, RTX A5500,\n\nRTX A4500, RTX A3000 12GB, RTX A2000 8GB, RTX A1000 6GB, RTX A500); GeForce\n\nRTX 30 series GPUs and Laptop GPUs (GeForce RTX 3090 Ti, GeForce RTX 3090, GeForce\n\nRTX 3080 Ti, GeForce RTX 3080, GeForce RTX 3070 Ti, GeForce RTX 3070, GeForce RTX\n\n3060 Ti, GeForce RTX 3060, GeForce RTX 3050 (8 GB), GeForce RTX 3050 (6 GB), GeForce\n\nRTX 3080 Ti Laptop GPU, GeForce RTX 3080 Laptop GPU, GeForce RTX 3070 Ti Laptop GPU,\n\nGeForce RTX 3070 Laptop GPU, GeForce RTX 3060 Laptop GPU, GeForce RTX 3050 Ti Laptop\n\nGPU, GeForce RTX 3050 Laptop GPU); and GeForce MX570 Laptop GPU.\n\n Nvidia\u2019s Turing GPUs include Nvidia Data Center GPUs, including Tesla T4 GPUs and\n\nQuadro RTX 8000 (passive) and Quadro RTX 6000 (passive) GPUs; Nvidia Workstation and\n\nProfessional Laptop GPUs, including T series GPUs and Laptop GPUs, Quadro T series Laptop\n\nGPUs, and Quadro RTX series GPUs and Laptop GPUs (Quadro RTX 8000, Quadro RTX 6000,\n\nQuadro RTX 5000, Quadro RTX 4000, Quadro RTX 3000, Quadro T2000, T1000 8GB, T1200,\n\nQuadrio T1000, T1000 (4GB), T600, T550, T500 T400, T400 4GB); Titan series Titan RTX GPU;\n\nGeForce RTX 20 series GPUs and Laptop GPUs (GeForce RTX 2080 Ti, GeForce RTX 2080\n\nSuper, GeForce RTX 2080, GeForce RTX 2070 Super, GeForce RTX 2070, GeForce RTX 2060\n\n 5\n\f Case 7:26-mc-00323-DC Document 1-19 Filed 08/18/26 Page 7 of 18\n\n\n\nSuper, GeForce RTX 2060, GeForce RTX 2500); GeForce GTX 16 series GPUs and Laptop GPUs\n\n(GeForce GTX 1660 Ti, GeForce GTX 1660 Super, GeForce GTX 1660, GeForce GTX 1650 Ti,\n\nGeForce GTX 1650 Super, GeForce GTX 1650 (G5), GeForce GTX 1650 (G6), GeForce GTX\n\n1650, GeForce GTX 1630); and GeForce MX550, MX450, and MX430 Laptop GPUs.\n\n Nvidia\u2019s Volta GPUs include Nvidia Data Center GPUs, including the Tesla V100 GPU;\n\nNvidia Workstation GPUs, including Quadro GV100; and Titan series Titan V GPU.\n\n Nvidia\u2019s Pascal GPUs include Nvidia Data Center GPUs, including Tesla P100, P40, and\n\nP4 GPUs; Nvidia Workstation and Professional Laptop GPUs, including the Quadro GP100 GPU\n\nand Quadro P series GPUs and Laptop GPUs (Quadro P6000, Quadro P5200, Quadro P5000,\n\nQuadro P4200, Quadro P4000, Quadro P3200, Quadro P3000, Quadro P2200, Quadro P2000,\n\nQuadro P1000, Quadro P620, Quadro P600, Quadro P520, Quadro P500, Quadro P400); Titan\n\nseries Titan Xp and Titan X GPUs; GeForce GTX 10 series GPUs and Laptop GPUs (GeForce\n\nGTX 1080 Ti, GeForce GTX 1080, GeForce GTX 1070 Ti, GeForce GTX 1070, GeForce GTX\n\n1060, GeForce GTX 1050 Ti, GeForce GTX 1050); and GeForce MX300 series, MX200 series,\n\nand MX150 Laptop GPUs.\n\n Nvidia\u2019s Maxwell GPUs include Nvidia Data Center GPUs, including Tesla M60, M40,\n\nand M10 GPUs; Nvidia Workstation and Professional Laptop GPUs, including Quadro M series\n\nGPUs and Laptop GPUs (Quadro M6000 24GB, Quadro M6000 (12GB), Quadro M5000, Quadro\n\nM5000M, Quadro M5500, Quadro M4000, Quadro M4000M, Quadro M3000M, Quadro M2200,\n\nQuadro M2000, Quadro M2000M, Quadro M1200, Quadro M1000M, Quadro M620, Quadro\n\nM600M, Quadro M520, Quadro M500M), the NVS 810 GPU, and Tesla M6 series Laptop GPUs;\n\nTitan series GTX Titan X GPU; GeForce GTX 900 series GPUs and Laptop GPUs (GeForce GTX\n\n980Ti, GeForce GTX 980, GeForce GTX 970, GeForce GTX 960, GeForce GTX 980M, GeForce\n\nGTX 970M, GeForce GTX 965M, GeForce GTX 960M, GeForce GTX 950M); GeForce GTX\n\n 6\n\f Case 7:26-mc-00323-DC Document 1-19 Filed 08/18/26 Page 8 of 18\n\n\n\n700 series GPUs and Laptop GPUs (GeForce GTX 750 Ti, GeForce GTX 750); and GeForce\n\nMX130 series and MX110 Laptop GPUs.\n\n The Accused Products further include Nvidia\u2019s computers, supercomputers, data centers,\n\nservers, and workstations that implement its GPU accelerators and superchips. These computer\n\nhardware systems include: the DGX line of supercomputers, the HGX line of supercomputers, the\n\nOVX line of supercomputers, and the EGX line of servers for data centers and edge devices.\n\nNvidia\u2019s DGX supercomputers include the DGX B300, DGX B200, DGX GB200, DGX GB300,\n\nDGX Spark, DGX Station, DGX SuperPOD with GB300, DGX SuperPOD with GB200, DGX\n\nH200, DGX BasePOD, DGX A100, and DGX SuperPOD with DGX GB200. Nvidia\u2019s HGX\n\nincludes least the HGX B300, HGX B200, HGX H100, HGX H200, and EoS SuperPOD. And\n\nNvidia\u2019s EGX includes at least EGX Server with Quadro RTX A6000, EGX Server with A40,\n\nEGX Server with Quadro RTX 8000, EGX Server with Quadro RTX 6000), GB300 NVL72,\n\nGB200 NVL72.\n\n The Accused Products include Nvidia\u2019s software, platforms, libraries, and services for\n\naccelerated computing. These products include, without limitation, application frameworks,\n\nplatforms, and domains such as NVIDIA Drive, Isaac, Holoscan, RAPIDS, NVBlox, NeMo,\n\nMerlin, Modulus, MONAI, Morpheus, Riva, Maxine, Clara, Metropolis, Tokkio, Avatar, NIM\n\nMicroservices, Omniverse, Clara Train, TAO, DRIVE Sim, DLSS, PhysX, OptiX, Texture Tools,\n\nJetPack, DeepStream, DOCA, Magnum IO, Aerial, BioNeMo, CUDA-X HPC, Unified Compute\n\nFramework, AI Enterprise, the DGX Platform, NGC, and AI Foundation Models. Application\n\nframeworks and platforms processed by the hardware, in turn, call on lower-level Nvidia software.\n\nThe Accused Products further include machine-learning frameworks and inference platforms such\n\nas PyTorch, TensorRT, Triton, TensorFlow, Torch-TensorRT, JAX, and Spark. They also include\n\nneural-network, mathematical, and acceleration libraries such as cuDNN, cuFFT, cuDSS,\n\n 7\n\f Case 7:26-mc-00323-DC Document 1-19 Filed 08/18/26 Page 9 of 18\n\n\n\ncuSOLVER, cuRAND, CUTLASS, DALI, cuTensor, cuGraph, cuSPARSELt, NPP, NeuralVDB,\n\ncuNumeric, cuCIM, Sionna, cuBLAS, cuSPARSE, NCCL, Thrust, CUB, AmgX, and nvmath-\n\npython. The Accused Products further include low-level CUDA runtime, driver, and system\n\ncomponents, including CUDA, the CUDA Toolkit, CUDA Runtime and Driver components,\n\nCUDA Python, CUDA Quantum, Base Command, GPNVAPI, NVSHMEM, DCGM, Displaced\n\nMicro-Mesh, FLARE, GVDB Voxels, KickstartRT, Mesh Shading, Optical Flow, PTX, SASS,\n\nkernel implementations, firmware, scheduling logic, backend libraries, the CUDA Driver Internal\n\nLayer (CUI), CUDA Driver API, vGPU, GPUDirect, NVML, and other associated runtime, driver,\n\nand sub-component code. The Accused Products further include other Nvidia software, platforms,\n\nand services that implement similar accelerated computing functionality or operate using the same\n\nCUDA-based execution models, architectures, libraries, and runtime components, whether or not\n\nexpressly listed above. The Accused Products also encompass associated and underlying software\n\nlibraries and components that enable or support accelerated execution and any source code or sub-\n\ncomponent code necessary to understand or effect CUDA execution, whether or not separately\n\nanalyzed.\n\n The Accused Products further include (1) any additional products identified in the\n\naccompanying Exhibits 1\u2013599 attached hereto and any later-served amended or supplemental\n\nExhibits; (2) any products that include the same functionality or features described in the Exhibits;\n\nand (3) any prior or subsequent versions of the products identified in the Exhibits that include the\n\nsame features or functionality.\n\n The Accused Products infringe each of the Asserted Patents in a manner fully consistent\n\nwith the Court\u2019s Claim Construction Order (Dkt. 95). For example, as construed, the Accused\n\nProducts implement the claimed \u201caccelerator\u201d as hardware, software, or a combination thereof that\n\nneed not be physically separate from the CPU. The Accused Products likewise perform the claimed\n\n 8\n\f Case 7:26-mc-00323-DC Document 1-19 Filed 08/18/26 Page 10 of 18\n\n\n\nmethod steps in a pipelined and overlapping manner that satisfies the Court\u2019s ordering\n\nrequirements for the asserted claims of the \u2019867 and \u2019438 patents, including parallel execution\n\nwhere permitted and the specific sequencing constraints identified by the Court.\n\n On information and belief, the asserted claim elements charted for one chip architecture\n\nare evidenced by documentation and source code pertaining to the Accused Products for other chip\n\narchitectures, for which the Accused Products have capabilities and functionalities that are\n\nsubstantially the same for the asserted claim elements. Indeed, this is reflected by the different chip\n\narchitectures of the Accused Products sharing materially similar technical specifications and\n\noverlapping documentation as each Accused Product pertains to the accused claim elements.\n\nLikewise, the software implementations analyzed and charted are representative of other related\n\nNvidia software products that rely on the same CUDA-based execution models, libraries, runtime\n\ncomponents, and architectural design choices, and that therefore implement the asserted claim\n\nelements in substantially the same manner such as, for example, performing a math operation or\n\ncomputation in a neural network.\n\n The present infringement contentions also accuse Nvidia\u2019s newly announced Vera CPU\n\nand Rubin GPU products. Neural AI will supplement its infringement contentions as Nvidia\n\nproduces additional information and as these products become commercially available. The\n\npresent infringement contentions further accuse Nvidia\u2019s Jetson hardware products, which, based\n\non information obtained during ongoing fact and expert discovery, infringe one or more Asserted\n\nClaims. Neural AI will supplement its infringement contentions as Nvidia produces additional\n\ninformation regarding these products.\n\n These Final Infringement Contentions are based on public evidence and the limited\n\ndiscovery and source code made available by Nvidia to date, which largely consists of a single\n\nsoftware version for each accused application or library. Nvidia\u2019s has not produced all necessary\n\n 9\n\f Case 7:26-mc-00323-DC Document 1-19 Filed 08/18/26 Page 11 of 18\n\n\n\ntechnical documents or source code sufficient to show the operation of the Accused Products, and\n\nkey categories of technical materials and code remain outstanding. See, e.g., Dkt. 103, 125.\n\nDiscovery and expert analysis are ongoing and include, among other things, the multiple software\n\nversions and builds that may be used in combination, as well as additional libraries and software\n\nfunctions that infringe the asserted claims under the same theories reflected in the claim charts.\n\nThese include, for example, acceleration libraries and functions that infringe the claims in the same\n\nmanner as the cuDNN CTCLoss and RNNForward functions in the two cuDNN source-code\n\nversions produced by Nvidia. Accordingly, Plaintiff expressly reserves the right to amend,\n\nsupplement, or refine these contentions as additional facts are ascertained, discovery is conducted,\n\nanalysis is performed, and research is completed. Plaintiff further reserves the right to amend or\n\nsupplement its Disclosure under the applicable rules and any Court orders, including to reflect\n\nfuture productions by Nvidia.\n\n Defendant\u2019s Infringement. Based upon currently available information, Plaintiff\n\nidentifies the following asserted claims:\n\n \u2022 The \u2019867 Patent. Defendant has infringed and is infringing claims 16-19, literally and/or\n\n under the doctrine of equivalents. Defendant has infringed and is infringing these\n\n claims both directly and indirectly (by inducing infringement pursuant to 35 U.S.C. \u00a7\n\n 271(b) and/or by contributing to infringement pursuant to 35 U.S.C.\u00a7 271(c)).\n\n \u2022 The \u2019461 Patent. Defendant has infringed and is infringing claims 21-25, 27-30,\n\n literally and/or under the doctrine of equivalents. Defendant has infringed and is\n\n infringing these claims both directly and indirectly (by inducing infringement\n\n pursuant to 35 U.S.C. \u00a7 271(b) and/or by contributing to infringement pursuant to 35\n\n U.S.C.\u00a7 271(c)).\n\n \u2022 The \u2019438 Patent. Defendant has infringed and is infringing claims 1, 3-6, 8-9, 12, 14,\n 10\n\f Case 7:26-mc-00323-DC Document 1-19 Filed 08/18/26 Page 12 of 18\n\n\n\n 17-18, 21-23, 29-30, 32, 40, 43-44, 46, 48, 51-52, 55-57, literally and/or under the\n\n doctrine of equivalents. Defendant has infringed and is infringing these claims both\n\n directly and indirectly (by inducing infringement pursuant to 35 U.S.C. \u00a7 271(b) and/or\n\n by contributing to infringement pursuant to 35 U.S.C. \u00a7 271(c)).\n\n Based upon currently available information, Plaintiff asserts that Defendant has infringed\n\nand/or continues to infringe the patents and claims as identified and described in the infringement\n\ncharts for the Accused Products attached as the accompanying Exhibits 1\u2013599 and any later-served\n\namended or supplemental Exhibits. These exhibits contain illustrative examples of Defendant\u2019s\n\npresently known infringement of the Asserted Claims by evidencing the correspondence between\n\n(i) elements of the Asserted Claims and (ii) corresponding structures and/or functions of the\n\nAccused Products. Such examples are illustrative and not exhaustive, additional materials may\n\nevidence infringement, and additional bases of infringement may be present and uncovered during\n\ndiscovery. Plaintiff reserves the right to amend or supplement its Disclosure, including the\n\nattached claim charts, upon Nvidia\u2019s compliance with its discovery obligations.\n\n Each element of each asserted claim is presently alleged to be literally present. However,\n\nto the extent Defendant argues that a limitation is not literally present in the Accused Products, then\n\nDefendant still infringes under the doctrine of equivalents. Any differences alleged to exist\n\nbetween any of the Asserted Claims and any of the Accused Products are insubstantial, and\n\ntherefore each Accused Product also meets each limitation under the doctrine of equivalents, as the\n\nidentified features of the Accused Product perform substantially the same function in substantially\n\nthe same way to achieve substantially the same result as the corresponding claim limitations.\n\nPlaintiff reserves the right to supplement this Disclosure as discovery is conducted, Defendant\n\nprovides any alleged non-infringement positions, and claim construction is completed.\n\n Defendant directly infringes each of the asserted claims under 35 U.S.C. \u00a7271(a) at least\n\n 11\n\f Case 7:26-mc-00323-DC Document 1-19 Filed 08/18/26 Page 13 of 18\n\n\n\nby using, operating, testing, advertising, making, installing, maintaining, distributing, supporting,\n\nproviding instructions for, offering to sell, selling, and/or otherwise providing services including\n\nthe Accused Products\u2014or systems incorporating the Accused Products\u2014within the United States\n\nand/or importing the Accused Products into the United States. Defendant also directly infringes\n\neach of the claims at least by performing, or being responsible for the performance of (e.g., the\n\nacts are attributable to it), each of the claimed steps as set forth in the accompanying charts.\n\nDefendant\u2019s acts of direct infringement are further set forth in the accompanying Exhibits and any\n\nlater-served amended or supplemental Exhibits.\n\n Defendant also indirectly infringes the Asserted Claims by inducing infringement pursuant\n\nto 35 U.S.C. \u00a7 271(b)). Defendant has had knowledge of each of the asserted patents and of the\n\nspecific manner by which the Accused Products infringe each patent since at least September 2024,\n\nwhen Plaintiff filed and served its original complaint. Defendant knowingly induced one or more\n\nthird parties (e.g., business partners, customers, or others), to infringe the Asserted Claims by\n\nmaking the Accused Products available on Defendant\u2019s website, widely advertising the Accused\n\nProducts, providing applications that allow partners and users to access the Accused Products,\n\nproviding instructions for installing the Accused Products, and providing technical support to users\n\nand/or engaging in activities that aid and abet infringement of the Asserted Patents by end users\n\nwithin the United States, with knowledge and intent that performance of such actions would\n\ninfringe the Asserted Claims. Defendant committed these acts with knowledge or willful blindness\n\nthat such induced acts would constitute infringement of the Asserted Claims at least as of the filing\n\nof the original complaint. Defendant also has had actual or constructive notice of the technology\n\nclaimed in the Asserted Patents since at least 2007, when the inventors of the Asserted Patents first\n\ndiscussed their patented technologies with Mr. Sanford Russell, then the CTO of Nvidia. In\n\naddition, the inventors of the Asserted Patents held multiple discussions with Nvidia regarding a\n\n 12\n\f Case 7:26-mc-00323-DC Document 1-19 Filed 08/18/26 Page 14 of 18\n\n\n\npotential investment in or acquisition of their company, Neurala, Inc., and its assets, including the\n\npatent family that includes the Asserted Patents. Defendant knew or should have known that it\n\ninfringed the Asserted Patents based on its knowledge of the same. Alternatively or additionally,\n\nDefendant was willfully blind to the fact that it infringed the Asserted Patents despite its\n\nknowledge of the same, based on, for example, Defendant\u2019s having cited the application for the\n\n\u2019867 Patent on the face of its own patent since at least June 28, 2010, see Nvidia U.S. Patent No.\n\n8,922,566, and the similarity of the Accused Products to Plaintiff\u2019s patented technology.\n\nAdditional evidence of Defendant\u2019s inducement of infringement by others is set forth in each of\n\naccompanying Exhibits.\n\n Defendant also indirectly infringes the Asserted Claims by contributing to infringement\n\npursuant to 35 U.S.C. \u00a7 271(c). Each of the Accused Products is a material part of the claims, and\n\nDefendant knew each of the Accused Products is especially made or especially adapted for use in\n\nan infringement of the Asserted Claims. Further, the Accused Products have no substantial non-\n\ninfringing uses, as set forth in the example claim charts.\n\n Defendant also contributes to infringement by its customers and end users of the Accused\n\nProducts by offering to sell or selling within the United States or importing into the United States\n\nthe Accused Products, which are for use in practicing, and under normal operation practice,\n\nmethods claimed in the Asserted Patents, constituting a material part of the inventions claimed,\n\nand not a staple article or commodity of commerce suitable for substantial non-infringing use.\n\nIndeed, the Accused Products and the exemplary functionality identified in the accompanying\n\nExhibits have no substantial non-infringing uses but instead are specifically designed to practice\n\nthe Asserted Patents. Additional evidence of Defendant\u2019s contributory infringement is set forth in\n\neach of the Exhibits and any later-served amended or supplemental Exhibits.\n\n Priority Dates. Plaintiff presently identifies the following priority dates for the Asserted\n\n 13\n\f Case 7:26-mc-00323-DC Document 1-19 Filed 08/18/26 Page 15 of 18\n\n\n\nPatents:\n\n \u2022 All Asserted Claims of the \u2019867 Patent are entitled to a priority date corresponding\n\n to the conception of the claimed inventions, which occurred no later than February\n\n 25, 2005. The conception of the inventions claimed in the \u2019867 Patent was followed\n\n by continuous diligence and actual reduction to practice of the claimed inventions\n\n no later than December 14, 2005. Following the actual reduction to practice of the\n\n claimed invention, there was constructive reduction to practice corresponding to\n\n the filing of U.S. Provisional Application No. 60/826,892 on September 25, 2006.\n\n See NAI_0007731-NAI_0007923.\n\n \u2022 All Asserted Claims of the \u2019461 Patent are entitled to a priority date corresponding\n\n to the conception of the claimed inventions, which occurred no later than February\n\n 25, 2005. The conception of the inventions claimed in the \u2019461 Patent was followed\n\n by continuous diligence and actual reduction to practice of the claimed inventions\n\n no later than December 14, 2005. Following the actual reduction to practice of the\n\n claimed inventions, there was constructive reduction to practice corresponding to\n\n the filing of U.S. Provisional Application No. 60/826,892 on September 25, 2006.\n\n See NAI_0007731-NAI_0007923.\n\n \u2022 All Asserted Claims of the \u2019438 Patent are entitled to a priority date corresponding\n\n to the conception of the claimed inventions, which occurred no later than February\n\n 25, 2005. The conception of the inventions claimed in the \u2019438 Patent was followed\n\n by continuous diligence and actual reduction to practice of the claimed inventions\n\n no later than December 14, 2005. Following the actual reduction to practice of the\n\n claimed inventions, there was constructive reduction to practice corresponding to\n\n the filing of U.S. Provisional Application No. 60/826,892 on September 25, 2006.\n\n 14\n\f Case 7:26-mc-00323-DC Document 1-19 Filed 08/18/26 Page 16 of 18\n\n\n\n See NAI_0007731-NAI_0007923.\n\n Plaintiff\u2019s investigation and analysis is ongoing, and Plaintiff reserves the right to assert and\n\nrely on an earlier invention date in the event Defendant identifies alleged prior art that dated earlier\n\nthan the identified priority date corresponding to a date of conception followed by diligence and\n\nreduction to practice of the claimed inventions.\n\n\n\n DATED: January 20, 2026 Respectfully submitted,\n\n /s/ Tanner Laiche\n Max L. Tribble\n Texas State Bar 20213950\n Brian D. Melton\n Texas State Bar 24010620\n Rocco Magni\n Texas State Bar 24092745\n Samuel Drezdzon\n Texas State Bar 24117374\n SUSMAN GODFREY L.L.P.\n 1000 Louisiana\n Suite 5100\n Houston, TX 77002\n Telephone: (713) 651-9366\n Facsimile: (713) 654-6666\n mtribble@susmangodfrey.com\n bmelton@susmangodfrey.com\n rmagni@susmangodfrey.com\n sdrezdzon@susmangodfrey.com\n\n Tamar Lusztig\n NY State Bar 5125174\n Emily Portuguese\n NY State Bar 5920327\n One Manhattan West, 50th Floor\n New York, NY 10001\n tlusztig@susmangodfrey.com\n eportuguese@susmangodfrey.com\n\n Tanner Laiche\n WA State Bar 60450\n 401 Union Street, Suite 3000\n Seattle, WA 98101\n tlaiche@susmangodfrey.com\n 15\n\fCase 7:26-mc-00323-DC Document 1-19 Filed 08/18/26 Page 17 of 18\n\n\n\n\n Mark D. Siegmund\n Texas State Bar No. 24117055\n CHERRY JOHSON SIEGMUND\n JAMES PC\n Bridgeview Center\n 7901 Fish Pond Road, 2nd Floor\n Waco, Texas 76710\n msiegmund@cjsjlaw.com\n\n Max Ciccarelli\n Texas State Bar No. 00787242\n CICCARELLI LAW FIRM LLC\n 100 N. 6th Street, Suite 502\n Waco, Texas 76701\n Max@CiccarelliLawFirm.com\n\n Attorneys for Plaintiff Neural AI, LLC\n\n\n\n\n 16\n\f Case 7:26-mc-00323-DC Document 1-19 Filed 08/18/26 Page 18 of 18\n\n\n\n\n CERTIFICATE OF SERVICE\n\n The undersigned hereby certifies that a true and correct copy of the foregoing document has\n\nbeen served on January 20, 2026 to all counsel of record via electronic mail.\n\n\n\n /s/ Tanner Laiche\n Tanner Laiche\n\n\n\n\n 17\n\f","ocr_status":1,"date_upload":"2026-08-20T10:23:36.907344-07:00","document_number":"1","attachment_number":19,"pacer_doc_id":"181037219962","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 18","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622551/","id":490622551,"tags":[],"absolute_url":"/docket/74666997/1/20/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.717792-07:00","date_modified":"2026-08-23T02:39:30.914325-07:00","sha1":"ed37caf8aeac0ff2af514d73e5f0d0d7a35b38a2","page_count":47,"file_size":458402,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.20.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.20.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-20 Filed 08/18/26 Page 1 of 47\n\n\n\n\n EXHIBIT\n\n 19\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 2 of1 47\n of 46\n\n\n\n\n IN THE UNITED STATES DISTRICT COURT\n FOR THE WESTERN DISTRICT OF TEXAS\n PUBLIC VERSION\nNEURAL AI, LLC\n Civil Action No. 7:24-cv-00221\n Plaintiff,\n\n v. JURY TRIAL DEMANDED\n\nNVIDIA CORPORATION.,\n\n Defendant.\n\n\n DEFENDANT\u2019S AMENDED ANSWER TO PLAINTIFF\u2019S AMENDED COMPLAINT\n\n Defendant NVIDIA Corporation (\u201cNVIDIA\u201d) hereby provides its amended answer to\n\nPlaintiff Neural AI, LLC\u2019s (\u201cPlaintiff\u201d) Amended Complaint for Patent Infringement (Dkt. 30)\n\n(\u201cComplaint\u201d). The headings and subheadings in Defendant\u2019s Answer are used solely for purposes\n\nof convenience and organization to mirror those appearing in the Complaint; to the extent that any\n\nheadings or other non-numbered statements in the Complaint contain or imply any allegations,\n\nDefendant denies each and every allegation therein. Except as expressly admitted, all allegations\n\nin the Complaint are denied.\n\n 1. Defendant admits that graphics processor units may be used for artificial\n\nintelligence, machine learning, or complex numerical simulation applications. Defendant admits\n\nthat GPU computing powers many of the most advanced and powerful forms of artificial\n\nintelligence over the past decade. Defendant denies the remaining allegations of Paragraph 1.\n\n 2. Defendant admits that graphics processor units may be used for complex numerical\n\nsimulation, machine learning, and training complex models. Defendant further admits that\n\ngraphics processor units typically have more computational processors than central processing\n\nunits and are capable of parallel processing. Defendant does not have knowledge or information\n\n\n\n\n 1\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 3 of2 47\n of 46\n\n\n\n\nsufficient to form a belief as to the truth of the remaining allegations contained in Paragraph 2 and\n\non that basis denies them.\n\n 3. Defendant denies the allegations in Paragraph 3 of the Complaint.\n\n 4. Defendant denies the allegations in Paragraph 4 of the Complaint.\n\n NATURE OF THE CASE\n\n 5. Defendant admits that Plaintiff has asserted claims for patent infringement arising\n\nunder 35 U.S.C. \u00a7 1, et seq., but denies all of Plaintiff\u2019s allegations of infringement. Except as\n\nexpressly admitted, Defendant denies the remaining allegations in Paragraph 5 of the Complaint.\n\n 6. Defendant does not have knowledge or information sufficient to form a belief as to\n\nthe truth of the allegations contained in Paragraph 6 and on that basis denies them.\n\n 7. Defendant does not have knowledge or information sufficient to form a belief as to\n\nthe truth of the allegations contained in Paragraph 7 and on that basis denies them.\n\n 8. Defendant does not have knowledge or information sufficient to form a belief as to\n\nthe truth of the allegations contained in Paragraph 8 and on that basis denies them.\n\n 9. Defendant admits that Defendant is a Delaware corporation with its headquarters\n\nin Santa Clara, California. Defendant further admits that it is registered to conduct business in\n\nTexas. Defendant further admits that it has an office in Austin, Texas. Except as expressly\n\nadmitted, Defendant denies the remaining allegations in Paragraph 9 of the Complaint.\n\n JURISDICTION & VENUE\n\n 10. Defendant admits that Plaintiff purports to assert claims for patent infringement\n\narising under 35 U.S.C. \u00a7 1, et seq., but denies all claims of infringement by Defendant. Defendant\n\nadmits that the Court has subject matter jurisdiction pursuant to 28 U.S.C. \u00a7\u00a7 1331 and 1338(a).\n\n\n\n\n 2\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 4 of3 47\n of 46\n\n\n\n\nExcept as expressly admitted, Defendant denies the remaining allegations in Paragraph 10 of the\n\nComplaint.\n\n 11. Defendant admits that this Court has personal jurisdiction for the purpose of this\n\nparticular action and that it does business in Texas and in this District. Except as expressly\n\nadmitted, Defendant denies the remaining allegations in Paragraph 11 of the Complaint.\n\n 12. Defendant admits that Defendant has conducted business in within this District, but\n\ndenies all allegations of infringement. Except as expressly admitted, Defendant denies the\n\nremaining allegations in Paragraph 12 of the Complaint.\n\n 13. Defendant admits that this Court has personal jurisdiction for the purpose of this\n\nparticular action. To the extent the allegations of Paragraph 13 purport to quote from or\n\ncharacterize the contents of written documents, those documents speak for themselves. Defendant\n\ndenies the remaining allegations in Paragraph 13 of the complaint.\n\n 14. Defendant admits that venue is proper for this case but denies that it is a convenient\n\nforum for NVIDIA and its witnesses. Except as expressly admitted, Defendant denies the\n\nremaining allegations in Paragraph 14 of the complaint.\n\n 15. Defendant Nvidia Corporation is a registered business in Texas and has regular and\n\nestablished places of business Defendant admits that it is a registered business in Texas and\n\nmaintains an office located at 11001 Lakeline Blvd, Suite 100 Bldg. 2, Austin, Texas 78717. To\n\nthe extent the allegations of Paragraph 15 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 15 of the complaint.\n\n\n\n\n 3\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 5 of4 47\n of 46\n\n\n\n\n 16. Defendant admits that it has hundreds of employees in this District. Defendant does\n\nnot have knowledge or information sufficient to form a belief as to the truth of the remaining\n\nallegations contained in Paragraph 16 and on that basis denies them.\n\n 17. Defendant admits that it has open job postings for jobs that may be filled in a\n\nnumber of locations, including in this District. Defendant does not have knowledge or information\n\nsufficient to form a belief as to the truth of the remaining allegations contained in Paragraph 17\n\nand on that basis denies them.\n\n 18. Defendant admits that it engages it engages in business in this District. Defendant\n\nadmits that it has customer-facing personnel and operations in this District. Defendant admits that\n\nit provides technical support to partners and customers for its products in this District. Except as\n\nexpressly admitted, Defendant denies the remaining allegations in Paragraph 18 of the Complaint.\n\n 19. Defendant denies the allegations in Paragraph 19 of the Complaint.\n\n 20. Defendant admits that it sells products and provides services in the State of Texas,\n\nbut denies that those products or services infringe the Asserted Patents. To the extent the\n\nallegations in Paragraph 20 of the Complaint relate to the knowledge or actions of third parties,\n\nDefendant does not have knowledge or information sufficient to form a belief as to the truth of\n\nthose allegations and on that basis denies them. Except as expressly admitted, Defendant denies\n\nthe remaining allegations in Paragraph 20 of the Complaint.\n\n 21. Defendant admits that it sells products and provides services in the State of Texas,\n\nbut denies that the use of those products or services infringes the Asserted Patents. To the extent\n\nthe allegations in Paragraph 21 of the Complaint relate to the knowledge or actions of third parties,\n\nDefendant does not have knowledge or information sufficient to form a belief as to the truth of\n\n\n\n\n 4\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 6 of5 47\n of 46\n\n\n\n\nthose allegations and on that basis denies them. Except as expressly admitted, Defendant denies\n\nthe remaining allegations in Paragraph 21 of the Complaint.\n\n 22. Defendant admits that it partners with resellers and managed service providers for\n\nthe sale or installation of certain NVIDIA products. To the extent the allegations of Paragraph 22\n\npurport to quote from or characterize the contents of websites, those documents speak for\n\nthemselves. Except as expressly admitted, Defendant denies the remaining allegations in\n\nParagraph 22 of the Complaint.\n\n 23. Defendant admits that it partners with data center providers. To the extent the\n\nallegations of Paragraph 23 purport to quote from or characterize the contents of written\n\ndocuments, those documents speak for themselves. To the extent the allegations in Paragraph 23\n\nof the Complaint relate to the knowledge or actions of third parties, Defendant does not have\n\nknowledge or information sufficient to form a belief as to the truth of those allegations and on that\n\nbasis denies them. Except as expressly admitted, Defendant denies the remaining allegations in\n\nParagraph 23 of the Complaint.\n\n 24. Defendant denies the allegations in Paragraph 24 of the Complaint.\n\n 25. To the extent the allegations of Paragraph 25 purport to quote from or characterize\n\nthe contents of websites, those websites speak for themselves. Defendant denies the remaining\n\nallegations in Paragraph 25 of the Complaint.\n\n 26. To the extent the allegations of Paragraph 26 purport to quote from or characterize\n\nthe contents of websites, those websites speak for themselves. Defendant denies the remaining\n\nallegations in Paragraph 26 of the Complaint.\n\n\n\n\n 5\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 7 of6 47\n of 46\n\n\n\n\n 27. To the extent the allegations of Paragraph 27 purport to quote from or characterize\n\nthe contents of websites, those websites speak for themselves. Defendant denies the remaining\n\nallegations in Paragraph 27 of the Complaint.\n\n 28. Defendant denies the allegations in Paragraph 28 of the Complaint.\n\n 29. To the extent the allegations of Paragraph 29 purport to quote from or characterize\n\nthe contents of written documents, those documents speak for themselves. Defendant denies the\n\nremaining allegations in Paragraph 29 of the Complaint.\n\n 30. Defendant denies the allegations in Paragraph 30 of the Complaint.\n\n PLAINTIFF\u2019S PATENTED INNOVATIONS\n\n 31. Defendant does not have knowledge or information sufficient to form a belief as to\n\nthe truth of the allegations contained in Paragraph 31 and on that basis denies them.\n\n The GPU-Based Acceleration Patents\n U.S. Patent Nos. 8,648,867, RE49,461, and RE48,438\n\n 32. Defendant admits that the \u2019461 Patent purports to be a continuation of the \u2019438\n\nPatent, which purports to be an application for reissue of U.S. Patent No. 9,189,828, which purports\n\nto be a continuation of the \u2019867 Patent. Except as expressly admitted, Defendant denies the\n\nremaining allegations in Paragraph 32 of the Complaint.\n\n 33. Defendant admits that Exhibit 1 to the Complaint appears to be a copy of the \u2019867\n\nPatent, which is titled \u201cGraphic Processor Based Accelerator System and Method,\u201d was filed on\n\nSeptember 24, 2007, and was issued on February 11, 2014. Defendant further admits that the \u2019867\n\nPatent purports to claim priority to U.S. Provisional App. No. 60/826,892 but denies that the \u2019867\n\nPatent is entitled to that claim of priority. Except as expressly admitted, Defendant denies the\n\nremaining allegations in Paragraph 33 of the Complaint.\n\n\n\n\n 6\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 8 of7 47\n of 46\n\n\n\n\n 34. Defendant admits that Exhibit 2 to the Complaint appears to be a copy of the \u2019438\n\nPatent, which is titled \u201cGraphic Processor Based Accelerator System and Method,\u201d was filed on\n\nNovember 9, 2017, and was issued on February 16, 2021. Defendant further admits that the \u2019438\n\nPatent purports to claim priority to U.S. Provisional App. No. 60/826,892 but denies that the \u2019438\n\nPatent is entitled to that claim of priority. Except as expressly admitted, Defendant denies the\n\nremaining allegations in Paragraph 34 of the Complaint.\n\n 35. Defendant admits that Exhibit 3 to the Complaint appears to be a copy of the \u2019461\n\nPatent, which is titled \u201cGraphic Processor Based Accelerator System and Method,\u201d was filed on\n\nDecember 29, 2020, and was issued on March 14, 2023. Defendant further admits that the \u2019461\n\nPatent purports to claim priority to U.S. Provisional App. No. 60/826,892 but denies that the \u2019461\n\nPatent is entitled to that claim of priority. Except as expressly admitted, Defendant denies the\n\nremaining allegations in Paragraph 35 of the Complaint.\n\n 36. To the extent the allegations of Paragraph 36 purport to quote from or characterize\n\nthe contents of the \u2019867 Patent, that document speaks for itself. Defendant denies the remaining\n\nallegations in Paragraph 36 of the Complaint.\n\n 37. To the extent the allegations of Paragraph 37 purport to quote from or characterize\n\nthe contents of the \u2019867 Patent, that document speaks for itself. Defendant denies the remaining\n\nallegations in Paragraph 37 of the Complaint.\n\n 38. To the extent the allegations of Paragraph 38 purport to quote from or characterize\n\nthe contents of the \u2019867 Patent, that document speaks for itself. Defendant denies the remaining\n\nallegations in Paragraph 38 of the Complaint.\n\n\n\n\n 7\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 9 of8 47\n of 46\n\n\n\n\n 39. To the extent the allegations of Paragraph 39 purport to quote from or characterize\n\nthe contents of the \u2019461 and \u2019438 Patents, those documents speak for themselves. Defendant denies\n\nthe remaining allegations in Paragraph 39 of the Complaint.\n\n 40. To the extent the allegations of Paragraph 40 purport to quote from or characterize\n\nthe contents of the Asserted Patents, those documents speak for themselves. Defendant denies the\n\nremaining allegations in Paragraph 40 of the Complaint.\n\n ACCUSED PRODUCTS\n\n 41. Defendant admits that it offers GPUs and various hardware and software products,\n\nbut specifically denies that those products infringe the Asserted Patents. To the extent the\n\nallegations of Paragraph 41 purport to quote from or characterize the contents of websites, those\n\ndocuments speak for themselves. Except as expressly admitted, Defendant denies the remaining\n\nallegations in Paragraph 41 of the Complaint.\n\n 42. Defendant admits that \u201cHopper,\u201d \u201cAda Lovelace,\u201d \u201cAmpere,\u201d \u201cTuring,\u201d \u201cVolta,\u201d\n\n\u201cPascal,\u201d and \u201cMaxwell\u201d are architectures of Defendant\u2019s GPUs but specifically denies that those\n\nproducts infringe the Asserted Patents. To the extent the allegations of Paragraph 42 purport to\n\nquote from or characterize the contents of websites, those documents speak for themselves. Except\n\nas expressly admitted, Defendant denies the remaining allegations in Paragraph 42 of the\n\nComplaint.\n\n 43. Defendant admits that its products include the H100 and H200 GPUs, but\n\nspecifically denies that those products infringe the Asserted Patents. Defendant further admits that\n\nit offers the GH200 \u201cGrace Hopper Superchip,\u201d but likewise specifically denies that this product\n\ninfringes the Asserted Patents. To the extent the allegations of Paragraph 43 purport to quote from\n\n\n\n\n 8\n\f Case\n Case7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130Filed\n Filed\n 08/18/26\n 11/25/25Page\n Page\n 10 of\n 9 of\n 4746\n\n\n\n\nor characterize the contents of websites, those documents speak for themselves. Except as\n\nexpressly admitted, Defendant denies the remaining allegations in Paragraph 43 of the Complaint.\n\n 44. Defendant admits that its products include GPUs with the Ada Lovelace\n\narchitecture, but specifically denies that those products infringe the Asserted Patents. To the extent\n\nthe allegations of Paragraph 44 purport to quote from or characterize the contents of websites,\n\nthose documents speak for themselves. Except as expressly admitted, Defendant denies the\n\nremaining allegations in Paragraph 44 of the Complaint.\n\n 45. Defendant admits that its products include GPUs with the Ampere architecture, but\n\nspecifically denies that those products infringe the Asserted Patents. To the extent the allegations\n\nof Paragraph 45 purport to quote from or characterize the contents of websites, those documents\n\nspeak for themselves. Except as expressly admitted, Defendant denies the remaining allegations\n\nin Paragraph 45 of the Complaint.\n\n 46. Defendant admits that its products include GPUs with the Turing architecture, but\n\nspecifically denies that those products infringe the Asserted Patents. To the extent the allegations\n\nof Paragraph 46 purport to quote from or characterize the contents of websites, those documents\n\nspeak for themselves. Except as expressly admitted, Defendant denies the remaining allegations\n\nin Paragraph 46 of the Complaint.\n\n 47. Defendant admits that its products include GPUs with the Volta architecture, but\n\nspecifically denies that those products infringe the Asserted Patents. To the extent the allegations\n\nof Paragraph 47 purport to quote from or characterize the contents of websites, those documents\n\nspeak for themselves. Except as expressly admitted, Defendant denies the remaining allegations\n\nin Paragraph 47 of the Complaint.\n\n\n\n\n 9\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 11 10\n of 47\n of 46\n\n\n\n\n 48. Defendant admits that its products include GPUs with the Pascal architecture, but\n\nspecifically denies that those products infringe the Asserted Patents. To the extent the allegations\n\nof Paragraph 48 purport to quote from or characterize the contents of websites, those documents\n\nspeak for themselves. Except as expressly admitted, Defendant denies the remaining allegations\n\nin Paragraph 48 of the Complaint.\n\n 49. Defendant admits that its products include GPUs with the Maxwell architecture,\n\nbut specifically denies that those products infringe the Asserted Patents. To the extent the\n\nallegations of Paragraph 49 purport to quote from or characterize the contents of websites, those\n\ndocuments speak for themselves. Except as expressly admitted, Defendant denies the remaining\n\nallegations in Paragraph 49 of the Complaint.\n\n 50. Defendant admits that certain of Defendant\u2019s GPU architectures support the CUDA\n\nplatform. To the extent the allegations of Paragraph 50 purport to quote from or characterize the\n\ncontents of websites, those documents speak for themselves. Except as expressly admitted,\n\nDefendant denies the remaining allegations in Paragraph 50 of the Complaint.\n\n 51. Defendant admits that it has marketed products under the EGX, HGX, DGX, and\n\nOVX product names, but specifically denies that those products infringe the Asserted Patents. To\n\nthe extent the allegations of Paragraph 51 purport to quote from or characterize the contents of\n\nwebsites, those documents speak for themselves. Except as expressly admitted, Defendant denies\n\nthe remaining allegations in Paragraph 51 of the Complaint.\n\n 52. To the extent the allegations of Paragraph 52 purport to quote from or characterize\n\nthe contents of websites, those documents speak for themselves. Defendant denies the remaining\n\nallegations in Paragraph 52 of the Complaint.\n\n\n\n\n 10\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 12 11\n of 47\n of 46\n\n\n\n\n 53. Paragraph 53 of the Complaint does not contain any allegation which requires a\n\nresponse.\n\n 54. To the extent the allegations of Paragraph 54 purport to quote from or characterize\n\nthe contents of websites, those documents speak for themselves. Defendant denies the remaining\n\nallegations in Paragraph 54 of the Complaint.\n\n 55. To the extent the allegations of Paragraph 55 purport to quote from or characterize\n\nthe contents of websites, those documents speak for themselves. Defendant denies the remaining\n\nallegations in Paragraph 55 of the Complaint.\n\n 56. To the extent the allegations of Paragraph 56 purport to quote from or characterize\n\nthe contents of websites, those documents speak for themselves. Defendant denies the remaining\n\nallegations in Paragraph 56 of the Complaint.\n\n 57. To the extent the allegations of Paragraph 57 purport to quote from or characterize\n\nthe contents of websites, those documents speak for themselves. Defendant denies the remaining\n\nallegations in Paragraph 57 of the Complaint.\n\n 58. To the extent the allegations of Paragraph 58 purport to quote from or characterize\n\nthe contents of websites, those documents speak for themselves. Defendant denies the remaining\n\nallegations in Paragraph 58 of the Complaint.\n\n 59. To the extent the allegations of Paragraph 59 purport to quote from or characterize\n\nthe contents of websites, those documents speak for themselves. Defendant denies the remaining\n\nallegations in Paragraph 59 of the Complaint.\n\n 60. To the extent the allegations of Paragraph 60 purport to quote from or characterize\n\nthe contents of websites, those documents speak for themselves. Defendant denies the remaining\n\nallegations in Paragraph 60 of the Complaint.\n\n\n\n\n 11\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 13 12\n of 47\n of 46\n\n\n\n\n FIRST CAUSE OF ACTION\n (INFRINGEMENT OF THE \u2019867 PATENT)\n\n 61. Defendant restates and incorporates by reference its answers to the preceding\n\nparagraphs of the Complaint.\n\n 62. Defendant denies the allegations in Paragraph 62 of the Complaint.\n\n 63. Paragraph 63 of the Complaint does not contain any allegation which requires a\n\nresponse.\n\n 64. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 64 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 64 of the Complaint.\n\n 65. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 65 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 65 of the Complaint.\n\n 66. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 66 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 66 of the Complaint.\n\n 67. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 67 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 67 of the Complaint.\n\n\n\n\n 12\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 14 13\n of 47\n of 46\n\n\n\n\n 68. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 68 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 68 of the Complaint.\n\n 69. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 69 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 69 of the Complaint.\n\n 70. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 70 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 70 of the Complaint.\n\n 71. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 71 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 71 of the Complaint.\n\n 72. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 72 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 72 of the Complaint.\n\n 73. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 73 purport to quote from or characterize the contents of\n\n\n\n\n 13\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 15 14\n of 47\n of 46\n\n\n\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 73 of the Complaint.\n\n 74. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 74 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 74 of the Complaint.\n\n 75. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 75 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 75 of the Complaint.\n\n 76. Defendant denies the allegations in Paragraph 76 of the Complaint.\n\n 77. Defendant admits that Mr. Sanford Russell was employed by NVIDIA in 2007.\n\nDefendant denies that Mr. Russell was, at any point in time, the CTO of NVIDIA. Defendant does\n\nnot have knowledge or information sufficient to form a belief as to the truth of the allegations\n\nregarding the alleged communications between NVIDIA employees and Neurala made in 2007\n\nand on that basis denies them. Except as expressly admitted, Defendant denies the remaining\n\nallegations in Paragraph 77 of the Complaint.\n\n 78. Defendant admits that, in or around 2016, Defendant had discussions with Neurala,\n\nInc. and that at least Mr. Alvin Lin and/or Mr. Jeff Herbst from Defendant were involved.\n\nDefendant also admits that, in 2016, Defendant had discussions with at least one of the inventors\n\nregarding potential investments in Neurala, Inc. Defendant denies the remaining allegations in\n\nParagraph 78 of the Complaint.\n\n\n\n\n 14\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 16 15\n of 47\n of 46\n\n\n\n\n 79. Defendant admits that it hosted its GPU Technology Conference in May of 2017.\n\nTo the extent the allegations of Paragraph 79 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 79 of the Complaint.\n\n 80. Defendant denies the allegations in Paragraph 80 of the Complaint.\n\n 81. Defendant denies the allegations in Paragraph 81 of the Complaint.\n\n 82. Defendant denies the allegations in Paragraph 82 of the Complaint.\n\n 83. Defendant denies the allegations in Paragraph 83 of the Complaint.\n\n 84. Defendant denies the allegations in Paragraph 84 of the Complaint.\n\n 85. Defendant denies the allegations in Paragraph 85 of the Complaint.\n\n 86. Defendant denies the allegations in Paragraph 86 of the Complaint.\n\n 87. Defendant admits that it sells and has sold its products and provides certain\n\ntechnical support to its customers for those products. To the extent the allegations of Paragraph\n\n87 purport to quote from or characterize the contents of websites, those websites speak for\n\nthemselves. Defendant denies the remaining allegations in Paragraph 87 of the Complaint.\n\n 88. Defendant denies the allegations in Paragraph 88 of the Complaint.\n\n 89. Defendant denies the allegations in Paragraph 89 of the Complaint.\n\n 90. Defendant denies the allegations in Paragraph 90 of the Complaint.\n\n 91. Defendant denies the allegations in Paragraph 91 of the Complaint.\n\n 92. Defendant denies the allegations in Paragraph 92 of the Complaint.\n\n 93. Defendant denies the allegations in Paragraph 93 of the Complaint.\n\n\n\n\n 15\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 17 16\n of 47\n of 46\n\n\n\n\n SECOND CAUSE OF ACTION\n (INFRINGEMENT OF THE \u2019438 PATENT)\n\n 94. Defendant restates and incorporates by reference its answers to the preceding\n\nparagraphs of the Complaint.\n\n 95. Defendant denies the allegations in Paragraph 95 of the Complaint.\n\n 96. Paragraph 96 of the Complaint does not contain any allegation which requires a\n\nresponse.\n\n 97. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 97 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 97 of the Complaint.\n\n 98. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 98 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 98 of the Complaint.\n\n 99. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 99 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 99 of the Complaint.\n\n 100. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 100 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 100 of the Complaint.\n\n\n\n\n 16\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 18 17\n of 47\n of 46\n\n\n\n\n 101. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 101 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 101 of the Complaint.\n\n 102. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 102 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 102 of the Complaint.\n\n 103. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 103 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 103 of the Complaint.\n\n 104. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 104 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 104 of the Complaint.\n\n 105. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 105 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 105 of the Complaint.\n\n 106. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 106 purport to quote from or characterize the contents of\n\n\n\n\n 17\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 19 18\n of 47\n of 46\n\n\n\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 106 of the Complaint.\n\n 107. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 107 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 107 of the Complaint.\n\n 108. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 108 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 108 of the Complaint.\n\n 109. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 109 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 109 of the Complaint.\n\n 110. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 110 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 110 of the Complaint.\n\n 111. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 111 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 111 of the Complaint.\n\n\n\n\n 18\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 20 19\n of 47\n of 46\n\n\n\n\n 112. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 112 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 112 of the Complaint.\n\n 113. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 113 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 113 of the Complaint.\n\n 114. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 114 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 114 of the Complaint.\n\n 115. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 115 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 115 of the Complaint.\n\n 116. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 116 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 116 of the Complaint.\n\n 117. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 117 purport to quote from or characterize the contents of\n\n\n\n\n 19\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 21 20\n of 47\n of 46\n\n\n\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 117 of the Complaint.\n\n 118. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 118 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 118 of the Complaint.\n\n 119. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 119 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 119 of the Complaint.\n\n 120. Defendant denies the allegations in Paragraph 120 of the Complaint.\n\n 121. Defendant admits that Mr. Sanford Russell was employed by NVIDIA in 2007.\n\nDefendant denies that Mr. Russell was, at any point in time, the CTO of NVIDIA. Defendant does\n\nnot have knowledge or information sufficient to form a belief as to the truth of the allegations\n\nregarding the alleged communications between NVIDIA employees and Neurala made in 2007\n\nand on that basis denies them. Defendant admits that it became aware of the \u2019438 Patent since at\n\nleast the filing of this Complaint. Except as expressly admitted, Defendant denies the remaining\n\nallegations in Paragraph 121 of the Complaint.\n\n 122. Defendant admits that, in or around 2016, Defendant had discussions with Neurala,\n\nInc. and that at least Mr. Alvin Lin and/or Mr. Jeff Herbst from Defendant were involved.\n\nDefendant also admits that, in 2016, Defendant had discussions with at least one of the inventors\n\nregarding potential investments in Neurala, Inc. Defendant denies the remaining allegations in\n\nParagraph 122 of the Complaint.\n\n\n\n\n 20\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 22 21\n of 47\n of 46\n\n\n\n\n 123. Defendant admits that it hosted its GPU Technology Conference in May of 2017.\n\nTo the extent the allegations of Paragraph 123 purport to quote from or characterize the contents\n\nof websites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 123 of the Complaint.\n\n 124. Defendant denies the allegations in Paragraph 124 of the Complaint.\n\n 125. Defendant denies the allegations in Paragraph 125 of the Complaint.\n\n 126. Defendant denies the allegations in Paragraph 126 of the Complaint.\n\n 127. Defendant denies the allegations in Paragraph 127 of the Complaint.\n\n 128. Defendant denies the allegations in Paragraph 128 of the Complaint.\n\n 129. Defendant denies the allegations in Paragraph 129 of the Complaint.\n\n 130. Defendant denies the allegations in Paragraph 130 of the Complaint.\n\n 131. Defendant admits that it sells and has sold its products and provides certain\n\ntechnical support to its customers for those products. To the extent the allegations of Paragraph\n\n131 purport to quote from or characterize the contents of websites, those websites speak for\n\nthemselves. Defendant denies the remaining allegations in Paragraph 131 of the Complaint.\n\n 132. Defendant denies the allegations in Paragraph 132 of the Complaint.\n\n 133. Defendant denies the allegations in Paragraph 133 of the Complaint.\n\n 134. Defendant denies the allegations in Paragraph 134 of the Complaint.\n\n 135. Defendant denies the allegations in Paragraph 135 of the Complaint.\n\n 136. Defendant denies the allegations in Paragraph 136 of the Complaint.\n\n 137. Defendant denies the allegations in Paragraph 137 of the Complaint.\n\n\n\n\n 21\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 23 22\n of 47\n of 46\n\n\n\n\n THIRD CAUSE OF ACTION\n (INFRINGEMENT OF THE \u2019461 PATENT)\n\n 138. Defendant restates and incorporates by reference its answers to the preceding\n\nparagraphs of the Complaint.\n\n 139. Defendant denies the allegations in Paragraph 139 of the Complaint.\n\n 140. Paragraph 140 of the Complaint does not contain any allegation which requires a\n\nresponse.\n\n 141. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 141 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 141 of the Complaint.\n\n 142. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 142 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 142 of the Complaint.\n\n 143. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 143 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 143 of the Complaint.\n\n 144. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 144 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 144 of the Complaint.\n\n\n\n\n 22\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 24 23\n of 47\n of 46\n\n\n\n\n 145. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 145 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 145 of the Complaint.\n\n 146. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 146 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 146 of the Complaint.\n\n 147. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 147 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 147 of the Complaint.\n\n 148. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 148 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 148 of the Complaint.\n\n 149. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 149 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 149 of the Complaint.\n\n 150. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 150 purport to quote from or characterize the contents of\n\n\n\n\n 23\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 25 24\n of 47\n of 46\n\n\n\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 150 of the Complaint.\n\n 151. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 151 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 151 of the Complaint.\n\n 152. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 152 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 152 of the Complaint.\n\n 153. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 153 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 153 of the Complaint.\n\n 154. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 154 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 154 of the Complaint.\n\n 155. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 155 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 155 of the Complaint.\n\n\n\n\n 24\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 26 25\n of 47\n of 46\n\n\n\n\n 156. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 156 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 156 of the Complaint.\n\n 157. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 157 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 157 of the Complaint.\n\n 158. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 158 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 158 of the Complaint.\n\n 159. Defendant specifically denies that it has infringed any of the Asserted Patents. To\n\nthe extent the allegations of Paragraph 159 purport to quote from or characterize the contents of\n\nwebsites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 159 of the Complaint.\n\n 160. Defendant denies the allegations in Paragraph 160 of the Complaint.\n\n 161. Defendant admits that Mr. Sanford Russell was employed by NVIDIA in 2007.\n\nDefendant denies that Mr. Russell was, at any point in time, the CTO of NVIDIA. Defendant does\n\nnot have knowledge or information sufficient to form a belief as to the truth of the allegations\n\nregarding the alleged communications between NVIDIA employees and Neurala made in 2007\n\nand on that basis denies them. Defendant admits that it became aware of the \u2019461 Patent since at\n\n\n\n\n 25\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 27 26\n of 47\n of 46\n\n\n\n\nleast the filing of this Complaint. Except as expressly admitted, Defendant denies the remaining\n\nallegations in Paragraph 161 of the Complaint.\n\n 162. Defendant admits that, in or around 2016, Defendant had discussions with Neurala,\n\nInc. and that at least Mr. Alvin Lin and/or Mr. Jeff Herbst from Defendant were involved.\n\nDefendant also admits that, in 2016, Defendant had discussions with at least one of the inventors\n\nregarding potential investments in Neurala, Inc. Defendant denies the remaining allegations in\n\nParagraph 162 of the Complaint.\n\n 163. Defendant admits that it hosted its GPU Technology Conference in May of 2017.\n\nTo the extent the allegations of Paragraph 161 purport to quote from or characterize the contents\n\nof websites, those websites speak for themselves. Defendant denies the remaining allegations in\n\nParagraph 163 of the Complaint.\n\n 164. Defendant denies the allegations in Paragraph 164 of the Complaint.\n\n 165. Defendant denies the allegations in Paragraph 165 of the Complaint.\n\n 166. Defendant denies the allegations in Paragraph 166 of the Complaint.\n\n 167. Defendant denies the allegations in Paragraph 167 of the Complaint.\n\n 168. Defendant denies the allegations in Paragraph 168 of the Complaint.\n\n 169. Defendant denies the allegations in Paragraph 169 of the Complaint.\n\n 170. Defendant denies the allegations in Paragraph 170 of the Complaint.\n\n 171. Defendant admits that it sells and has sold its products and provides certain\n\ntechnical support to its customers for those products. To the extent the allegations of Paragraph\n\n171 purport to quote from or characterize the contents of websites, those websites speak for\n\nthemselves. Defendant denies the remaining allegations in Paragraph 171 of the Complaint.\n\n 172. Defendant denies the allegations in Paragraph 172 of the Complaint.\n\n\n\n\n 26\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 28 27\n of 47\n of 46\n\n\n\n\n 173. Defendant denies the allegations in Paragraph 173 of the Complaint.\n\n 174. Defendant denies the allegations in Paragraph 174 of the Complaint.\n\n 175. Defendant denies the allegations in Paragraph 175 of the Complaint.\n\n 176. Defendant denies the allegations in Paragraph 176 of the Complaint.\n\n 177. Defendant denies the allegations in Paragraph 177 of the Complaint.\n\n PRAYER FOR RELIEF\n\n Defendant denies any factual assertions contained in Plaintiff\u2019s Prayer for Relief.\n\nDefendant further denies that Plaintiff is entitled to any relief whatsoever, including but not limited\n\nto the relief sought in Paragraphs A-G of the Complaint.\n\n DEMAND FOR JURY TRIAL\n\n A response is not required to Plaintiff\u2019s demand for a jury trial.\n\n DEFENSES\n\n Defendant repeats and re-alleges the allegations of the preceding Paragraphs as if fully set\n\nforth herein. Defendant asserts the following defenses to Plaintiff\u2019s Complaint, without admitting\n\nor acknowledging that Defendant bears the burden of proof as to any of them or that any must be\n\npleaded as defenses. Defendant specifically reserves all rights to allege additional defenses that\n\nbecome known through the course of discovery.\n\n FIRST DEFENSE\n (Non-Infringement)\n\n Defendant has not and does not infringe, either literally or under the doctrine of\n\nequivalents, any valid and enforceable claim of any Asserted Patent, whether directly, indirectly,\n\ncontributorily, by inducement, individually, jointly, willfully, or otherwise. Additionally, with\n\nrespect to Plaintiff\u2019s allegations of indirect, joint, and willful infringement, Defendant lacks the\n\nrequisite mens rea.\n\n\n\n 27\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 29 28\n of 47\n of 46\n\n\n\n\n SECOND DEFENSE\n (Invalidity & Ineligibility)\n\n The Asserted Claims are invalid under at least 35 U.S.C. \u00a7\u00a7 101, 102, 103, and/or 112.\n\nDefendant incorporates by reference its forthcoming invalidity contentions and all amendments\n\nthereto.\n\n THIRD DEFENSE\n (No Willfulness, Enhanced Damages, or Attorneys\u2019 Fees)\n\n Plaintiff is not entitled to enhanced damages under 35 U.S.C. \u00a7 284, at least because\n\nPlaintiff has failed to show, and cannot show, that any infringement has been willful and/or\n\nknowing. Plaintiff is not entitled to an award of attorney\u2019s fees under 35 U.S.C. \u00a7 285, at least\n\nbecause Plaintiff has failed to show, and cannot show, that this case is \u201cexceptional\u201d in Plaintiff\u2019s\n\nfavor as would be required by the statute.\n\n FOURTH DEFENSE\n (Statutory Limitation on Damages)\n\n Plaintiff\u2019s claims for relief are statutorily limited in whole or in part by 35 U.S.C. \u00a7\u00a7 286\n\nand/or 287. In addition, to the extent Plaintiff seeks damages for allegedly infringing acts\n\ncommitted more than six years prior to the filing of the Complaint in this action, it is barred from\n\nrecovery of such damages.\n\n Additionally, to the extent Plaintiff or any licensee of the Asserted Patent failed to properly\n\nmark any of their relevant products as required by 35 U.S.C. \u00a7 287 or otherwise failed to give\n\nproper notice that Defendant\u2019s actions allegedly infringed any Asserted Claim, Defendant is not\n\nliable to Plaintiff for the acts alleged to have been performed before Defendant received actual\n\nnotice of infringement.\n\n FIFTH DEFENSE\n (License, Exhaustion, Waiver, and Estoppel)\n\n Plaintiff\u2019s claims are barred, in whole or in part, by license, exhaustion, and/or the\n\n\n 28\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 30 29\n of 47\n of 46\n\n\n\n\ndoctrines of waiver and/or equitable estoppel.\n\n SIXTH DEFENSE\n (Inexcusable Delay)\n\n Plaintiff is barred from enforcing the Asserted Patents due to inexcusable delay in reviving\n\nthe \u2019867 patent after it was abandoned.\n\n SEVENTH DEFENSE\n (Intervening Rights)\n\n Plaintiff\u2019s claims are barred by the doctrine of absolute intervening rights and the doctrine\n\nof equitable intervening rights with respect to any Accused Product or technology that predates\n\nthe date of the revival of the \u2019867 patent and/or the date of the reissue of the \u2019461 and \u2019438 patents.\n\n35 U.S.C. \u00a7 252.\n\n EIGHTH DEFENSE\n (Improper Reissue)\n\n The claims of the \u2019438 and \u2019461 patents are invalid pursuant to 35 U.S.C. \u00a7 251 because\n\nthey enlarge the scope of the claims of the original patent and/or because they improperly recapture\n\nsubject matter that the patentee intentionally surrendered to obtain a valid patent.\n\n NINTH DEFENSE\n (28 U.S.C. \u00a7 1498)\n\n On information and belief, Plaintiff\u2019s claims against NVIDIA for patent infringement are\n\nbarred, in whole or in part, by 28 U.S.C. \u00a7 1498.\n\n TENTH DEFENSE\n (Ensnarement)\n\n Plaintiff is barred by the doctrine of ensnarement from contending that any Asserted Claim\n\ncovers any product, service, or method practiced, manufactured, used, sold, or offered for sale by\n\nDefendant in any manner that would ensnare the prior art.\n\n\n\n\n 29\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 31 30\n of 47\n of 46\n\n\n\n\n ELEVENTH DEFENSE\n (Territoriality)\n\n Plaintiff is not entitled to damages arising from any purported indirect infringement by\n\nDefendant that is premised on direct infringement by end-users occurring outside of the United\n\nStates under 35 U.S.C. \u00a7 271.\n\n TWELFTH DEFENSE\n (No Standing)\n\n Plaintiff\u2019s claims are barred because Plaintiff lacks standing to bring this suit. Specifically,\n\nPlaintiff cannot prove that it is the rightful owner of the Asserted Patents.\n\n THIRTEENTH DEFENSE\n (Failure to State a Claim)\n\n The Complaint fails to state a claim upon which relief may be granted.\n\n FOURTEENTH DEFENSE\n (Inconvenient Venue)\n\n For the convenience of parties and witnesses, venue for this action is not convenient\n\nin this district and would be more appropriate in another district. 28 U.S.C. \u00a7 1404.\n\n FIFTEENTH DEFENSE\n (Reservation of Defenses)\n\n Defendant reserves all affirmative defenses under Rule 8(c) of the Federal Rules of\n\nCivil Procedure, as well as any other defenses at law or in equity that may exist now or that may\n\nbe available in the future.\n\n SIXTEENTH DEFENSE\n (Unenforceability Due to Inequitable Conduct)\n\n 1. Each of the claims of the Asserted Patents is unenforceable due to inequitable\n\nconduct committed by prior assignee Neurala, one or more of the named inventors (Anatoli\n\nGorchetchnikov, Heather Marie Ames, Massimiliano Versace, and Fabrizio Santini), and/or\n\n\n\n\n 30\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 32 31\n of 47\n of 46\n\n\n\n\nprosecution counsel for prior assignee Neurala or current assignee NAI (including, but not limited\n\nto, Christopher Max Colice).\n\n 2. This case arises from a pattern of concealment and misrepresentation surrounding\n\na purported improvement to general-purpose computing on graphics processing units (\u201cGPGPU\u201d).\n\nLong before Neurala\u2019s initial patent application that led to the Asserted patents was filed, NVIDIA\n\nhad pioneered GPGPU computing, developing both the hardware and software foundations for\n\nexecuting general-purpose numerical computations on GPUs. NVIDIA\u2019s engineers\u2014through\n\ntechnologies such as BrookGPU and well-known books such as GPU Gems 2\u2014publicly disclosed\n\nthe very concepts later claimed by Neurala. These were not obscure academic papers; they were\n\nwell-known, widely cited works intended to teach the industry how to harness GPUs for scientific\n\ncomputing. Neurala and the named inventors were well aware of not only NVIDIA\u2019s role in\n\nGPGPU development, but of NVIDIA\u2019s specific teachings in GPU Gems 2 and other technologies.\n\n 3. Against this backdrop, the Asserted Patents claim a narrow and incremental\n\npurported improvement to GPGPU\u2014such as merely offloading certain setup and control functions\n\nfrom the host CPU to an \u201caccelerator controller.\u201d This supposed improvement did not create a\n\nnew GPGPU paradigm; it merely repeated well understood ideas from NVIDIA\u2019s prior work and\n\ncontributions to the field. Yet Neurala\u2019s inventors and attorneys withheld NVIDIA\u2019s key patents\n\nand publications\u2014including GPU Gems 2\u2014from the Patent Office while advancing their own\n\napplication.\n\n 4. There are two independent bases for an inequitable conduct finding, either of which,\n\nstanding alone, renders the Asserted Patents unenforceable. Together, they demonstrate a\n\ncoordinated pattern of misleading conduct intended to misdirect the Patent Office about the true\n\n\n\n\n 31\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 33 32\n of 47\n of 46\n\n\n\n\nstate of the art, the inventors\u2019 knowledge of it, and Neurala\u2019s desperate attempt to get patents on\n\ntechnology it did not invent.\n\n 5. Withholding of Material Prior Art. The claims of the Asserted Patents are\n\nunenforceable due to Neurala\u2019s and/or one or more of the named inventors\u2019 intentional withholding\n\nof material prior art references during prosecution of the Asserted Patents with an intent to deceive\n\nthe Patent Office.\n\n 6. False Declaration Regarding Abandonment. The claims of the Asserted Patents\n\nare also unenforceable due to Neurala\u2019s filing of a false declaration regarding abandonment of the\n\napplication that issued as the \u2019867 patent. Without that false declaration, none of the Asserted\n\nPatents would have issued.\n\n 7. Collectively, these acts form a coherent pattern of inequitable conduct\u2014a deliberate\n\neffort to obscure NVIDIA\u2019s pioneering role in GPGPU computing and to mislead the Patent Office\n\ninto granting patents on technology NVIDIA and others had already disclosed to the world.\n\nWithholding Material Prior Art\n\n 8. Neurala, each of the named inventors, and their counsel involved in the prosecution\n\nof the Asserted Patents had a duty of candor and good faith in dealing with the Patent Office, as\n\nrequired by 37 C.F.R. \u00a7 1.56. Their individual and collective failure to disclose known material\n\nprior art was done with specific intent to mislead or deceive the Patent Office into issuing each of\n\nthe Asserted Patents. As a result, all of the Asserted Patents are unenforceable due to inequitable\n\nconduct.\n\n\n\n\n 32\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 34 33\n of 47\n of 46\n\n\n\n\nKnowledge and Materiality of GPU Gems 2\n\n 9. Neurala, one or more of the named inventors, and/or Neurala\u2019s prosecution counsel\n\nintentionally withheld GPU Gems 2: Programming Techniques for High-Performance Graphics\n\nand General-Purpose Computation (\u201cGPU Gems 2\u201d) (March 2005) from the Patent Office.\n\n 10. NVIDIA published a series of books that provided practical guidance and\n\ntechniques for using GPUs in general-purpose applications, helping developers harness the parallel\n\nprocessing power of GPUs for a wide range of fields. One of those books was GPU Gems 2, which\n\nNVIDIA published on the Internet in March 2005 and made it available for download for free to\n\nanyone that wanted to download it. See Ex. 1 (April 1, 2025 Invalidity Contentions Ex. A11), Ex.\n\n2 (August 29, 2025 Supplemental Invalidity Contentions Supp. Ex. A11), Ex. 3 (April 1, 2025\n\nInvalidity Contentions App\u2019x B), Ex. 4 (April 1, 2025 Invalidity Contentions Ex. C11). At least\n\none of the named inventors\n\n\n\n . Despite extensive knowledge of GPU Gems 2 and its direct relevance for teaching\n\ntechniques for using GPUs in general-purpose applications, that inventor and Neurala withheld\n\nGPU Gems 2 from the Patent Office for all seven years that the \u2019867 patent was pending and every\n\nyear since.\n\n 11. not only was intimately familiar with GPU Gems 2 prior to the\n\nfiling of the provisional patent application from which the Asserted Patents claim priority but also\n\n\n\n\n 33\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 35 34\n of 47\n of 46\n\n\n\n\n 12. and one or more of the other named inventors met regularly to\n\ndiscuss the implementation of the project and the filing of the provisional patent application from\n\nwhich the Asserted Patents claim priority. See, e.g.,\n\nOn information and belief, the other named inventors and/or prosecution counsel were also aware\n\nof GPU Gems 2 due to the close nature of their working relationship with .\n\n 13. As NVIDIA detailed in its Invalidity Contentions served April 1, 2025, August 29,\n\n2025, and October 30, 2025, GPU Gems 2 is a prior art reference that is material to each of\n\nthe \u2019867, \u2019461, and \u2019438 patents. GPU Gems 2 anticipates the \u2019867 and \u2019438 patents and discloses\n\nkey elements of the \u2019461 patent claims. When combined with other unconsidered prior art,\n\nincluding NVIDIA\u2019s own patents, GPU Gems 2 renders obvious all of the Asserted Claims of the\n\nAsserted Patents. See Exs. 1, 2, 3, 4; see also Ex. 14 (April 1, 2025, Preliminary Invalidity\n\nContentions Cover Pleading), Ex. 15 (August 29, 2025 Supplemental Invalidity Contentions Cover\n\nPleading), Ex. 16 (October 30, 2025 Second Supplemental Invalidity Contentions Cover Pleading).\n\nThe Patent Office would not have allowed the \u2019867, \u2019461, or \u2019438 patents to issue but for the\n\nwithholding of GPU Gems 2. Therasense, Inc. v. Becton, Dickinson & Co., 649 F.3d 1276, 1290\u2013\n\n91 (Fed. Cir. 2011). For example, as NVIDIA details in its Invalidity Contentions with respect to\n\nclaim 16 of the \u2019867 patent, GPU Gems 2 teaches \u201can accelerator controller, operably coupled to\n\nthe accelerator memory and the central processing unit.\u201d See Ex. 1 at 15\u201344; Ex. 2; Ex. 17 (\u2019867\n\npatent file history) at 43. GPU Gems 2 teaches that the accelerator controller that \u201ctransfer[s] the\n\n\n\n\n 34\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 36 35\n of 47\n of 46\n\n\n\n\nat least the portion of the input data into the accelerator memory before the first computational\n\ncycle.\u201d See Ex. 1 at 27\u201344; Ex. 2; Ex. 17 at 43. GPU Gems 2 teaches that the accelerator controller\n\nthat \u201ctransfer[s] the first output data from the accelerator memory to the main memory during the\n\nsecond computational cycle\u201d and \u201cdirect[s] the second output data into the second partition during\n\nthe second computational cycle.\u201d See Ex. 1 at 54\u201369; Ex. 2; Ex. 17 at 43. GPU Gems 2 teaches\n\nthat the accelerator controller \u201cswap[s] the first pointer and the second pointer at the conclusion of\n\nthe second computational cycle such that the second output data becomes an input for a third\n\ncomputational cycle of the plurality of computational cycles.\u201d See Ex. 1 at 69\u201378; Ex. 2; Ex. 17\n\nat 43.\n\nKnowledge and Materiality of SANNDRA/KInNeSS\n\n 14. Mr. Gorchetchnikov and Mr. Massimiliano Versace\u2014named inventors of the\n\nAsserted Patents\u2014developed Synchronous Artificial Neuronal Networks Distributed Runtime\n\nAlgorithm (SANNDRA) and its implementation on KDE Integrated NeuroSimulation Software\n\n(KInNeSS) (\u201cSANNDRA/KInNeSS\u201d) (March 2005). SANNDRA version 1.1.x and KInNeSS\n\n0.3.3 (on which SANNDRA was implemented) were publicly available and in use by March 2005\n\nbased at least on the following information: KInNeSS: A new software environment for\n\nsimulations of neuronal activity; 9th International conference on Cognitive and Neural Systems\n\n(Boston, MA, 2004); https://web.archive.org/web/20051030032020/http://www.kinness.net/\n\n(KInNeSS documentation);\n\nhttps://web.archive.org/web/20080828055305fw /http://symphony.bu.edu/\n\nDocs/SANNDRA/html/index.html (SANNDRA API documentation); see also Ex. 5 (April 1, 2025\n\nInvalidity Contentions Ex. A7), Ex. 6 (April 1, 2025 Invalidity Contentions Ex. B7), Ex. 7 (April\n\n1, 2025 Invalidity Contentions Ex. C7).\n\n\n\n\n 35\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 37 36\n of 47\n of 46\n\n\n\n\n 15. Furthermore, the specification of the Asserted Patents acknowledges that\n\nSANNDRA \u201cwas developed to accelerate and optimize processing of numerical integration of\n\nlarge non-homogenous systems of differential equations.\u201d \u02bc867 patent at 9:25\u201235. And although\n\nthe Asserted Patents reference version 2.x.x of SANNDRA as \u201can example practical software\n\nimplementation of the method and architecture described above and pictorially represented in FIG.\n\n3,\u201d the applicant failed to identify previous, publicly available versions of SANNDRA or KInNeSS\n\nas relevant prior art to the Patent Office. Id.;\n\n\n\n Neurala, the named\n\ninventors, and their prosecution counsel further failed to fully disclose the relevance and\n\nmateriality of their own software to the Patent Office, despite being the ones in the best position\n\nto do so. NVIDIA expects further discovery, including complete production of the documents that\n\nNVIDIA requested from Neurala on July 30, 2025, to shed further light on Mr. Gorchetchnikov\u2019s\n\nand Mr. Versace\u2019s concealment of earlier versions of SANNDRA/KInNeSS.\n\n 16. SANNDRA 1.1.x and earlier versions, as implemented on KInNeSS, together with\n\nother undisclosed references (such as Nickolls and Kirk, among others) renders obvious all of the\n\nAsserted Claims of the Asserted Patents as shown by Exs. 5, 6, 7, and 16. The Patent Office would\n\nnot have allowed the \u2019867, \u2019461, or \u2019438 patents to issue but for the withholding of\n\nSANNDRA/KInNeSS. Therasense, 649 F.3d at 1290\u201391.\n\nKnowledge and Materiality of Cg\n\n 17. The C for Graphics (Cg) language (2003) is a high-level shading language created\n\nby NVIDIA in collaboration with Microsoft to program graphics shaders on GPUs. Cg was made\n\navailable as an open-source release and in public use by 2003 based at least on the following\n\n\n\n\n 36\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 38 37\n of 47\n of 46\n\n\n\n\ninformation: The Cg Tutorial: The Definitive Guide to Programmable Real-Time Graphics (2003);\n\nhttps://web.archive.org/web/20041205090713/http://developer.nvidia.com:80/object/cg_toolkit.h\n\ntml (\u201cCg Toolkit\u201d); see also Ex. 8 (April 1, 2025 Invalidity Contentions Ex. A4), Ex. 9 (April 1,\n\n2025 Invalidity Contentions Ex. B4), Ex. 10 (April 1, 2025 Invalidity Contentions Ex. C4).\n\n 18.\n\n\n\n 19. The Cg language, together with other references (such as Nickolls and Kirk, among\n\nothers) renders obvious all of the Asserted Claims of the Asserted Patents as shown by Exs. 8, 9,\n\n10, and 16. The Patent Office would not have allowed the \u2019867, \u2019461, or \u2019438 patents to issue but\n\nfor the withholding of Cg. Therasense, 649 F.3d at 1290\u201391.\n\nKnowledge and Materiality of BrookGPU\n\n 20. The BrookGPU programming language (2004) is an early system developed at\n\nStanford University to enable general-purpose computing on graphics processing units (GPGPU).\n\nBrookGPU was publicly available and in use by 2004 based at least on the following information:\n\nBuck et al., Brook for GPUs: Stream Computing on Graphics Hardware, ACM, 2004 (\u201cBrook for\n\nGPU 2004\u201d); https://web.archive.org/web/20041205061111/http://graphics.stanford.edu/projects/\n\nbrookgpu/start.html (BrookGPU documentation); see also Ex. 11 (April 1, 2025 Invalidity\n\nContentions Ex. A5), Ex. 12 (April 1, 2025 Invalidity Contentions Ex. B5), Ex. 13 (April 1, 2025\n\nInvalidity Contentions Ex. C5).\n\n 21.\n\n\n\n 22. The BrookGPU language, together with other references (such as Nickolls and Kirk,\n\namong others) renders obvious all of the Asserted Claims of the Asserted Patents, as shown by Exs.\n\n\n\n\n 37\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 39 38\n of 47\n of 46\n\n\n\n\n11, 12, 13, and 16. The Patent Office would not have allowed the \u2019867, \u2019461, or \u2019438 patents to\n\nissue but for the withholding of BrookGPU. Therasense, 649 F.3d at 1290\u201391.\n\nWithholding of Material References\n\n 23. Despite their awareness of numerous references relevant to the technology of the\n\nAsserted Patents, the named inventors did not provide any prior art to the Patent Office during\n\nprosecution of the \u02bc867 patent. Only four references are disclosed on the face of the \u2019867 patent\n\nas having been considered during prosecution, and all four were identified by the examiner in a\n\nNotice of References Cited. Although each of the four references cited by the examiner relates to\n\ngraphics rendering, none of the references provide the practical guidance and techniques for using\n\nGPUs in general-purpose applications that GPU Gems 2 does, or the relevant applied examples\n\nand implementations that system art, such as SANNDRA/KInNeSS, Cg, or BrookGPU provides.\n\nFor each of the two reissue patents, the applicant took the opposite approach and submitted\n\nhundreds of references, none of which was GPU Gems 2, SANNDRA/KInNeSS, Cg, or\n\nBrookGPU, and none of which provide the relevant applied examples and implementations that\n\nGPU Gems 2 does.\n\n 24. None of GPU Gems 2, SANNDRA/KInNeSS, Cg, or BrookGPU is cumulative of\n\nthe information already on record. Unlike the four graphics-rendering references cited by the\n\nexaminer, these materials disclose practical architectures, applied examples, and implementation-\n\nlevel guidance applicable to GPGPU\u2014the very subject matter of the Asserted Patents. But for\n\ntheir withholding, the Patent Office would not have allowed any of the \u2019867, \u2019461, or \u2019438 patents\n\nto issue. The deliberate withholding of these NVIDIA and other GPGPU-related references\n\ndeprived the examiner of the most relevant prior art and materially misled the Patent Office about\n\nthe true state of the art.\n\n\n\n\n 38\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 40 39\n of 47\n of 46\n\n\n\n\nIntent to Deceive\n\n 25. \u2014and by extension, Neurala\u2014knew of these material prior art\n\nreferences. On information and belief, the other named inventors and their counsel involved in\n\nprosecution were similarly aware of these references and knew of their materiality to the Asserted\n\nPatents. and others were aware of GPU Gems 2, SANNDRA/KInNeSS, Cg,\n\nor BrookGPU and made the conscious decision to withhold it from the Patent Office.\n\n 26. The inventors did not file their provisional application until September 25, 2006,\n\nover a year after first reviewed GPU Gems 2. And the inventors did not\n\ndisclose GPU Gems 2 to the Patent Office at any time during nearly seven years of prosecution of\n\nthe application that led to the \u2019867 patent.\n\n\n\n\n Each of these references was material and not\n\ncumulative of the bare record before the examiner during prosecution of the \u2019867 patent. It is\n\nsimply not credible that the named inventors did not think that any prior art was material to\n\nprosecution. These facts demonstrate an intent to deceive the Patent Office by not providing any\n\nprior art for its consideration. Thus, for the \u02bc867 patent, by withholding all known references, the\n\ninventors may have aimed to create a misleading impression of the uniqueness and inventiveness\n\nof their claims. For the two reissue patents, the applicant attempted to flood the Patent Office with\n\nreferences to distract from the key prior art that was omitted: GPU Gems 2, SANNDRA/KInNeSS,\n\nCg, and BrookGPU. These facts, and those yet to be ascertained through discovery demonstrate\n\nthat the most reasonable inference to draw is that the named inventors intended to deceive the\n\nPatent Office by withholding references during prosecution.\n\n\n\n\n 39\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 41 40\n of 47\n of 46\n\n\n\n\n 27. On information and belief, Neurala and the named inventors also intentionally\n\nchose not to disclose GPU Gems 2 to its attorneys responsible for prosecution of the patent\n\napplications at the Patent Office, knowing that such attorneys also owed a duty of candor to the\n\nPatent Office, and would disclose the reference to the Patent Office and the examiner if the\n\nattorneys were to become aware of it. In either case, Neurala and the named inventors violated\n\nthe duty of candor that each of them owed to the Patent Office.\n\n 28. A pattern of deceiving the Patent Office continues. For example, current assignee\n\nNeural AI recently paid the 11-year maintenance fee for the \u2019867 patent and did so with a\n\nrepresentation that it was entitled to small entity status, even though it knew it was no longer\n\nentitled to small entity status due to\n\n 29. These facts, when taken together with the evidence of intent presented for the other\n\nbasis of inequitable conduct, demonstrate a pattern of conduct that shows a continuing intent to\n\ndeceive the Patent Office.\n\nFiling a False Declaration Regarding Abandonment of an Application\n\n 30. In addition to failing to disclose material prior art references during the prosecution\n\nof the \u2019867 patent that, if cited, would have precluded the claims in that patent from issuing,\n\nNeurala and its prosecution counsel also affirmatively misled the Patent Office when it revived the\n\nabandoned application that issued as the \u2019867 patent. But for its misrepresentation, none of the\n\nAsserted Patents would have issued because the patent application from which all of those patents\n\nstem would have remained abandoned. This affirmative misrepresentation is part of Neurala\u2019s\n\ncontinued pattern of inequitable conduct in front of the Patent Office to obtain the Asserted Patents.\n\n 31. Specifically, Neurala and its prosecution counsel allowed the application that issued\n\nas the \u2019867 patent (U.S. Patent Appl. No. 11/860,254) (\u201cthe \u2019254 application\u201d) to become\n\n\n\n\n 40\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 42 41\n of 47\n of 46\n\n\n\n\nabandoned for more than two years before belatedly filing a false, generic declaration alleging that\n\nthe \u2019254 application had been unintentionally abandoned in an attempt to revive it. The claims of\n\neach of the Asserted Patents are therefore also unenforceable due to a false declaration regarding\n\nabandonment of the application that issued as the \u2019867 patent.\n\n 32. The application that issued as the \u2019867 patent (U.S. Patent Appl. No. 11/860,254)\n\n(\u201cthe \u2019254 application\u201d) was filed on September 24, 2007. The Patent Office issued a non-final\n\nOffice Action on September 16, 2010, with a three month non-statutory time period for reply. A\n\nresponse to the Office Action was due on December 16, 2010 without payment of extension fees,\n\nbut the applicant neither filed a response nor requested an extension of time under the provisions\n\nof 37 C.F.R. \u00a7 1.136(a), and the \u2019254 application became abandoned on December 17, 2010, the\n\nday after the expiration of the shortened non-statutory deadline established in the non-final Office\n\nAction.\n\n 33. On April 12, 2011, the Patent Office mailed a notice of abandonment to the\n\napplicant. It was not until July 31, 2013\u2014more than two years later\u2014that the applicant filed a\n\npetition to revive the \u2019254 application. The petition was signed by Christopher Max Colice of\n\nFoley & Lardner LLP and included the statement that \u201c[t]he entire delay in filing the required reply\n\nfrom the due date for the required reply until the filing of a grantable petition under 37 CFR 1.137(b)\n\nwas unintentional.\u201d Ex. 17 at 64\u201388. At the time, no power of attorney had been filed listing Mr.\n\nColice as Neurala\u2019s attorney of record. There is no indication in the statement what investigation\n\nMr. Colice undertook or how he determined that abandonment was \u201cunintentional.\u201d Furthermore,\n\nthe attorney advisor reviewing the petition noted that it was \u201cnot apparent whether the person\n\nsigning the statement of unintentional delay was in a position to have firsthand or direct knowledge\n\n\n\n\n 41\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 43 42\n of 47\n of 46\n\n\n\n\nof the facts and circumstances of the delay at issue,\u201d and that there was \u201cno indication that the\n\npetition [wa]s signed by a registered patent attorney or patent agent of record. Id. at 62.\n\n 34. Materiality. The material prong is met \u201c[w]hen the patentee has engaged in\n\naffirmative acts of egregious misconduct, such as the filing of an unmistakably false affidavit.\u201d\n\nTherasense, 649 F.3d at 1292; see also Rohm & Haas Co. v. Crystal Chem. Co., 722 F.3d 1556,\n\n1571 (Fed. Cir. 1983) (\u201cthere is no room to argue that submission of false affidavits is not\n\nmaterial\u201d); Intellect Wireless, Inc. v. HTC Corp., 732 F.3d 1339, 1342 (Fed. Cir. 2013); Apotex,\n\nInc. v. UCB, Inc., 763 F.3d 1354 (Fed. Cir. 2014). An affirmative act of egregious misconduct is\n\ninherently material. Therasense, 649 F.3d at 1292. The filing of a false revival petition under 37\n\nCFR \u00a7 1.137(a) is an affirmative act of egregious misconduct. In re Rembrandt Techs. LP Patent\n\nLitig., 899 F.3d 1254, 1272\u201374 (Fed. Cir. 2018). Because the \u02bc867 patent (which issued from the\n\n\u02bc254 application) was the first patent in the family, but for the false statement in the Petition for\n\nRevival, all Asserted Patents would not have issued and thus would no longer be in force. The\n\nfalse statement to the Patent Office is therefore material to patentability. See, e.g., 3D Med.\n\nImaging Sys. LLC v. Visage Imaging Inc., 228 F. Supp. 3d 1331, 1338\u201339 (N.D. Ga. 2017).\n\n 35. Intent. The intent of Mr. Colice and/or the named inventors to deceive the Patent\n\nOffice is evidenced at least by the length of time that elapsed between the dates of the Office\n\nAction (September 16, 2010), when the application became abandoned (December 18, 2010), the\n\nNotice of Abandonment (April 12, 2011), and the applicant\u2019s Petition for Revival (July 31, 2013).\n\nFor example, there is no explanation why it took almost three full years from when the Office\n\nAction was issued for the applicant to respond to the Office Action. Even after Neurala LLC was\n\nnotified of the abandonment, it took more than two years to file a Petition for Revival, accompanied\n\nby only a generic statement that the entire delay was unintentional. The most reasonable inference\n\n\n\n\n 42\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 44 43\n of 47\n of 46\n\n\n\n\nto draw is that there was an intent to allow the application to become abandoned, and that Mr.\n\nColice and/or the named inventors intended to deceive the Patent Office by submitting a false\n\ndeclaration stating that the abandonment of the \u2019254 application was unintentional.\n\n 36. The \u02bc254 application was the first application in the chain of applications for the\n\nAsserted Patents (it issued as the asserted \u02bc867 patent). If the \u02bc254 application had been deemed\n\nabandoned and no false declaration had been filed, no patents in the asserted patent family would\n\nhave issued. Therefore, all Asserted Patents should be rendered unenforceable due to the filing of\n\na false declaration in the prosecution of the \u02bc867 patent.\n\n 37. These facts, when taken together with the evidence of intent presented for the other\n\nbasis of inequitable conduct, demonstrate a pattern of conduct that shows a continuing intent to\n\ndeceive the Patent Office.\n\nInfectious Unenforceability\n\n 38. The \u02bc254 application\u2014from which the \u2019867 patent issued\u2014was the first application\n\nin the chain of applications for the Asserted Patents. Each of the \u2019461 and the \u2019438 patents is a\n\nchild of the \u2019867 patent, and the pattern of blatantly inequitable conduct that pervades the\n\nprosecution of this patent family renders the claims of each of the Asserted Patents unenforceable.\n\n 39. Here, but for the false declaration filed in support of the revival of the \u2019254\n\napplication, no patents in the asserted patent family would have ever issued. Lumenyte Intern.\n\nCorp. v. Cable Lite Corp., 96-1011, 1996 U.S. App. LEXIS 16400 (Fed. Cir. July 9, 1996) (a false\n\naffidavit filed to revive an abandoned patent results in the unenforceability of later-filed, related\n\npatents).\n\n 40. Additionally, but for the withholding of material prior art\u2014including GPU Gems\n\n2, Cg, SANNDRA/KInNeSS, and BrookGPU, the Patent Office would not have allowed any of\n\n\n\n\n 43\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 45 44\n of 47\n of 46\n\n\n\n\nthe Asserted Patents to issue. All of the Asserted Patents were procured through a pattern of\n\ninequitable conduct as discussed herein.\n\n 41. From withholding material prior art to falsely claiming unintentional abandonment\n\nto obtain a patent, Neurala, the named inventors, and prosecution counsel have exhibited a pattern\n\nof intentional deception of the Patent Office. The remedy for the repeated and egregious instances\n\nof inequitable conduct is to render each of the Asserted Patents unenforceable.\n\n PRAYER FOR RELIEF\n\n Wherefore, Defendant respectfully requests judgment in its favor with the following relief:\n\n a) The Complaint be dismissed with prejudice.\n\n b) Judgment that Defendant has not infringed and is not infringing, either directly or\n\n indirectly, any of the claims the \u2019867 Patent, the \u2019461 Patent, and the\u2019 438 Patent,\n\n in violation of 35 U.S.C. \u00a7 271.\n\n c) Judgment that the claims of the \u2019867 Patent, the \u2019461 Patent, and the\u2019 438 Patent\n\n are invalid.\n\n d) Judgment that the \u2019867 Patent, the \u2019461 Patent and the \u2019438 Patent, including all of\n\n their claims, are unenforceable due to inequitable conduct.\n\n e) Judgment and determination that this case is exceptional under 35 U.S.C. \u00a7 285 and\n\n that Defendant is entitled to its attorneys\u2019 fees, costs, and expenses in defending\n\n this action.\n\n f) Such other relief, including other monetary and equitable relief, as this Court deems\n\n just and proper.\n\n DEMAND FOR JURY TRIAL\n\n Defendant demands a jury trial on all issues so triable.\n\n\n\n\n 44\n\f Case\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 46 45\n of 47\n of 46\n\n\n\n\nDated: November 18, 2025\n\n /s/ L. Kieran Kieckhefer\n L. Kieran Kieckhefer (pro hac vice)\n Jaysen S. Chung (pro hac vice)\n GIBSON, DUNN & CRUTCHER LLP\n One Embarcadero Center, Suite 2600\n San Francisco, CA 94111\n (415) 393-8200\n kkieckhefer@gibsondunn.com\n jschung@gibsondunn.com\n\n Brian Rosenthal\n Ahmed ElDessouki (pro hac vice)\n GIBSON, DUNN & CRUTCHER LLP\n 200 Park Ave.\n New York, NY 10166\n (212) 351-4000\n brosenthal@gibsondunn.com\n aeldessouki@gibsondunn.com\n\n Lillian J. Mao (pro hac vice)\n GIBSON DUNN & CRUTCHER LLP\n 1881 Page Mill Road\n Palto Alto, CA 94301-1211\n (650) 849-5307\n lmao@gibsondunn.com\n\n Barry K. Shelton (Texas State Bar No. 24055029)\n SHELTON COBURN LLP\n 311 RR 620 S, Suite 205\n Austin, TX 78734\n (512) 263 2165\n bshelton@sheltoncoburn.com\n\n Counsel for Defendant NVIDIA Corporation\n\n\n\n\n 45\n\fCase\n Case\n 7:24-cv-00221-ADA-DTG\n 7:26-mc-00323-DC Document\n Document\n 1-20130 Filed\n Filed\n 08/18/26\n 11/25/25 Page\n Page\n 47 46\n of 47\n of 46\n\n\n\n\n CERTIFICATE OF SERVICE\n\n I hereby certify that all counsel of record are being served with a copy of the foregoing\n\n documents via electronic mail on November 18, 2025.\n\n /s/ L. Kieran Kieckhefer\n L. Kieran Kieckhefer\n\n\n\n\n 46\n\f","ocr_status":2,"date_upload":"2026-08-20T10:23:49.004263-07:00","document_number":"1","attachment_number":20,"pacer_doc_id":"181037219963","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 19","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622552/","id":490622552,"tags":[],"absolute_url":"/docket/74666997/1/21/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.736478-07:00","date_modified":"2026-08-23T02:05:03.006977-07:00","sha1":"ba9cdc13b303103ab693d4f148865fb943ad8ff1","page_count":6,"file_size":208491,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.21.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.21.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-21 Filed 08/18/26 Page 1 of 6\n\n\n\n\n EXHIBIT\n\n 20\n\f Case 7:26-mc-00323-DC Document 1-21 Filed 08/18/26 Page 2 of 6\n\n\n Monday, August 17, 2026 at 8:54:56 PM Paci\ufb01c Daylight Time\n\nSubject: Re: RE: Neural AI Subpoena\nDate: Thursday, April 9, 2026 at 4:40:00 PM Paci\ufb01c Daylight Time\nFrom: Tanner Laiche\nTo: Olivia Nguyen, Adam Kessel\nCC: Rocco Magni, Tamar Lusztig, Brian Melton, Max Tribble, Emily Portuguese, Samuel Drezdzon, Richard Wojtczak, Rachel Hanna, Elizabeth Grant\nAttachments: RE49461.pdf, RE48438.pdf, US8648867.pdf, Re\ufb01ned Subpoena De\ufb01nitions.docx\n\n\nCounsel,\n\nThank you for the meet and confer earlier this week. As discussed, attached are the asserted patents and asserted claims:\n\n \u2019867 Patent: Claims 16\u201319\n \u2019461 Patent: Claims 21\u201325, 27\u201330\n \u2019438 Patent: Claims 1, 3\u20136, 8\u20139, 12, 14, 17\u201318, 21\u201323, 29\u201330, 32, 40, 43\u201344, 46, 48, 51\u201352, and 55\u201357\n\nAlso attached are re\ufb01ned de\ufb01nitions for the accused NVIDIA hardware and software, including clari\ufb01cations consistent with the\nCourt\u2019s recent discovery orders con\ufb01rming that certain NVIDIA hardware and software fall within the scope of discovery in this\ncase.\n\nAs discussed, we look forward to receiving CoreWeave\u2019s document production within two weeks. After reviewing the production,\nwe will follow up regarding any de\ufb01ciencies we identify. Please also con\ufb01rm whether CoreWeave uses accused NVIDIA software\nin conjunction with accused NVIDIA hardware for any of its own internal systems and work\ufb02ows, and if so, please include\nresponsive documents related to those use cases in your forthcoming production.\n\nRegards,\n\nTanner Laiche\nSusman Godfrey LLP\n206.505.3816 | tlaiche@susmangodfrey.com\n401 Union Street | Suite 3000 | Seattle, WA 98101\nHOUSTON \u2022 LOS ANGELES \u2022 SEATTLE \u2022 NEW YORK\n\n\nFrom: Tanner Laiche \nDate: Friday, April 3, 2026 at 3:48 PM\nTo: Olivia Nguyen , Adam Kessel \nCc: Rocco Magni , Tamar Lusztig , Brian Melton\n, Max Tribble , Emily Portuguese\n, Samuel Drezdzon , Richard Wojtczak\n, Rachel Hanna , Elizabeth Grant\n\nSubject: Re: RE: Neural AI Subpoena\n\nCounsel,\n\nThank you for your response. I will circulate a calendar invite for Monday at 11:30 am PT.\n\nRegards,\n\nTanner Laiche\nSusman Godfrey LLP\n206.505.3816 | tlaiche@susmangodfrey.com\n401 Union Street | Suite 3000 | Seattle, WA 98101\nHOUSTON \u2022 LOS ANGELES \u2022 SEATTLE \u2022 NEW YORK\n\n\nFrom: Olivia Nguyen \nDate: Thursday, April 2, 2026 at 3:08 PM\nTo: Tanner Laiche , Adam Kessel \nCc: Rocco Magni , Tamar Lusztig , Brian Melton\n, Max Tribble , Emily Portuguese\n, Samuel Drezdzon , Richard Wojtczak\n\n\n 1 of 5\n\f Case 7:26-mc-00323-DC Document 1-21 Filed 08/18/26 Page 3 of 6\n\n\n, Rachel Hanna , Elizabeth Grant\n\nSubject: RE: RE: Neural AI Subpoena\n\nEXTERNAL Email\n\n\nCounsel,\n\nThank you for your email. CoreWeave is conducting a reasonable search for documents consistent with its December 1, 2025 responses and\nintends to produce non-privileged, responsive materials. We would welcome a meet and confer to con\ufb01rm alignment on the scope of the\nrequests and the anticipated production timeline. We are available to discuss these matters on Monday, April 6 between 11am-2pm PT.\n\nThanks,\n\nOlivia T Nguyen\nPrincipal \u25a0 Fish & Richardson P.C.\n\nT: 650 839 5151 | onguyen@fr.com | Bio\n\n\nFrom: Tanner Laiche \nSent: Wednesday, April 1, 2026 3:47 PM\nTo: Olivia Nguyen ; Adam Kessel \nCc: RMagni@susmangodfrey.com; Tamar Lusztig ; bmelton@susmangodfrey.com; Max Tribble\n; Emily Portuguese ; SDrezdzon@susmangodfrey.com;\nRichard Wojtczak ; RHanna@susmangodfrey.com; Elizabeth Grant \nSubject: Re: RE: Neural AI Subpoena\n\nCounsel,\n\nI am following up on this email. Please provide your availability to meet and confer.\n\nRegards,\n\nTanner Laiche\nSusman Godfrey LLP\n206.505.3816 | tlaiche@susmangodfrey.com\n401 Union Street | Suite 3000 | Seattle, WA 98101\nHOUSTON \u2022 LOS ANGELES \u2022 SEATTLE \u2022 NEW YORK\n\n\nFrom: Tanner Laiche \nDate: Thursday, March 26, 2026 at 5:23 PM\nTo: Olivia Nguyen , Adam Kessel \nCc: Rocco Magni , Tamar Lusztig , Brian Melton\n, Max Tribble , Emily Portuguese\n, Samuel Drezdzon , Richard Wojtczak\n, Rachel Hanna , Elizabeth Grant\n\nSubject: Re: RE: Neural AI Subpoena\n\nCounsel,\n\nWe are following up regarding CoreWeave\u2019s December 1, 2025 objections and responses to Neural AI\u2019s subpoena. In those\nresponses, CoreWeave stated that it would produce responsive, non-privileged documents for several requests after a\nreasonable search, such as documents suhicient to identify CoreWeave commercial products using NVIDIA hardware or\nsoftware for GPU acceleration, certain high-level technical documentation, documents concerning use of NVLink or MIG, and\nmarketing materials referencing such use.\n\nTo date, however, CoreWeave has not produced any documents or otherwise followed up regarding the requests for which it\nagreed to conduct a search and produce responsive materials. Please con\ufb01rm by April 2 whether CoreWeave will proceed with its\nstated search and production, and, if so, provide a date by which we can expect that production.\n\nIn addition, to the extent CoreWeave narrowed any request or does not agree to search for and produce documents responsive to\nany request, please provide your availability to meet and confer so we can address those issues and, if necessary, raise them with\n\n 2 of 5\n\f Case 7:26-mc-00323-DC Document 1-21 Filed 08/18/26 Page 4 of 6\n\n\nthe Court.\n\nRegards,\n\nTanner Laiche\nSusman Godfrey LLP\n206.505.3816 | tlaiche@susmangodfrey.com\n401 Union Street | Suite 3000 | Seattle, WA 98101\nHOUSTON \u2022 LOS ANGELES \u2022 SEATTLE \u2022 NEW YORK\n\n\nFrom: Olivia Nguyen \nDate: Monday, December 1, 2025 at 8:46 PM\nTo: Tanner Laiche , Adam Kessel \nCc: Rocco Magni , Tamar Lusztig , Brian Melton\n, Max Tribble , Emily Portuguese\n, Samuel Drezdzon , Richard Wojtczak\n, Rachel Hanna , Elizabeth Grant\n\nSubject: RE: Neural AI Subpoena\n\nEXTERNAL Email\n\n\nCounsel,\n\nPlease find attached for service CoreWeave\u2019s objections and responses to Neural AI\u2019s subpoena.\n\nThanks,\nOlivia\n\nOlivia T Nguyen\nPrincipal \u25a0 Fish & Richardson P.C.\n\nT: 650 839 5151 | onguyen@fr.com | Bio\n\nFrom: Tanner Laiche \nSent: Wednesday, November 5, 2025 8:43 PM\nTo: Adam Kessel \nCc: RMagni@susmangodfrey.com; Tamar Lusztig ; bmelton@susmangodfrey.com; Max Tribble\n; Emily Portuguese ; SDrezdzon@susmangodfrey.com;\nRichard Wojtczak ; RHanna@susmangodfrey.com; egrant ; Olivia\nNguyen \nSubject: Re: Neural AI Subpoena\n\nYes, December 1 is \ufb01ne.\n\nRegards,\n\nTanner Laiche\nSusman Godfrey LLP\n206.505.3816 | tlaiche@susmangodfrey.com\n401 Union Street | Suite 3000 | Seattle, WA 98101\nHOUSTON \u2022 LOS ANGELES \u2022 SEATTLE \u2022 NEW YORK\nThis e-mail may contain privileged and confidential information. If you received this message in error, please notify me and delete it immediately.\n\n\nFrom: Adam Kessel \nDate: Wednesday, November 5, 2025 at 5:43 PM\nTo: Tanner Laiche \nCc: Rocco Magni , Tamar Lusztig , Brian Melton\n, Max Tribble , Emily Portuguese\n, Samuel Drezdzon , Richard Wojtczak\n, Rachel Hanna , Elizabeth Grant\n, Olivia Nguyen \nSubject: RE: Neural AI Subpoena\nEXTERNAL Email\n\n\n\n 3 of 5\n\f Case 7:26-mc-00323-DC Document 1-21 Filed 08/18/26 Page 5 of 6\n\n\nNovember 29 is the Saturday after Thanksgiving. Can we agree to set the deadline to Monday, December 1?\n\nFrom: Tanner Laiche \nSent: Thursday, October 23, 2025 4:32 PM\nTo: Adam Kessel \nCc: RMagni@susmangodfrey.com; Tamar Lusztig ; bmelton@susmangodfrey.com; Max Tribble\n; Emily Portuguese ; SDrezdzon@susmangodfrey.com;\nRichard Wojtczak ; RHanna@susmangodfrey.com; egrant \nSubject: Re: Neural AI Subpoena\n\n\n[This email originated outside of F&R.]\n\n\nCounsel,\n\nThank you for your email. As the noticed compliance date was November 7, 2025, that already re\ufb02ected an extension from\nservice. That said, we\u2019re agreeable to a 30-day extension from the Rule 45 default deadline. Because the subpoena was served on\nOctober 16, 2025, that would extend the deadline to November 29, 2025.\n\nPlease let me know if you\u2019d like to schedule a call to discuss further.\n\nRegards,\n\nTanner Laiche\nSusman Godfrey LLP\n206.505.3816 | tlaiche@susmangodfrey.com\n401 Union Street | Suite 3000 | Seattle, WA 98101\nHOUSTON \u2022 LOS ANGELES \u2022 SEATTLE \u2022 NEW YORK\nThis e-mail may contain privileged and confidential information. If you received this message in error, please notify me and delete it immediately.\n\n\nFrom: Adam Kessel \nDate: Wednesday, October 22, 2025 at 12:00 PM\nTo: Tanner Laiche \nSubject: Neural AI Subpoena\nEXTERNAL Email\n\n\nMr. Laiche:\n\nThis \ufb01rms represents CoreWeave. I have just received Neural AI's subpoena out of the Nvidia case. We'll need some time to get our arms\naround the requests and \ufb01gure out what we may be able to provide. Can Neural AI agree to a 30-day extension over its noticed date of\nNovember 7, 2025 for a response from CoreWeave?\n\nRegards,\nAdam Kessel\nPrincipal \u25a0 Fish & Richardson P.C.\n\nT: 617 368 2180 | Kessel@fr.com\n\n\n****************************************************************************************************************************\nThis email message is for the sole use of the intended recipient(s) and may contain confidential and privileged\ninformation. Any unauthorized use or disclosure is prohibited. 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If you are not the intended recipient, please contact the\nsender by reply email and destroy all copies of the original message.\n****************************************************************************************************************************\n\n\n\n****************************************************************************************************************************\nThis email message is for the sole use of the intended recipient(s) and may contain confidential and privileged\ninformation. Any unauthorized use or disclosure is prohibited. If you are not the intended recipient, please contact the\nsender by reply email and destroy all copies of the original message.\n\n\n 4 of 5\n\f Case 7:26-mc-00323-DC Document 1-21 Filed 08/18/26 Page 6 of 6\n\n****************************************************************************************************************************\n\n\n\n****************************************************************************************************************************\nThis email message is for the sole use of the intended recipient(s) and may contain confidential and privileged\ninformation. Any unauthorized use or disclosure is prohibited. If you are not the intended recipient, please contact the\nsender by reply email and destroy all copies of the original message.\n****************************************************************************************************************************\n\n\n\n\n 5 of 5\n\f","ocr_status":1,"date_upload":"2026-08-20T10:23:37.471501-07:00","document_number":"1","attachment_number":21,"pacer_doc_id":"181037219964","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 20","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622553/","id":490622553,"tags":[],"absolute_url":"/docket/74666997/1/22/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.763927-07:00","date_modified":"2026-08-23T08:23:08.277436-07:00","sha1":"b604f3bd836b78430999898ee28d384f0b4e4b19","page_count":7,"file_size":3526575,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.22.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.22.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"Case 7:26-mc-00323-DC Document 1-22 Filed 08/18/26 Page 1 of 7\n\n\n\n\n EXHIBIT\n\n 21\n\f Case 7:26-mc-00323-DC Document 1-22 Filed 08/18/26 Page 2 of 7\n A Page Vault\nDocument title: Shared Responsibility Model - CoreWeave Docs\n\nCapture URL: https://docs.coreweave.com/docs/policies/terms-of-service/shared-responsibility-\n model\n\nPage loaded at (UTC): Wed, 22 Apr 2026 15:00:35 GMT\n\nCapture timestamp (UTC): Wed, 22 Apr 2026 15:00:37 GMT\n\nCapture tool: 3.20.3\n\nCollection server IP: 54.227.96.234\n\nBrowser engine: Mozilla/5.0 (Windows NT 10.0; Win64; x64) AppleWebKit/537.36 (KHTML, like\n Gecko) Chrome/139.0.0.0 Safari/537.36\n\nOperating system: linux x64 (Node v20.18.0)\n\nPDF length: 6\n\nCapture ID: 3YZdiSh6qDuPXJ9deEeLLz\n\nDisplay Name: agonzalez\n\n\n\n\n PDF REFERENCE #: dHBQ4M64mtdpGgiptb93xC\n\n\n\n COREWEAVE_0000286\n\f Case 7:26-mc-00323-DC Document 1-22 Filed 08/18/26 Page 3 of 7\n OP CoreWeave Q Search CoreWeave docs... Ctrl K ' Ask Al itt\n\n\n Platform Products Reference Support\n\n\n CoreWeave Documentation\n Platform Details > Policies > Terms of Service\n Get started with CoreWeave\n Shared Responsibility Model IP Copy MCP Server\n\n Regions and Avails busy\n How CoreWeave and its clients platform use responsibilities\n Instances\n\n Regions and Availability Zones What is a Shared Responsibility Model?\n Capacity plans\n A Shared Responsibility Model is a tool to help communicate the distinction between the\n Fleet Management\n responsibilities held by CoreWeave and the responsibilities held by our clients when using the\n CoreWeave Cloud platform. The table below illustrates the basic aspects of CoreWeave Cloud for\n Billing which the client is ultimately responsible, as well as those for which CoreWeave itself is ultimately\n\n Billing responsible. You can read more about each listed aspect under the table.\n\n Billing insights\n Security and compliance on CoreWeave operates as a shared responsibility between CoreWeave\n View invoices and our customers. This shared model relieves the operational burden of customers while\n Pricing CoreWeave operates, manages, and controls the infrastructure components that support our\n services.\n\n Platform Details\n The Shared Responsibility Model below delineates the responsibilities that CoreWeave customers\n Observability (\"Client\") maintain, versus those that CoreWeave itself maintains.\n Policies\n\n Terms of Service\n Terms\n Terms of Service\n \u2022 Client: A CoreWeave Cloud customer\n Terms of Use\n \u2022 End user: A user connecting to the Client's services; the Client's customers\n Privacy Policy\n\n Acceptable Use Policy\n\n Shared Responsibility Model The CoreWeave Shared Responsibility Model\n Data Processing Agreement\n\n Maintenance Policy Client responsibilities CoreWeave responsibilities\n\n Security & Compliance 1. Customer Layer 1. Platform Layer\n Customer Data Access Collection, Protection and Kubernetes Container Orchestration; API Services; Identity\n CoreWeave Sub-processors Use; Legal, Acceptable Use, Privacy Policy and Access Management Platform; Cloud Console; Virtual\n Requirements Private Cloud\n CoreWeave Al Object Storage\n Service Level Agreement\n 2. Application Layer 2. Compute Layer\n CoreWeave ARENA Terms of Application Performance; Reliability; Security and Operating System; Container Support; Hardware Drivers;\n Service Management; Application Code Health Checking and Node Lifecycle; Endpoint Detection\n and Response\n Spot Services Terms\n 3. Access Layer 3. Network Layer\n Limits Identity and Access Management Policy Internal and External Connectivity; Network Encapsulation;\n CoreWeave Customer Asset Definitions; Third-Party Identity Providers Network VPC Isolation; Direct Connect\n Penetration Testing Policy Policies\n\n CoreWeave Vulnerability 4. Data Layer 4. Physical Layer\n Disclosure Policy Data Classification; Data Protection; Encryption, Data Center Security; Power and Cooling; IT Inventory and\n r\n EU Data Act Addendum Ask a question,.\n\n Information Security Advisories\n\n\n\n\nDocument title: Shared Responsibility Model - CoreWeave Docs\nCapture URL: https://docs.coreweave.com/docs/policies/terms-of-service/shared-responsibility-model\nCapture timestamp (UTC): Wed, 22 Apr 2026 15:00:37 GMT Page 1 of 5\n COREWEAVE_0000287\n\f Case 7:26-mc-00323-DC Document 1-22 Filed 08/18/26 Page 4 of 7\n OP CoreWeave Q Search CoreWeave dots... ctrl K ' Ask Al Itt\n\n\n Platform Products Reference Support\n\n\n CoreWeave Documentation\n\n Get started with CoreWeave Client responsibilities\n Any aspects of using CoreWeave Cloud that are within the Client's absolute control are the\n Regions and Aval la blity\n responsibility of the Client.\n Instances\n The following are elements that fall under the Client's responsibility.\n Regions and Availability Zones\n\n Capacity plans \u2022 Client software and applications and client-side data, the software and applications Clients\n Fleet Management choose to run within their containers, as well as all client-side data, is the sole responsibility\n of the Client\n\n Billing \u2022 Any guest Operating System used on Virtual Servers. Clients are responsible for guest\n\n Billing Operating Systems and network configurations, including firewall configurations\n\n Billing insights\n The following are all Client responsibilities described in depth.\n View invoices\n\n Pricing\n Customer layer\n Platform Details\n Responsibility Description\n Observability\n Customer Data Access The method by which end users normally access hosted data is the Client's\n Policies Collection, Protection and Use responsibility. The methods by which any data is collected from or about end\n users is the Client's responsibility.\n Terms of Service\n Legal, Acceptable Use, Privacy It is the Client's responsibility to adhere to all legal, acceptable use, and\n Terms of Service\n Policy Requirements requirements as stipulated in the CoreWeave Privacy Policy and Terms of\n Terms of Use Service.\n\n Privacy Policy\n\n Acceptable Use Policy\n\n Shared Responsibility Model Application layer\n Data Processing Agreement\n Responsibility Description\n Maintenance Policy\n Application The performance of applications deployed by the Client are the responsibility of the\n Security & Compliance\n Performance Client with regard to performance of the underlying application code.\n CoreWeave Sub-processors\n Reliability Reliability of applications deployed by the Client are the responsibility of the Client for\n CoreWeave Al Object Storage any type of service level reliability they must meet.\n Service Level Agreement\n Security and Clients are responsible for the security of their applications, including configuration\n CoreWeave ARENA Terms of Management and application security for all applications deployed by the Client onto CoreWeave\n Service Products.\n Spot Services Terms\n Application Code The performance, reliability, security, and management of the Client's application is\n Limits the Client's responsibility.\n\n CoreWeave Customer Asset\n Penetration Testing Policy\n\n CoreWeave Vulnerability\n Disclosure Policy\n Access layer\n\n EU Data Act Addendum Ask a question,..\n\n Information Security Advisories\n\n\n\n\nDocument title: Shared Responsibility Model - CoreWeave Docs\nCapture URL: https://docs.coreweave.com/docs/policies/terms-of-service/shared-responsibility-model\nCapture timestamp (UTC): Wed, 22 Apr 2026 15:00:37 GMT Page 2 of 5\n COREWEAVE_0000288\n\f Case 7:26-mc-00323-DC Document 1-22 Filed 08/18/26 Page 5 of 7\n OP CoreWeave Q Search CoreWeave dots... Ctrl K \u00a2 Ask Al\n\n\n Platform Products Reference Support\n\n Identity and Access All identity-based access management (IAM) configurations are the Client's\n CoreWeave Documentation Management Policy responsibility that serve authentication and authorization for CoreWeave Cloud\n Get started with CoreWeave Definitions services.\n\n Third Party Identity Providers Secure configuration and management of third-party identity providers (IdP's)\n Regions and Avails bitty are the Client's responsibility to maintain for SAML/SSO or OIDC based\n connections\n Instances\n Network Policies Secure configuration of the Client's network policies in CKS clusters are the\n Regions and Availability Zones Client's responsibility within CoreWeave Cloud products such as utilizing\n Kubernetes resources such as Kubernetes Network Policies,\n Capacity plans\n\n Fleet Management\n\n\n\n Billing\n Data layer\n\n Billing\n Responsibility Description\n Billing insights\n Data Classification It is the responsibility of the Client to properly classify data used within CoreWeave\n View invoices Cloud products and data collected from or about end users,\n Pricing Data Protection It is the responsibility of the Client to ensure that classified data is adequately secured.\n\n Encryption It is the responsibility of the Client to ensure that any data determined to require\n Platform Details encryption at rest or in transit utilizes the required protocols for securing data,\n\n Observability Disaster Recovery It is the responsibility of the Client to construct any disaster recovery plans for use of\n Plans CoreWeave Products,\n Policies\n\n Terms of Service Backups It is the responsibility of the Client to construct any backup systems for data recovery\n purposes.\n Terms of Service\n Metadata It is the responsibility of the Client to ensure that confidential information is not stored\n Terms of Use in metadata fields.\n Privacy Policy\n Resource Identifiers It is the responsibility of the Client to ensure that confidential information is not stored\n Acceptable Use Policy in resource identifiers.\n\n Shared Responsibility Model\n\n Data Processing Agreement\n\n Maintenance Policy CoreWeave responsibilities\n Security & Compliance\n CoreWeave's responsibilities begin at the physical level spanning across data centers in the\n CoreWeave Sub-processors United States and European regions that contain CoreWeave assets.\n CoreWeave Al Object Storage\n Service Level Agreement It is our responsibility to ensure that our physical data centers are always secure, and that power\n\n CoreWeave ARENA Terms of is always on and flowing to where it is needed with redundant mechanisms in place.\n Service\n Storage, compute, network infrastructure, and software services are the responsibilities of\n Spot Services Terms\n CoreWeave. Our high-performance NVIDIA GPUs and CPUs all fall under the care of our dedicated\n Limits\n teams, to include all services and software provisioned for our clients to use.\n CoreWeave Customer Asset\n Penetration Testing Policy The following are all CoreWeave responsibilities described in depth from our Shared\n CoreWeave Vulnerability Responsibility Model.\n Disclosure Policy\n\n EU Data Act Addendum Ask a question...\n\n Information Security Advisories\n\n\n\n\nDocument title: Shared Responsibility Model - CoreWeave Docs\nCapture URL: https://docs.coreweave.com/docs/policies/terms-of-service/shared-responsibility-model\nCapture timestamp (UTC): Wed, 22 Apr 2026 15:00:37 GMT Page 3 of 5\n COREWEAVE_0000289\n\f Case 7:26-mc-00323-DC Document 1-22 Filed 08/18/26 Page 6 of 7\n OP CoreWeave Q Search CoreWeave docs... Ctrl K Ask Al \u20229\n\n\n Platform Products Reference Support\n ri iVr ii i i yei\n\n CoreWeave Documentation\n Responsibility Description\n Get started with CoreWeave\n Kubernetes Container The proper functionality, security, and operations of CoreWeave's Kubernetes\n Orchestration cluster is the responsibility of CoreWeave.\n Regions and Aval la blIdty\n\n API Services The functionality and availability of all API services pertaining to CoreWeave\n Instances\n Cloud is the responsibility of CoreWeave.\n Regions and Availability Zones\n Identity and Access The functionality and security of the Identity and Access Management Platform\n Capacity plans Management Platform offered to Clients through CoreWeave Cloud platform services is the\n responsibility of CoreWeave.\n Fleet Management\n Cloud Console The reliability, accessibility, serviceability and security of the CoreWeave Cloud\n Console is the responsibility of CoreWeave.\n Billing\n Virtual Private Cloud The reliability, accessibility, serviceability and security of CoreWeave VPCs is\n Billing the responsibility of CoreWeave.\n Billing insights\n\n View invoices\n\n Pricing Compute layer\n\n Platform Details Responsibility Description\n\n Observability Operating System The integrity of all native Operating Systems offered directly through CoreWeave\n Cloud Console (but not guest OSes through container images, which fall under the\n Policies responsibility of the Client) is the responsibility of CoreWeave.\n Terms of Service Container Support The health and functionality of CoreWeave deployed software within the\n Terms of Service CoreWeave Kubernetes cluster is the responsibility of CoreWeave, noted by \"cw-\"\n prefixed namespaces.\n Terms of Use\n Hardware Drivers The integrity of any drivers installed on CoreWeave hardware is the responsibility of\n Privacy Policy CoreWeave,\n Acceptable Use Policy\n Health Checking and The availability and serviceability of CoreWeave infrastructure is the responsibility\n Shared Responsibility Model Node Lifecycle of CoreWeave.\n\n Data Processing Agreement Endpoint Detection and The monitoring of all CoreWeave endpoints to ensure security and functionality is\n Response the responsibility of CoreWeave.\n Maintenance Policy\n\n Security & Compliance\n\n CoreWeave Sub-processors\n Network layer\n CoreWeave Al Object Storage\n Service Level Agreement\n Responsibility Description\n CoreWeave ARENA Terms of\n Service Internal and External \u2022CoreWeave leverages BlueField DPUs for access to one or multiple VPCs, with\n Connectivity optional internet access. CoreWeave maintains the security of these connections\n Spot Services Terms\n made by Clients.\n Limits\n Network Encapsulation VPCs are encapsulated as industry standard Layer 3 EVPN VXLAN which is\n CoreWeave Customer Asset secured and the responsibility of CoreWeave\n Penetration Testing Policy\n VPC Isolation Tenant isolation inside of the all VPCs provisioned by Clients are secured through\n CoreWeave Vulnerability the configuration of DPUs and hosts which are the responsibility of CoreWeave.\n Disclosure Policy\n\n EU Data Act Addendum Ask a question...\n Cti l-I\n Information Security Advisories\n\n\n\n\nDocument title: Shared Responsibility Model - CoreWeave Docs\nCapture URL: https://docs.coreweave.com/docs/policies/terms-of-service/shared-responsibility-model\nCapture timestamp (UTC): Wed, 22 Apr 2026 15:00:37 GMT Page 4 of 5\n COREWEAVE_0000290\n\f Case 7:26-mc-00323-DC Document 1-22 Filed 08/18/26 Page 7 of 7\n OP CoreWeave Q Search CoreWeave docs... ctrl K \u00a2 Ask Al st\n\n Platform Products Reference Support\n\n\n CoreWeave Documentation\n\n Get started with CoreWeave\n Network layer\n Regions and Aval la bitty\n Responsibility Description\n Instances\n Internal and External CoreWeave leverages BlueField DPUs for access to one or multiple VPCs, with\n Regions and Availability Zones\n Connectivity optional internet access. CoreWeave maintains the security of these connections\n Capacity plans made by Clients.\n\n Fleet Management Network Encapsulation VPCs are encapsulated as industry standard Layer 3 EVPN VXLAN which is\n secured and the responsibility of CoreWeave\n\n Billing\n VPC Isolation Tenant isolation inside of the all VPCs provisioned by Clients are secured through\n the configuration of DPUs and hosts which are the responsibility of CoreWeave.\n Billing\n Direct Connect The security of all Direct Connects is maintained by CoreWeave through the use of\n Billing insights industry standard MACsec protection for securing Client data\n View invoices\n\n Pricing\n\n Physical layer\n Platform Details\n Responsibility Description\n Observability\n\n Policies Data Center Security The security of all data centers internal and external, to include CoreWeave\n hardware assets within them are the responsibility of CoreWeave.\n Terms of Service\n Power and Cooling The availability and proper flow of power, as well as the availability and proper\n Terms of Service flow of data center cooling, is the responsibility of CoreWeave.\n Terms of Use\n IT Inventory and Asset Processing hardware inventory and access to CoreWeave hardware is the\n Privacy Policy Management responsibility of CoreWeave.\n\n Acceptable Use Policy Physical The integrity and serviceability of the physical networking infrastructure for\n CoreWeave is the responsibility of CoreWeave.\n Shared Responsibility Model\n\n Data Processing Agreement\n\n Maintenance Policy\n\n Security & Compliance\n Was this page helpful? t'\u201er` Yes 1? No\n CoreWeave Sub-processors\n\n CoreWeave Al Object Storage\n Service Level Agreement\n\n CoreWeave ARENA Terms of Acceptable Use Policy CoreWeave Data Processing Agreement\n Service t Previous Next\n Spot Services Terms\n\n Limits\n\n CoreWeave Customer Asset\n Penetration Testing Policy\n\n CoreWeave Vulnerability\n Disclosure Policy\n\n EU Data Act Addendum\n\n Information Security Advisories\n\n\n\n\nDocument title: Shared Responsibility Model - CoreWeave Docs\nCapture URL: https://docs.coreweave.com/docs/policies/terms-of-service/shared-responsibility-model\nCapture timestamp (UTC): Wed, 22 Apr 2026 15:00:37 GMT Page 5 of 5\n COREWEAVE_0000291\n\f","ocr_status":1,"date_upload":"2026-08-20T10:23:45.384217-07:00","document_number":"1","attachment_number":22,"pacer_doc_id":"181037219965","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Exhibit 21","acms_document_guid":""},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490622554/","id":490622554,"tags":[],"absolute_url":"/docket/74666997/1/23/neural-ai-llc-v-coreweave-inc/","date_created":"2026-08-19T14:31:06.787446-07:00","date_modified":"2026-08-23T01:40:58.578958-07:00","sha1":"9e44549b86e6e59cd2d202dc6343dd69ae8f1da7","page_count":2,"file_size":111080,"filepath_local":"recap/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.23.pdf","filepath_ia":"https://archive.org/download/gov.uscourts.txwd.1172928143/gov.uscourts.txwd.1172928143.1.23.pdf","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":" Case 7:26-mc-00323-DC Document 1-23 Filed 08/18/26 Page 1 of 2\n\n\n\n\n IN THE UNITED STATES DISTRICT COURT\n FOR THE WESTERN DISTRICT OF TEXAS\n MIDLAND/ODESSA DIVISION\n\n\n NEURAL AI, LLC,\n Misc. Case No. 7:26-mc-323\n Petitioner,\n Principal case pending in Western District of\n v. Texas, Civil Action No. 7:24-cv-00221-LS-\n DTG\n COREWEAVE, INC.,\n\n Respondent.\n\n\n [PROPOSED] ORDER ON PETITIONER'S MOTION TO COMPEL\n COMPLIANCE WITH SUBPOENA SERVED ON THIRD-PARTY COREWEAVE, INC.\n\n Before the Court is Petitioner Neural AI, LLC\u2019s Motion to Compel Compliance with\n\nSubpoena Served on Third-Party Coreweave, Inc. Having considered the Motion, the responses\n\nand objections thereto, and the applicable law, the Court finds that the Motion should be and hereby\n\nis GRANTED.\n\n IT IS THEREFORE ORDERED that Third-Party Coreweave, Inc. shall produce\n\nnonprivileged documents responsive to Requests for Production Nos. 1\u201320 on a rolling basis, with\n\nproduction to begin within seven (7) days of the date of this Order and be completed within twenty-\n\none (21) days of this Order.\n\n IT IS FURTHER ORDERED that Third-Party Coreweave, Inc. shall designate and produce\n\na knowledgeable witness for deposition testimony on Deposition Topics 1\u20135 within thirty (30)\n\ndays of the date of this Order.\n\n\n\n\n 1\n\f Case 7:26-mc-00323-DC Document 1-23 Filed 08/18/26 Page 2 of 2\n\n\n\n\nSO ORDERED: this _____ day of _____________________, 2026.\n\n\n\n\n United States District Judge\n\n\n\n\n 2\n\f","ocr_status":1,"date_upload":"2026-08-20T10:23:51.438388-07:00","document_number":"1","attachment_number":23,"pacer_doc_id":"181037219966","is_available":true,"is_free_on_pacer":null,"is_sealed":null,"document_type":2,"description":"Proposed Order","acms_document_guid":""}],"date_created":"2026-08-18T17:13:29.066116-07:00","date_modified":"2026-08-19T14:30:54.686952-07:00","date_filed":"2026-08-18","time_filed":"18:33:03","entry_number":1,"recap_sequence_number":"2026-08-18.001","pacer_sequence_number":3,"description":"MOTION to Compel by Neural AI, LLC. (Attachments: # 1 Affidavit of Tanner Laiche, # 2 Exhibit 1, # 3 Exhibit 2, # 4 Exhibit 3, # 5 Exhibit 4, # 6 Exhibit 5, # 7 Exhibit 6, # 8 Exhibit 7, # 9 Exhibit 8, # 10 Exhibit 9, # 11 Exhibit 10, # 12 Exhibit 11, # 13 Exhibit 12, # 14 Exhibit 13, # 15 Exhibit 14, # 16 Exhibit 15, # 17 Exhibit 16, # 18 Exhibit 17, # 19 Exhibit 18, # 20 Exhibit 19, # 21 Exhibit 20, # 22 Exhibit 21, # 23 Proposed Order)(Magni, Rocco) (Entered: 08/18/2026)","tags":[]},{"resource_uri":"https://www.courtlistener.com/api/rest/v4/docket-entries/474970620/","id":474970620,"docket":"https://www.courtlistener.com/api/rest/v4/dockets/74666997/","recap_documents":[{"resource_uri":"https://www.courtlistener.com/api/rest/v4/recap-documents/490487417/","id":490487417,"tags":[],"absolute_url":"","date_created":"2026-08-18T17:13:26.174628-07:00","date_modified":"2026-08-18T17:13:26.174654-07:00","sha1":"","page_count":null,"file_size":null,"filepath_local":null,"filepath_ia":"","ia_upload_failure_count":null,"thumbnail":null,"thumbnail_status":0,"plain_text":"","ocr_status":null,"date_upload":null,"document_number":"","attachment_number":null,"pacer_doc_id":"","is_available":false,"is_free_on_pacer":null,"is_sealed":null,"document_type":1,"description":"Payment of Miscellaneous Filing Fee","acms_document_guid":""}],"date_created":"2026-08-18T17:13:26.160236-07:00","date_modified":"2026-08-18T17:13:26.160255-07:00","date_filed":"2026-08-18","time_filed":"18:41:01","entry_number":null,"recap_sequence_number":"2026-08-18.001","pacer_sequence_number":null,"description":"","tags":[]}],"entries_total":"https://www.courtlistener.com/api/rest/v4/docket-entries/?count=on&docket=74666997&page_size=40"}